19-2911 Rev 2; 8/04 KIT ATION EVALU E L B A IL AVA EEPROM-Programmable TFT VCOM Calibrator The MAX1512 is a programmable VCOM-adjustment solution for thin-film transistor (TFT) liquid-crystal displays (LCDs). The MAX1512 simplifies the labor-intensive VCOM-adjustment process and replaces mechanical potentiometers, which significantly reduces labor costs, increases reliability, and enables automation. The MAX1512 attaches to an external resistive voltagedivider and sinks a programmable current to set the VCOM voltage level. An internal 7-bit digital-to-analog converter (DAC) controls the sink current. The DAC is ratiometric relative to AVDD and is guaranteed to be monotonic over all operating conditions. This VCOM calibrator IC includes an EEPROM to store the desired VCOM voltage level. The EEPROM can be programmed repeatedly, giving TFT LCD manufacturers the flexibility to calibrate the display panel as many times as the manufacturing process requires. The IC features a single-wire interface between the LCD panel and the programming circuit. The singlewire interface delivers both programming power and DAC-adjustment commands to minimize changes to panel connectors and production equipment. The MAX1512 is available in an 8-pin 3mm x 3mm TDFN package. A complete evaluation kit is available to simplify evaluation and production development. Features ♦ 7-Bit Adjustable Sink-Current Output ♦ Resistor-Adjustable Full-Scale Range ♦ Guaranteed Monotonic Output Over Operating Range ♦ Single-Wire Adjustment and Programming* ♦ EEPROM Stores VCOM Setting ♦ Interface Enable/Disable Control (CE) ♦ 2.6V to 3.6V Logic Supply-Voltage Operating Range (VDD) ♦ 4.5V to 20V Analog Supply-Voltage Range (VAVDD) ♦ VDD UVLO Protection ♦ 8-Pin 3mm x 3mm TDFN (0.8mm max) Ordering Information PART MAX1512ETA TEMP RANGE PIN-PACKAGE -40°C to +85°C 8 TDFN 3mm x 3mm Applications LCD Panels Notebook Computers Typical Operating Circuit Monitors LCD TVs VDD Pin Configuration AVDD VDD TOP VIEW AVDD CE R1 OUT 1 AVDD 2 N.C. 3 GND 4 MAX1512 TDFN 8 SET 7 CE 6 CTL 5 VDD MAX1512 OUT VCOM R2 CTL SET GND RSET *Patent Pending. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1512 General Description MAX1512 EEPROM-Programmable TFT VCOM Calibrator ABSOLUTE MAXIMUM RATINGS VDD, SET, CE to GND...............................................-0.3V to +4V OUT to GND ...........................................................-0.3V to +14V AVDD to GND.........................................................-0.3V to +24V CTL to GND ............................................................-0.3V to +16V Continuous Power Dissipation (TA = +70°C) ............................... 8-Pin Thin QFN 3mm x 3mm (derate 24.4mW/°C above +70°C).............................................................1951mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 30.1kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS +1 LSB +2 LSB +12 LSB 120 µA SINK-CURRENT ADJUSTMENT SET Voltage Resolution 7 SET Differential Nonlinearity Guaranteed monotonic SET Zero-Scale Error -1 SET Full-Scale Error SET Current SET External Resistance (Note 2) Bits -1 +1 -12 ISET RSET VSET / VAVDD Voltage Ratio To GND, VAVDD = 20V 10 200 To GND, VAVDD = 4.5V 2.25 45.00 DAC full scale VSET / VAVDD Factory Set Voltage Ratio 0.05 0.024 kΩ V/V 0.025 0.026 V/V 3.6 V VDD SUPPLY VDD Supply Range VDD VDD Supply Current IDD VDD Power-On Reset Threshold 2.6 CE = VDD 32 55 CE = GND 12 20 Rising edge 2.2 2.5 2.7 Falling edge 2.1 2.4 2.6 VDD Power-On Reset Hysteresis 100 µA V mV CONTROL AND PROGRAMMING CE Input Low Voltage 2.6V < VDD < 3.6V CE Input High Voltage 2.6V < VDD < 3.6V CE Startup Time (Note 3) CTL High Voltage 2.6V < VDD < 3.6V 0.70 x VDD 0.82 x VDD V CTL Float Voltage 2.6V < VDD < 3.6V 0.40 x VDD 0.62 x VDD V CTL Low Voltage 2.6V < VDD < 3.6V 0.20 x VDD 0.32 x VDD CTL Rejected Pulse Width 0.4 1.6 V V 1 20 ms V µs CTL Minimum Pulse Width 200 µs CTL Minimum Time Between Pulses 10 µs CTL Input Current 2 CTL = GND -10 CTL = VDD _______________________________________________________________________________________ 10 µA EEPROM-Programmable TFT VCOM Calibrator (Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 30.1kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) CTL Input Current µA CTL = VDD 10 PARAMETER CTL EEPROM Program Voltage SYMBOL VPP CONDITIONS (Note 3) MIN TYP MAX UNITS 15.25 15.5 15.75 V OUTPUT VOLTAGE OUT Leakage Current VDD = 2.1V OUT Settling Time 1 To ±0.5 LSB error band VOUT Voltage Range VOUT nA 20 µs VSET + 0.5V 13 V 20.0 V AVDD SUPPLY VAVDD Supply Range VAVDD 4.5 ELECTRICAL CHARACTERISTICS (VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 30.1kΩ, TA = -40°C to +85°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SINK-CURRENT ADJUSTMENT SET Differential Nonlinearity -1 +1 LSB SET Zero-Scale Error -1 +2 LSB SET Full-Scale Error -12 +12 LSB 120 µA To GND, VAVDD = 20V 10 200 To GND, VAVDD = 4.5V 2.25 45.00 2.6 3.6 SET Current Guaranteed monotonic ISET SET External Resistance (Note 2) RSET kΩ VDD SUPPLY VDD Supply Range VDD VDD Supply Current IDD VDD Power-On Reset Threshold CE = VDD 55 CE = GND 20 Rising edge 2.2 2.7 Falling edge 2.1 2.6 V µA V CONTROL AND PROGRAMMING CE Input Low Voltage 2.6V < VDD < 3.6V CE Input High Voltage 2.6V < VDD < 3.6V 0.4 1.6 V V AVDD SUPPLY VAVDD Supply Range VAVDD 4.5 20.0 V AVDD Operating Current IAVDD VAVDD = 20V 20 µA Note 1: Limits are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed through correlation using standard quality control (SQC) methods. Note 2: SET external resistor range is verified at DAC full scale. Note 3: Guaranteed by design. Not production tested. _______________________________________________________________________________________ 3 MAX1512 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 24.9kΩ, TA = +25°C, DAC half scale, unless otherwise noted.) VDD SUPPLY CURRENT vs. VDD 32.6 32.4 32.2 32.0 31.8 10 60 1 VDD = VOUT = 3V 0.1 2.2 80 2.4 2.6 2.8 3.0 3.2 10 IOUT SINK-CURRENT ERROR vs. VAVDD 2.850 2.845 2.840 2.835 2.830 IOUT SINK-CURRENT ERROR (LSB) MAX1512 toc04 3.00 2.95 2.90 2.85 2.80 2.75 2.70 2.820 2.8 3.0 3.2 3.4 4.5 3.6 6.5 8.5 10.5 12.5 14.5 16.5 18.5 VDD (V) VAVDD (V) IOUT SINK-CURRENT ERROR vs. VOUT IOUT SINK-CURRENT ERROR vs. TEMPERATURE MAX1512 toc06 2.840 2.835 3.0 IOUT SINK-CURRENT ERROR (LSB) 2.6 MAX1512 toc07 IOUT SINK-CURRENT ERROR (LSB) 1 3.05 2.825 IOUT SINK-CURRENT ERROR (LSB) 0.1 RSET (kΩ) IOUT SINK-CURRENT ERROR vs. VDD 2.855 2.9 2.8 2.7 2.830 0 0.5 1.0 VOUT (V) 4 3.6 3.4 VDD (V) TEMPERATURE (°C) MAX1512 toc05 40 VAVDD = 4.5V RISING 0 20 100 10 15 31.4 0 MAX1512 toc02 20 5 -20 VAVDD = 20V 1000 25 31.6 -40 FALLING 30 10,000 IOUT (µA) 32.8 CE = VDD 35 VDD SUPPLY CURRENT (µA) CE = VDD = 3V 33.0 IOUT vs. RSET 40 MAX1512 toc01 33.2 MAX1512 toc03 VDD SUPPLY CURRENT vs. TEMPERATURE VDD SUPPLY CURRENT (µA) MAX1512 EEPROM-Programmable TFT VCOM Calibrator 1.5 2.0 -40 -20 0 20 40 60 80 TEMPERATURE (°C) _______________________________________________________________________________________ 100 1000 EEPROM-Programmable TFT VCOM Calibrator 5 4 RSET = 100kΩ 3 2 1 RSET = 100kΩ 0.6 0.4 0.2 0 RSET = 25kΩ -0.2 -0.4 -0.6 1.0 -0.8 0 16 32 48 64 80 96 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -1.0 0 112 128 0.8 -0.8 -1.0 0 MAX1512 toc10 0.8 DIFFERENTIAL NON-LINEARITY (LSB) 6 1.0 INTEGRAL NON-LINEARITY (LSB) TOTAL UNADJUSTED ERROR (LSB) RSET = 25kΩ MAX1512 toc08 7 DIFFERENTIAL NONLINEARITY vs. DAC SETTING MAX1512 toc09 INTEGRAL NONLINEARITY vs. DAC SETTING TOTAL UNADJUSTED ERROR vs. DAC SETTING 16 32 48 64 80 96 112 128 0 16 32 48 DAC SETTING DAC SETTING AVDD POWER-UP RESPONSE 80 96 112 128 VDD POWER-UP RESPONSE MAX1512 toc11 COUT = 100pF 64 DAC SETTING MAX1512 toc12 VAVDD 10V/div COUT = 100pF 5V 0 VOUT 4V 10V VAVDD 0 VOUT 1V/div 0 VDD 2V/div 0 VDD 2V/div 0 40µs/div 40µs/div SINGLE LSB STEP-UP RESPONSE SINGLE LSB STEP-DOWN RESPONSE MAX1512 toc13 MAX1512 toc14 COUT = 100pF COUT = 100pF VOUT 5mV/div VOUT 5mV/div 40µs/div 2V VCTL 2V VCTL 0 0 40µs/div _______________________________________________________________________________________ 5 MAX1512 Typical Operating Characteristics (continued) (Circuit of Figure 1, VDD = 3V, VAVDD = 10V, VOUT = 5V, RSET = 24.9kΩ, TA = +25°C, DAC half scale, unless otherwise noted.) EEPROM-Programmable TFT VCOM Calibrator MAX1512 Pin Description PIN NAME FUNCTION 1 OUT Adjustable Sink-Current Output. OUT connects to the resistive voltage-divider between AVDD and GND that sets the VCOM voltage. IOUT lowers the divider voltage by an adjustable amount. See the SET pin description. 2 AVDD 3 N.C. 4 GND Ground 5 VDD Supply Input. +2.6V to +3.6V input range. 6 CTL VCOM Adjustment and EEPROM Programming Control. CTL sets the internal DAC code and programs the EEPROM. A pulse-control method is used to adjust the VCOM level. See the VCOM Adjustment (CTL) section. To program the DAC setting into the EEPROM as the power-on default, drive CTL to the EEPROM programming voltage using the correct timing and voltage ramp rates. See the EEPROM Programming (CTL) section. 7 CE Control Interface Enable. Connect CE to VDD to enable the CTL input. Connect CE to GND to disable the CTL input and reduce the supply current. 8 SET High-Voltage Analog Supply. Connects to the panel source-driver supply rail. No Connect. Not internally connected. Full-Scale Sink-Current Adjustment Input. Connect a resistor, RSET, from SET to GND to set the full-scale adjustable sink current. The full-scale adjustable sink current is equal to: VAVDD 20 × R SET IOUT is equal to the current through RSET. Detailed Description The MAX1512 is a solid-state alternative to mechanical potentiometers used for adjusting the LCD backplane voltage (VCOM) in TFT LCD displays. The MAX1512 attaches to an external resistive voltage-divider and sinks a programmable current (IOUT), which sets the VCOM level (Figure 1). An internal 7-bit DAC controls the sink current and allows the user to increase or decrease the VCOM level (Figure 2). The DAC is ratiometric relative to AVDD and is monotonic over all operating conditions. The user can store the DAC setting in an internal EEPROM. On power-up, the EEPROM presets the DAC to the last stored setting. The single-wire interface between the LCD panel and the programming circuit adjusts the DAC, programs the EEPROM, and provides programming power. The resistive voltage-divider and the AVDD supply set the maximum value of VCOM. The MAX1512 sinks current from the voltage-divider to reduce the VCOM level. The external resistor RSET sets the full-scale sink current and the minimum value of VCOM. 6 VDD 3V AVDD 10V VDD AVDD CE R1 200kΩ MAX1512 OUT R2 245kΩ CTL SET GND RSET 25kΩ Figure 1. Standard Application Circuit _______________________________________________________________________________________ VCOM 5V EEPROM-Programmable TFT VCOM Calibrator MAX1512 VDD AVDD VDD AVDD 19R R1 CE CTL CTL CONTROL INTERFACE DAC OUT R VCOM 7 R2 SET EEPROM 7 RSET MAX1512 GND Figure 2. Simplified Functional Diagram Setting the VCOM Adjustment Range (RSET) The external resistive voltage-divider sets the maximum value of the VCOM adjustment range. RSET sets the full-scale sink current, IOUT, which determines the minimum value of the VCOM adjustment range. Large RSET values increase resolution but decrease the VCOM adjustment range. Calculate R1, R2, and RSET using the following procedure: 1) Choose the maximum VCOM level (VMAX), the minimum VCOM level (V MIN), and the AVDD supply voltage (VAVDD). 2) Calculate the R1 / R2 ratio: RSET (VMAX -VMIN ) VMAX × 20 (VMAX -VMIN ) 127 A complete design example is given below: 1) VMAX = 5V, VMIN = 3V, VAVDD = 10V 3) 3) Calculate the R1 / RSET ratio: ≅ Re solution = 2) R1 V ≅ AVDD - 1 R2 VMAX R1 4) Choose RSET according to the limits shown in the Electrical Characteristics section and calculate the values for R1 and R2. 5) The resulting resolution is: 10 R1 ≅ - 1 =1 5 R2 R1 RSET = 20 × (5 - 3) = 8 5 4) If R SET = 24.9kΩ, then R1 = 200kΩ and R2 = 200kΩ 5) Resolution = 15.75mV _______________________________________________________________________________________ 7 MAX1512 EEPROM-Programmable TFT VCOM Calibrator MECHANICAL POTENTIOMETER MAX1512 EQUIVALENT CIRCUIT AVDD AVDD Ra AVDD Rb R1 VCOM MAX1512 Rc OUT SET R1 = Ra R2 = Rb + Rc Ra × (Rb + Rc) RSET = 20 × Rb R2 VCOM RSET Figure 3. Replacement of Mechanical/Potentiometer Circuit MECHANICAL POTENTIOMETER MAX1512 EQUIVALENT CIRCUIT AVDD AVDD Rd AVDD Re R1 VCOM MAX1512 OUT SET Rf R1 = Rd R2 = Rf Rd × (Rd + Re + Rf) RSET = 20 × Re R2 VCOM RSET Figure 4. Replacement of Mechanical/Potentiometer Circuit Translating Existing Potentiometer Circuits Existing VCOM adjustment circuits using conventional mechanical potentiometers can be translated into MAX1512 circuits. Figures 3 and 4 show two common adjustment circuits and their equivalent MAX1512 circuits. 8 Interface Enable/Disable (CE) The MAX1512 control interface can be disabled to reduce the VDD supply current. Connect CE to GND to reduce the typical supply current from 32µA to 12µA. Connect CE to VDD to enable the control interface. _______________________________________________________________________________________ EEPROM-Programmable TFT VCOM Calibrator CE RCE PROGRAMMING CIRCUIT MAX1512 VCOM Adjustment (CTL) Pulse CTL low for more than 200µs to increment the DAC setting, which increases the OUT sink current and lowers the VCOM level by 1 least-significant bit (LSB) (Figure 6). Similarly, pulse CTL high for more than 200µs to decrement the DAC setting, which decreases the OUT sink current and increases the VCOM level by 1 LSB. CTL GND Figure 5. Optional Circuit to Drive CE >1ms >200µs >200µs >200µs >10µs >200µs <20µs <20µs CTL HIGH VCOM UP CTL VDD/2 CTL LOW FIRST COUNT IGNORED VCOM DOWN SHORT COUNTS IGNORED CTL ENABLED CE / VDD DAC SETTING UNDEFINED 64 65 64 63 VCOM Figure 6. VCOM Adjustment _______________________________________________________________________________________ 9 MAX1512 The programming circuit in Figure 5 drives CE high to enable the CTL input when it is connected. When the programming circuit is not connected, CE is pulled low through resistor RCE, which disables the CTL input. The CTL input is relatively immune to noise and brief voltage transients. It can be safely left continuously enabled if higher supply current is acceptable. VDD MAX1512 EEPROM-Programmable TFT VCOM Calibrator To avoid unintentional VCOM adjustment, the MAX1512 is guaranteed to reject CTL pulses shorter than 20µs. In addition, to avoid the possibility of a single false pulse caused by power-up sequencing between V DD and CTL, the very first pulse is ignored. CTL VOLTAGE VPP VDD / 2 0 T1 T2 T3 T4 TIME EEPROM Programming (CTL) To program the EEPROM, apply the EEPROM programming waveform through the CTL interface (Figure 7). The control interface delivers programming power and DAC adjustment commands on the same wire. This 1-wire approach minimizes the number of connections from the programming circuit to the LCD panel. To apply the EEPROM programming waveform, carefully ramp CTL from midscale (VDD / 2) to the programming voltage, VPP, in 7.5ms as shown in Figure 7. If the ramp is generated digitally, use at least 45 steps to achieve the required 320mV ramp resolution. During the ramp time, VCOM adjustment is disabled and the EEPROM cells are biased in preparation for programming. After reaching V PP , hold CTL at V PP for 1ms. During the EFPROM program time, the EEPROM stores the DAC setting. Next, drive CTL to ground in less than 1ms and hold for at least 200µs. Finally, drive CTL to VDD / 2 to complete the write cycle. The EEPROM is factory set to half scale. Follow the EEPROM Programming Specifications in Table 1 to guarantee reliable EEPROM programming. Violating the specifications can damage the EEPROM or affect data retention. A complete evaluation kit is available to simplify evaluation and production development. Figure 7. EEPROM Programming Table 1. EEPROM Programming Specifications PARAMETER SYMBOL MIN TYP MAX CTL Programming Voltage VPP 15.25 15.5 15.75 V CTL Programming Ramp T1 7.0 7.5 8.0 ms EEPROM Program Time T2 0.9 1.0 1.1 ms VPP Fall Time T3 10 1000 µs Done Hold Time T4 200 10 ______________________________________________________________________________________ UNITS µs EEPROM-Programmable TFT VCOM Calibrator The VCOM adjustment and the EEPROM programming must be performed with an external programming circuit. Refer to the MAX1512 evaluation kit for a complete programming circuit solution. Use a circuit similar to the conceptual diagram shown in Figure 8 to drive CTL. The accuracy of the programming voltage (VPP) is critical for proper MAX1512 data retention. The use of a comparator is recommended to verify the correct programming voltage has been reached. A complete design example of a CTL programming circuit is presented in the MAX1512 evaluation kit data sheet. Electrostatic Discharge (CTL) The CTL pin is exposed at the LCD panel connector and is subject to electrostatic discharge (ESD). Often an RC filter is used to improve an input’s resilience to ESD. If a filter is added between the LCD panel connector and CTL, ensure that the RC time constant is short enough to avoid interfering with CTL pulses or the EEPROM programming timing. An RC time constant less than 200µs does not interfere with EEPROM programming. USER INTERFACE µC Leakage Current (CTL) The CTL pin is internally biased to VDD / 2, but it is sensitive to leakage currents above 0.1µA. When CTL is not driven, avoid leakage currents around the CTL pin. Otherwise, reinforce the VDD / 2 set point with an external resistive voltage-divider. Layout Information Use the following guidelines for good layout: • Place the VCOM buffer and the R1/R2 voltagedivider close to the OUT pin (Figure 1). Keep the VCOM buffer and the R1/R2 voltage-divider close to each other. • Place RSET close to SET. In noisy environments, bypass capacitors may be desired on VDD and/or VAVDD. Keep any bypass capacitors close to the IC with short connections to the pins. Refer to the MAX1512 evaluation kit for an example of proper board layout. • 0 TO 15.5V DAC 0 TO 2.5V CTL MAX1512 REF VPP VERIFY Figure 8. Conceptual Programming Circuit ______________________________________________________________________________________ 11 MAX1512 Applications Information Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 6, 8, &10L, DFN THIN.EPS MAX1512 EEPROM-Programmable TFT VCOM Calibrator D N PIN 1 INDEX AREA E E2 DETAIL A CL CL L A L e e PACKAGE OUTLINE, 6, 8, 10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm 21-0137 NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY F 1 2 COMMON DIMENSIONS SYMBOL A MIN. 0.70 0.80 D 2.90 3.10 E 2.90 3.10 A1 L 0.00 0.05 k MAX. 0.40 0.20 0.25 MIN. A2 0.20 REF. PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b T633-1 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF T833-1 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF 2.00 REF [(N/2)-1] x e T1033-1 10 1.50±0.10 2.30±0.10 0.50 BSC MO229 / WEED-3 0.25±0.05 T1433-1 14 1.70±0.10 2.30±0.10 0.40 BSC ---- 0.20±0.03 2.40 REF T1433-2 14 1.70±0.10 2.30±0.10 0.40 BSC ---- 0.20±0.03 2.40 REF PACKAGE OUTLINE, 6, 8, 10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm 21-0137 F 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.