SP8402 Very Low Phase Noise Divider by 2N DS3738 - 2.1 March 1994 The SP8402 is a very low phase noise divider which divides by powers of two. The S0, S1, S2 data inputs select the division ratio in the range 21 to 28. Special circuits techniques have been used to reduce the phase noise considerably below that produced by standard dividers. The data inputs are CMOS or TTL compatible. The SP8402 is packaged in a 28 pin plastic SO package to be compatible with the SP8400 and SP8401 devices. FEATURES ■ Very low Phase Noise (Typically -155 to 160dBc/Hz at 1kHz offset) ■ Supply Voltage 5V N/C N/C N/C VCC +5V GND CLOCK INPUT CLOCK INPUT CLOCK INPUT CLOCK INPUT GND ABSOLUTE MAXIMUM RATINGS Supply Voltage Output Current Storage Temperature Range Maximum Clock Input Voltage 6.5V 20mA -55°C to +125°C 2.5V p-p VCC +5V VCC +5V N/C S0 1 2 3 4 28 27 26 25 5 6 7 8 24 23 22 21 9 10 11 12 20 19 18 17 13 14 16 15 N/C N/C N/C N/C N/C N/C N/C OUTPUT OUTPUT N/C VCC +5V N/C S2 S1 MP28 Fig.1 Pin connections - top view ORDERING INFORMATION SP8402 KG MPES (Commercial Grade) 0 –10 –20 –30 –40 (f) (dBc/Hz) –3dB –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 –160 –170 10 100 1k Frequency (Hz) 10k Fig.2 Typical single sideband phase noise measured at 768MHz 100k SP8400 ELECTRICAL CHARACTERISTICS Guaranteed over: Supply voltage VCC = +4.75V to +5.25V Temperature Tamb = -10°C to +75°C Tested at +4.75V and +5.25V at Tamb = +25°C Characteristic Value Pin 4, 11, 12, 18 20, 21 Supply current Output voltage swing Input sensitivity 200MHz to 1.5GHz Typ. Max. 82 320 92 410 7, 8 Data Inputs Logic high voltage Low low voltage Input current Units Min. 102 mA mV 140 (-4) mV dBm 0.8 180 V V µA 2.2 Conditions Output loaded with 300R See Fig.5 p-p @ 1.4GHz input ÷ 256 mode outputs loaded with 330R See Fig.5 RMS Sine wave into 50 Ohms (dBm equivalent) See Fig.3 5V Data input voltage 600 500 V in mV rms 400 355mV 300 OPERATING WINDOW 200 140mV 100 0 200 400 600 800 1000 FREQUENCY MHz 1200 1400 1600 Fig.3 Typical input sensitivity S0 S1 S2 DIVISION RATIO L H L H L H L H L L H H L L H H L L L L H H H H 2 4 8 16 32 64 128 256 Fig.4 Truth table 2 SP8400 VCC 1nF 1 28 2 27 3 26 4 25 5 24 6 23 7 8 50R RF SIGNAL GENERATOR TTL/CMOS MODULUS CONTROL 22 SP8402 220nF OUTPUT 21 9 20 10 19 11 18 12 17 13 16 14 15 50R 1nF 10nF 1nF 10nF 2x330R Fig.5 Test circuit 3 SP8400 +5V 10 F 1nF CLOCK INPUT 1 28 2 27 3 26 4 25 5 24 6 23 7 8 50R S0 OUTPUT 22 SP8402 21 9 20 10 19 11 18 12 17 13 16 14 15 S1 S2 1nF 10nF 1nF 10nF 10nF 2x330R Fig.5 Typical application combining output to increase signal and retain low phase noise 4 http://www.mitelsemi.com World Headquarters - Canada Tel: +1 (613) 592 2122 Fax: +1 (613) 592 6909 North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. 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