DISCRETE SEMICONDUCTORS DATA SHEET BSP255 P-channel enhancement mode vertical D-MOS transistor Product specification Supersedes data of 1996 Jun 13 File under Discrete Semiconductors, SC07 1996 Aug 05 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 FEATURES PINNING - SOT223 • Direct interface to C-MOS, TTL etc PIN SYMBOL • Low threshold voltage DESCRIPTION 1 g gate • High speed switching 2 d drain • No secondary breakdown. 3 s source 4 d drain APPLICATIONS • Line current interrupter in telephone sets • Relay, high speed and line transformer drivers. 4 handbook, halfpage d DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a 4-pin plastic SOT223 SMD package. g 1 CAUTION 2 3 Top view s MAM121 The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. − MAX. −300 UNIT VDS drain-source voltage (DC) VSD source-drain diode forward voltage VGS gate-source voltage (DC) VGSth gate-source threshold voltage ID = −1 mA; VDS = VGS ID drain current (DC) Ts = 100 °C − −325 mA RDSon drain-source on-state resistance ID = −160 mA; VGS = −10 V − 17 Ω Ptot total power dissipation Ts = 100 °C − 4 W 1996 Aug 05 IS = −0.5 A 2 V − −1.8 V − ±20 V −0.8 −2 V Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) − −300 V VGS gate-source voltage (DC) − ±20 V ID drain current (DC) Ts = 100 °C; note 1 − −325 mA IDM peak drain current note 2 − −1.3 A Ptot total power dissipation Ts = 100 °C − 4 W Tstg storage temperature −65 +150 °C Tj operating junction temperature −65 +150 °C Source-drain diode IS source current (DC) Ts = 100 °C − −0.5 A ISM peak pulsed source current note 2 − −2 A Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. MBH446 10 Ptot (W) MBH445 −10 handbook, halfpage handbook, halfpage ID (A) 8 −1 (1) tp = 10 µs 6 100 µs −10−1 4 tp δ= T P DC 1 ms 10 ms −10−2 2 t tp T −10−3 0 0 50 100 150 Ts (oC) 200 −1 −10 −102 δ = 0.01; TS = 100 °C. (1) RDSon limitation. Fig.2 Power derating curve. 1996 Aug 05 Fig.3 DC SOAR. 3 VDS (V) −103 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT 12 K/W thermal resistance from junction to soldering point Rth j-s MBH444 2 10full handbook, pagewidth Rth j-s (K/W) δ= 0.75 10 0.5 0.33 0.2 0.1 1 0.05 tp δ= T P 0.02 0.01 0 t tp T 10−1 10−6 Fig.4 10−5 10−4 10−3 10−2 10−1 t p (s) 1 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values. 1996 Aug 05 4 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. −300 TYP. − MAX. − UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = −10 µA VGSth gate-source threshold voltage VGS = VDS ; ID = −1 mA −0.8 − −2 V IDSS drain-source leakage current VGS = 0; VDS = −240 V − − −100 nA IGSS gate leakage current VGS = ±20 V; VDS = 0 − − ±100 nA RDSon drain-source on-state resistance VGS = −10 V; ID = −160 mA − − 17 Ω VGS = −4.5 V; ID = −80 mA − − 20 Ω VGS = −2.8 V; ID = −50 mA − − 25 Ω V Ciss input capacitance VGS = 0; VDS = −50 V; f = 1 MHz − 45 − pF Coss output capacitance VGS = 0; VDS = −50 V; f = 1 MHz − 15 − pF Crss reverse transfer capacitance VGS = 0; VDS = −50 V; f = 1 MHz − 3 − pF Qg total gate charge VGS = −10 V; VDD = −50 V; ID = −160 mA; Tamb = 25 °C − 2.3 − nC Qgs gate-source charge VGS = −10 V; VDD = −50 V; ID = −160 mA; Tamb = 25 °C − 0.1 − nC Qgd gate-drain charge VGS = −10 V; VDD = −50 V; ID = −160 mA; Tamb = 25 °C − 0.7 − nC VGS = 0 to −10 V; VDD = −50 V; ID = −160 mA; Rgen = 50 Ω − 2.4 − ns − 1.6 − ns − 4 − ns − 13 − ns − 12 − ns − 25 − ns − − −1.8 V Switching times (see Fig.11) td(on) turn-on delay time tr rise time ton turn-on switching time td(off) turn-off delay time tf fall time toff turn-off switching time VGS = −10 to 0 V; VDD = −50 V; ID = −160 mA; Rgen = 50 Ω Source-drain diode VSD source-drain forward voltage 1996 Aug 05 VGD = 0; IS = −0.5 A 5 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 MBH443 −10 MBH441 −800 handbook, halfpage handbook, halfpage VGS VGS = −10 V ID (mA) (V) −8 −600 −4.5 V −4.0 V −6 −400 −3.5 V −4 −3.0 V −200 −2 −2.5 V −2.0 V 0 0 0.5 1.0 1.5 0 2.0 2.5 Qg (nC) −2 0 −4 −6 −8 −10 −12 VDS (V) VDD = −50 V: ID = −180 mA. Tj = 25 °C. Fig.5 Gate-source voltage as a function of total gate charge; typical values. Fig.6 Output characteristics; typical values. MBH440 −800 MBH436 −2.5 handbook, halfpage handbook, halfpage ID (mA) ISD (A) −2.0 −600 −1.5 −400 −1.0 (1) −200 (2) (3) −0.5 0 0 −2 −4 −6 0 −8 −10 VGS (V) 0 −0.4 −0.8 −1.2 −2.0 −1.6 VSD (V) VGD = 0. (1) Tj = 150 °C. (2) Tj = 25 °C. (3) Tj = −65 °C. VDS = −10 V; Tj = 25 °C. Fig.8 Fig.7 Transfer characteristics; typical values. 1996 Aug 05 6 Source-drain current as a function of source-drain diode forward voltage; typical values. Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 handbook, halfpage MBH437 102 MBH442 160 handbook, halfpage C (pF) RDSon (Ω) 120 (1) (2) (3) (4) (5) 80 Ciss 40 10 −2 0 −4 VDS ≥ ID × RDSon; Tj = 25 °C. (1) ID = −10 mA. (2) ID = −50 mA. Fig.9 0 −8 −10 VGS (V) −6 (3) (4) ID = −80 mA. ID = −160 mA. (5) ID = −325 mA. 0 0 −VDD −10 −20 −30 −40 −50 VDS (V) VGS = 0; f = 1 MHz; Tj = 25 °C. Drain source on-state resistance as a function of gate-source voltage; typical values. handbook, full pagewidth Coss Crss Fig.10 Capacitance as a function of drain-source voltage; typical values. 10 % Vin 90 % RL Vout 0 10 % 10 % Vout Vin 90 % 90 % td(off) td(on) tr ton tf toff Fig.11 Switching time test circuit and input and output waveforms. 1996 Aug 05 7 MGD391 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 MBH438 MBH439 1.4 2.4 handbook, halfpage handbook, halfpage k k 2.0 1.2 (1) (2) 1.6 1.0 1.2 0.8 0.8 0.6 −75 −25 25 75 0.4 −75 125 175 Tj (°C) 25 75 125 175 Tj (°C) R DSon at T j k = ---------------------------------------R DSon at 25 °C V GSth at T j k = ------------------------------------V GSth at 25°C (1) VGS = −4.5 V; ID = −80 mA. (2) VGS = −2.8 V; ID = −50 mA. VGSth at VDS =VGS ; ID = −1 mA. Fig.12 Temperature coefficient of gate-source threshold voltage as a function of junction temperature; typical values. 1996 Aug 05 −25 Fig.13 Temperature coefficient of drain-source on-state resistance as a function of junction temperature; typical values. 8 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 PACKAGE OUTLINE Plastic surface mounted package; collector pad for good heat transfer; 4 leads D SOT223 E B A X c y HE v M A b1 4 Q A A1 1 2 3 Lp bp e1 w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y mm 1.8 1.5 0.10 0.01 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 4.6 2.3 7.3 6.7 1.1 0.7 0.95 0.85 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 96-11-11 97-02-28 SOT223 1996 Aug 05 EUROPEAN PROJECTION 9 Philips Semiconductors Product specification P-channel enhancement mode vertical D-MOS transistor BSP255 DEFINITIONS Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1996 Aug 05 10