PROFET®
BTS721L1
Smart Four Channel Highside Power Switch
Features
• Overload protection
• Current limitation
• Short-circuit protection
• Thermal shutdown
• Overvoltage protection
(including load dump)
• Fast demagnetization of inductive loads
• Reverse battery protection1)
• Undervoltage and overvoltage shutdown
with auto-restart and hysteresis
• Open drain diagnostic output
• Open load detection in ON-state
• CMOS compatible input
• Loss of ground and loss of Vbb protection
• Electrostatic discharge (ESD) protection
Product Summary
Overvoltage Protection
Operating voltage
active channels:
On-state resistance RON
Nominal load current IL(NOM)
Current limitation
IL(SCr)
Vbb(AZ)
43
V
Vbb(on)
5.0 ... 34
V
two parallel four parallel
one
100
50
25
mΩ
2.9
4.3
6.3
A
8
8
8
A
P-DSO-20
Application
• µC compatible power switch with diagnostic feedback
for 12 V and 24 V DC grounded loads
• All types of resistive, inductive and capacitive loads
• Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions.
Pin Definitions and Functions
Pin
1,10,
11,12,
15,16,
19,20
3
5
7
9
18
17
14
13
4
8
2
6
1)
Symbol Function
Vbb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 4 and also for low
thermal resistance
IN1
Input 1 .. 4, activates channel 1 .. 4 in case of
IN2
logic high signal
IN3
IN4
OUT1
Output 1 .. 4, protected high-side power output
OUT2
of channel 1 .. 4. Design the wiring for the
OUT3
max. short circuit current
OUT4
ST1/2
Diagnostic feedback 1/2 of channel 1 and
channel 2, open drain, low on failure
ST3/4
Diagnostic feedback 3/4 of channel 3 and
channel 4, open drain, low on failure
GND1/2 Ground 1/2 of chip 1 (channel 1 and channel 2)
GND3/4 Ground 3/4 of chip 2 (channel 3 and channel 4)
Pin configuration (top view)
Vbb
GND1/2
IN1
ST1/2
IN2
GND3/4
IN3
ST3/4
IN4
Vbb
1
2
3
4
5
6
7
8
9
10
•
20
19
18
17
16
15
14
13
12
11
Vbb
Vbb
OUT1
OUT2
Vbb
Vbb
OUT3
OUT4
Vbb
Vbb
With external current limit (e.g. resistor RGND=150 Ω) in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.
Semiconductor Group
1 of 15
2003-Oct-01
BTS721L1
Block diagram
Four Channels; Open Load detection in on state;
Voltage
source
Overvoltage
protection
Current
limit 1
+ V bb
Gate 1
protection
V Logic
3
IN1
5
IN2
4
ST1/2
Voltage
Level shifter
sensor
Rectifier 1
Logic
ESD
Signal GND
Chip 1
Current
limit 2
Level shifter
Rectifier 2
GND1/2
OUT1
18
Temperature
sensor 1
Open load
Short to Vbb
detection 1
Charge
pump 1
Charge
pump 2
2
Limit for
unclamped
ind. loads 1
Leadframe
Channel 1
Gate 2
protection
Limit for
unclamped
ind. loads 2
Open load
Short to Vbb
detection 2
Chip 1
Channel 2
OUT2
17
Load
Temperature
sensor 2
R
R
O1
O2
GND1/2
Load GND
+ V bb
Leadframe
Channel 3
OUT3
Logic and protection circuit of chip 2
14
(equivalent to chip 1)
7
IN3
9
IN4
8
ST3/4
Channel 4
OUT4
6
Load
GND3/4
PROFET
Signal GND
Chip 2
13
R
Chip 2
R
O3
O4
GND3/4
Load GND
Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20
Semiconductor Group
2
2003-Oct-01
BTS721L1
Maximum Ratings at Tj = 25°C unless otherwise specified
Parameter
Symbol
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection
Tj,start = -40 ...+150°C
Load current (Short-circuit current, see page 5)
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V
RI3) = 2 Ω, td = 200 ms; IN = low or high,
each channel loaded with RL = 4.7 Ω,
Operating temperature range
Storage temperature range
Power dissipation (DC)5
Ta = 25°C:
(all channels active)
Ta = 85°C:
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C5),
one channel:
IL = 2.9 A, ZL = 58 mH, 0 Ω
IL = 4.3 A, ZL = 58 mH, 0 Ω
two parallel channels:
IL = 6.3 A, ZL = 58 mH, 0 Ω
four parallel channels:
Vbb
Vbb
Values
Unit
43
34
V
V
self-limited
60
A
V
Tj
Tstg
Ptot
-40 ...+150
-55 ...+150
3.7
1.9
°C
EAS
0.3
0.65
1.5
J
VESD
1.0
kV
-10 ... +16
±2.0
±5.0
V
mA
15
41
34
K/W
IL
VLoad
4)
dump
W
see diagrams on page 9 and page 10
Electrostatic discharge capability (ESD)
(Human Body Model)
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
VIN
IIN
IST
see internal circuit diagram page 8
Thermal resistance
junction - soldering point5),6)
junction - ambient5)
2)
3)
4)
5)
6)
each channel:
one channel active:
all channels active:
Rthjs
Rthja
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for input
protection is integrated.
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
Soldering point: upper side of solder edge of device pin 15. See page 15
Semiconductor Group
3
2003-Oct-01
BTS721L1
Electrical Characteristics
Parameter and Conditions, each of the four channels
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT)
IL = 2 A
each channel,
Tj = 25°C: RON
Tj = 150°C:
two parallel channels, Tj = 25°C:
four parallel channels, Tj = 25°C:
Nominal load current
one channel active:
two parallel channels active:
four parallel channels active:
5)
Device on PCB , Ta = 85°C, Tj ≤ 150°C
Output current while GND disconnected or pulled
up; Vbb = 30 V, VIN = 0, see diagram page 9
Turn-on time
to 90% VOUT:
Turn-off time
to 10% VOUT:
RL = 12 Ω, Tj =-40...+150°C
Slew rate on
10 to 30% VOUT, RL = 12 Ω,
Tj =-40...+150°C:
Slew rate off
70 to 40% VOUT, RL = 12 Ω,
Tj =-40...+150°C:
Operating Parameters
Operating voltage7)
Undervoltage shutdown
Undervoltage restart
Tj =-40...+150°C:
Tj =-40...+150°C:
Tj =-40...+25°C:
Tj =+150°C:
Undervoltage restart of charge pump
see diagram page 14
Tj =-40...+150°C:
Undervoltage hysteresis
∆Vbb(under) = Vbb(u rst) - Vbb(under)
Overvoltage shutdown
Tj =-40...+150°C:
Overvoltage restart
Tj =-40...+150°C:
Overvoltage hysteresis
Tj =-40...+150°C:
8
)
Overvoltage protection
Tj =-40...+150°C:
I bb = 40 mA
Standby current, all channels off
Tj =25°C:
VIN = 0
Tj =150°C:
7)
8)
Values
min
typ
max
--
Unit
mΩ
85
170
100
200
2.5
3.8
5.9
43
22
2.9
4.3
6.3
50
25
--
A
--
--
10
mA
ton
toff
80
80
200
200
400
400
µs
dV/dton
0.1
--
1
V/µs
-dV/dtoff
0.1
--
1
V/µs
Vbb(on)
Vbb(under)
Vbb(u rst)
5.0
3.5
--
----
V
V
V
Vbb(ucp)
--
5.6
34
5.0
5.0
7.0
7.0
∆Vbb(under)
--
0.2
--
V
Vbb(over)
Vbb(o rst)
∆Vbb(over)
Vbb(AZ)
34
33
-42
--0.5
47
43
----
V
V
V
V
---
28
44
60
70
µA
IL(NOM)
IL(GNDhigh)
Ibb(off)
V
At supply voltage increase up to Vbb = 5.6 V typ without charge pump, VOUT ≈Vbb - 2 V
see also VON(CL) in circuit diagram on page 8.
Semiconductor Group
4
2003-Oct-01
BTS721L1
Parameter and Conditions, each of the four channels
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Unit
--
--
12
µA
---
2
8
3
12
mA
each channel, Tj =-40°C: IL(SCp)
11
18
25
9
14
22
Tj =25°C:
5
8
14
Tj =+150°C:
two parallel channels
twice the current of one channel
four parallel channels
four times the current of one channel
Repetitive short circuit current limit,
Tj = Tjt
each channel IL(SCr)
-8
--8
-two parallel channels
-8
-four parallel channels
A
Leakage output current (included in Ibb(off))
IL(off)
VIN = 0
Operating current 9), VIN = 5V, Tj =-40...+150°C
IGND = IGND1/2 + IGND3/4,
one channel on: IGND
four channels on:
Protection Functions10)
Initial peak short circuit current limit, (see timing
diagrams, page 12)
A
(see timing diagrams, page 12)
Initial short circuit shutdown time
Tj,start =-40°C: toff(SC)
Tj,start = 25°C:
---
3.8
3
---
ms
--
47
--
V
150
--
-10
---
°C
K
---
-610
32
--
V
mV
(see page 12 and timing diagrams on page 12)
Output clamp (inductive load switch off)11)
at VON(CL) = Vbb - VOUT
Thermal overload trip temperature
Thermal hysteresis
VON(CL)
Tjt
∆Tjt
Reverse Battery
Reverse battery voltage 12)
Drain-source diode voltage (Vout > Vbb)
IL = - 2.9 A, Tj = +150°C
-Vbb
-VON
9)
Add IST, if IST > 0
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
11) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
VON(CL)
12) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 3 and circuit page 8).
10)
Semiconductor Group
5
2003-Oct-01
BTS721L1
Parameter and Conditions, each of the four channels
Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Diagnostic Characteristics
Open load detection current, (on-condition)
20
-400
each channel, Tj = -40°C: I L (OL)
20
-300
Tj = 25°C:
20
-300
Tj = 150°C:
twice the current of one channel
two parallel channels
four times the current of one channel
four parallel channels
13
)
Open load detection voltage
Tj =-40..+150°C: VOUT(OL)
2
3
4
Internal output pull down
(OUT to GND), VOUT = 5 V
Tj =-40..+150°C: RO
4
10
30
1
Input and Status Feedback14)
Input resistance
(see circuit page 8)
Unit
mA
V
kΩ
RI
2.5
3.5
6
kΩ
VIN(T+)
1.7
--
3.5
V
VIN(T-)
1.5
--
--
V
-1
0.5
--
-50
V
µA
20
50
90
µA
td(ST OL4)
100
320
800
µs
td(ST OL5)
--
5
20
µs
td(ST)
--
200
600
µs
5.4
---
6.1
---
-0.4
0.6
V
Tj =-40..+150°C:
Input turn-on threshold voltage
Tj =-40..+150°C:
Input turn-off threshold voltage
Tj =-40..+150°C:
Input threshold hysteresis
Off state input current
VIN = 0.4 V:
Tj =-40..+150°C:
On state input current
VIN = 5 V:
Tj =-40..+150°C:
Delay time for status with open load after switch
off (other channel in off state)
(see timing diagrams, page 14),
Tj =-40..+150°C:
Delay time for status with open load after switch
off (other channel in on state)
(see timing diagrams, page 14),
Tj =-40..+150°C:
Status invalid after positive input slope
(open load)
Tj =-40..+150°C:
Status output (open drain)
Zener limit voltage Tj =-40...+150°C, IST = +1.6 mA:
ST low voltage
Tj =-40...+25°C, IST = +1.6 mA:
Tj = +150°C, IST = +1.6 mA:
13)
14)
∆ VIN(T)
IIN(off)
IIN(on)
VST(high)
VST(low)
External pull up resistor required for open load detection in off state.
If ground resistors RGND are used, add the voltage drop across these resistors.
Semiconductor Group
6
2003-Oct-01
BTS721L1
Truth Table
Channel 1 and 2
Channel 3 and 4
(equivalent to channel 1 and 2)
IN1
IN3
Chip 1
Chip 2
IN2
IN4
OUT1
OUT3
OUT2
OUT4
ST1/2
ST3/4
BTS 721L1
Normal operation
Open load
Channel 1 (3)
Channel 2 (4)
Short circuit to Vbb
Channel 1 (3)
Channel 2 (4)
Overtemperature
both channel
Channel 1 (3)
Channel 2 (4)
Undervoltage/ Overvoltage
L = "Low" Level
H = "High" Level
L
L
H
H
L
L
H
L
H
L
H
L
H
X
L
L
H
H
Z
Z
H
L
H
L
H
L
H
X
L
H
X
L
L
H
L
L
H
L
H
X
L
H
X
H
H
H
Z
Z
H
L
H
X
L
H
X
L
X
H
L
H
X
X
X
L
L
H
L
H
X
X
X
L
H
X
L
H
X
L
L
L
L
L
X
X
L
H
H
H
L
L
L
X
X
L
L
L
H
H
H
H
H(L15))
H
L
H(L15))
H
L
L16)
H
H(L17))
L16)
H
H(L17))
H
L
L
H
L
H
L
H
X = don't care
Z = high impedance, potential depends on external circuit
Status signal valid after the time delay shown in the timing diagrams
Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and
outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4
have to be configured as a 'Wired OR' function with a single pull-up resistor.
Terms
V
Ibb
bb
V
ON1
V
ON2
Leadframe
I IN1
I IN2
I ST1/2
V
IN1 VIN2 VST1/2
3
5
4
Vbb
IN1
IN2
OUT1
PROFET
Chip 1
OUT2
ST1/2 GND1/2
I L1
17
I L2
I IN3
I IN4
I ST3/4
V
OUT1
2
R
18
I
GND1/2
VON3
V
ON4
Leadframe
V
IN3 VIN4 VST3/4
7
9
8
Vbb
IN3
IN4
OUT3
PROFET
Chip 2
ST3/4 GND3/4
R
I L3
13
I L4
V
OUT3
6
VOUT2
GND1/2
OUT4
14
I
GND3/4
VOUT4
GND3/4
Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20
External RGND optional; two resistors RGND1/2 ,RGND3/4 = 150 Ω or a single resistor RGND = 75 Ω for
reverse battery protection up to the max. operating voltage.
15)
With additional external pull up resistor
An external short of output to Vbb in the off state causes an internal current from output to ground. If RGND is
used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
17) Low resistance to V may be detected by no-load-detection
bb
16)
Semiconductor Group
7
2003-Oct-01
BTS721L1
Overvoltage protection of logic part
Input circuit (ESD protection), IN1...4
R
IN
GND1/2 or GND3/4
+ V bb
I
ESD-ZD I
I
V
RI
IN
Z2
IN
I
Logic
GND
ST
R ST
V
ESD zener diodes are not to be used as voltage clamp at
DC conditions. Operation in this mode may result in a drift of
the zener voltage (increase of up to 1 V).
Z1
GND
R GND
Signal GND
Status output, ST1/2 or ST3/4
VZ1 = 6.1 V typ., VZ2 = 47 V typ., RI = 3.5 kΩ typ.,
RGND = 150 Ω
+5V
R ST(ON)
Reverse battery protection
ST
± 5V
GND
ESDZD
R ST
IN
ESD-Zener diode: 6.1 V typ., max 5.0 mA; RST(ON) < 380 Ω
at 1.6 mA, ESD zener diodes are not to be used as voltage
clamp at DC conditions. Operation in this mode may result in
a drift of the zener voltage (increase of up to 1 V).
- Vbb
RI
Logic
ST
OUT
Power
Inverse
Diode
GND
RGND
Inductive and overvoltage output clamp,
Signal GND
OUT1...4
RL
Power GND
RGND = 150 Ω, RI = 3.5 kΩ typ,
+Vbb
Temperature protection is not active during inverse current
operation.
VZ
V ON
OUT
PROFET
Power GND
VON clamped to VON(CL) = 47 V typ.
Semiconductor Group
8
2003-Oct-01
BTS721L1
Open-load detection, OUT1...4
ON-state diagnostic condition:
VON < RON·IL(OL); IN high
GND disconnect with GND pull up
(channel 1/2 or 3/4)
+ V bb
V
Vbb
IN2
PROFET
ST
GND
OUT1
IN1
V
VON
ON
IN1
OUT2
IN2
OUT
Open load
detection
Logic
unit
V
V
bb
V
ST
GND
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND > 0, no VST = low signal available.
OFF-state diagnostic condition:
VOUT > 3 V typ.; IN low
Vbb disconnect with energized inductive
load
R
EXT
Vbb
IN2
PROFET
ST
GND
OUT1
high
OFF
V
Logic
unit
IN1
Open load
detection
R
OUT2
OUT
O
V
bb
Signal GND
For an inductive load current up to the limit defined by EAS
(max. ratings see page 3 and diagram on page 10) each
switch is protected against loss of Vbb.
GND disconnect
Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load the whole load
current flows through the GND connection.
(channel 1/2 or 3/4)
V
Ibb
bb
IN1
Vbb
IN2
PROFET
ST
GND
OUT1
OUT2
V
V
V
IN1 IN2 ST
V
GND
Any kind of load. In case of IN = high is VOUT ≈ VIN - VIN(T+).
Due to VGND > 0, no VST = low signal available.
Semiconductor Group
9
2003-Oct-01
BTS721L1
Inductive load switch-off energy
dissipation
E bb
E AS
IN
PROFET
=
ELoad
Vbb
OUT
L
ST
GND
ZL
{
R
EL
ER
L
Energy stored in load inductance:
2
EL = 1/2·L·I L
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)·iL(t) dt,
with an approximate solution for RL > 0 Ω:
EAS=
IL· L
(V + |VOUT(CL)|)
2·RL bb
ln (1+ |V
IL·RL
OUT(CL)|
)
Maximum allowable load inductance for
a single switch off (one channel)5)
L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω
L [mH]
10000
1000
100
10
1
1
2
3
4
5
6
7
8
IL [A]
Semiconductor Group
10
2003-Oct-01
BTS721L1
Typ. standby current
Typ. on-state resistance
RON = f (Vbb,Tj ); IL = 2 A, IN = high
Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1...4 = low
RON [mOhm]
300
Ibb(off) [µA]
60
50
250
200
40
Tj = 150°C
150
30
85°C
25°C
100
20
-40°C
50
10
0
0
10
20
30
0
-50
40
0
50
100
150
Tj [°C]
Vbb [V]
Typ. initial short circuit shutdown time
Typ. open load detection current
IL(OL) = f (Vbb,Tj ); IN = high
toff(SC) = f (Tj,start ); Vbb =12 V
IL(OL) [mA]
220
toff(SC) [msec]
4
200
-40°C
no-load detection not specified
for V bb < 6 V
180
160
140
120
100
80
60
200
3.5
3
25°C
2.5
2
85°C
Tj = 150°C
1.5
1
40
0.5
20
0
0
5
10
15
20
25
30
Vbb [V]
Semiconductor Group
11
0
-50
0
50
100
150
200
Tj,start [°C]
2003-Oct-01
BTS721L1
Timing diagrams
Timing diagrams are shown for chip 1 (channel 1/2). For chip 2 (channel 3/4) the diagrams
are valid too. The channels 1 and 2, respectively 3 and 4, are symmetric and consequently
the diagrams are valid for each channel as well as for permuted channels
Figure 2b: Switching an inductive load
Figure 1a: Vbb turn on:
IN1
IN
IN2
V bb
t d(ST)
ST
*)
V
V
OUT1
V
OUT
OUT2
IL
I L(OL)
ST open drain
t
t
*) if the time constant of load is too large, open-load-status may
occur
Figure 2a: Switching a lamp:
Figure 3a: Turn on into short circuit:
shut down by overtemperature, restart by cooling
IN
IN1
other channel: normal operation
ST
I
V
L1
OUT
I
L(SCp)
I
I
L(SCr)
L
ST
t off(SC)
t
t
The initial peak current should be limited by the lamp and not by
the initial short circuit current IL(SCp) = 14 A typ. of the device.
Semiconductor Group
12
Heating up of the chip may require several milliseconds, depending
on external conditions (toff(SC) vs. Tj,start see page 12)
2003-Oct-01
BTS721L1
Figure 5a: Open load: detection in ON-state, open
load occurs in on-state
Figure 3b: Turn on into short circuit:
shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)
IN1
IN1/2
IN2
I
+I
L1
channel 2: normal operation
L2
I L(SCp)
VOUT1
I L(SCr)
channel 1:
open
load
IL1
t
ST1/2
off(SC)
t d(ST OL1)
open
load
normal
load
t d(ST OL2)
t d(ST OL1)
t d(ST OL2)
ST
t
t
td(ST OL1) = 30 µs typ., td(ST OL2) = 20 µs typ
Figure 5b: Open load: detection in ON-state, turn
on/off to open load
Figure 4a: Overtemperature:
Reset if Tj <Tjt
IN1
IN
IN2
channel 2: normal operation
ST
V
OUT1
V
OUT
I
L1
channel 1: open load
T
J
t
d(ST)
t
t
d(ST OL4)
t
d(ST)
t
d(ST OL5)
ST
t
The status delay time td(STOL4) allows to distinguish between the
failure modes "open load in ON-state" and "overtemperature".
Semiconductor Group
13
2003-Oct-01
BTS721L1
Figure 5c: Open load: detection in ON- and OFF-state
(with REXT), turn on/off to open load
VON(CL)
V on
IN1
off-state
V
OUT1
I L1
bb(u rst)
V
ST
t
t d(ST)
d(ST)
V
V
channel 1: open load
V
t d(ST OL5)
V
bb(over)
off-state
channel 2: normal operation
on-state
IN2
Figure 6b: Undervoltage restart of charge pump
bb(o rst)
bb(u cp)
bb(under)
V bb
t
IN = high, normal load conditions.
Charge pump starts at Vbb(ucp) = 5.6 V typ.
td(ST OL5) depends on external circuitry because of high
impedance
Figure 7a: Overvoltage:
Figure 6a: Undervoltage:
IN
IN
V
Vbb
bb
V
bb(under)
V ON(CL)
Vbb(over)
V bb(o rst)
Vbb(u cp)
Vbb(u rst)
V
OUT
V OUT
ST
ST open drain
t
t
Semiconductor Group
14
2003-Oct-01
BTS721L1
Package and Ordering Code
Standard P-DSO-20-9
BTS721L1
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.
Ordering Code
Q67060-S7002-A2
Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
All dimensions in millimetres
1) Does not include plastic or metal protrusions of 0.15 max per side
2) Does not include dambar protrusion of 0.05 max per side
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives worldwide
(see address list).
Definition of soldering point with temperature Ts:
upper side of solder edge of device pin 15.
Warnings
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system, or
to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.
Pin 15
Printed circuit board (FR4, 1.5mm thick, one layer
70µm, 6cm2 active heatsink area) as a reference for
max. power dissipation Ptot, nominal load current
IL(NOM) and thermal resistance Rthja
Semiconductor Group
15
2003-Oct-01