FAIRCHILD FDS8333C

FDS8333C
30V N & P-Channel PowerTrench MOSFETs
General Description
Features
These N & P-Channel MOSFETs are
produced using Fairchild Semiconductor’s
advanced PowerTrench process that has been
especially tailored to minimize on-state
resistance and yet maintain superior switching
performance.
•
Q1
4.1 A, 30V. RDS(ON) = 80 mΩ @ V GS = 10 V
RDS(ON) = 130 mΩ @ V GS = 4.5 V
•
Q2
–3.4 A, 30V. RDS(ON) = 130 mΩ @ V GS = –10 V
RDS(ON) = 200 mΩ @ V GS = –4.5 V
These devices are well suited for low voltage
and battery powered applications where low
in-line power loss and fast switching are
required.
•
Low gate charge
•
High performance trench technology for extremely
low RDS(ON).
•
High power and handling capability in a widely used
surface mount package.
DD2
DD2
D1
D
Q2
5
DD1
4
6
3
Q1
SO-8
Pin 1 SO-8
G2
S2 G
G1 S
S1 S
2
8
1
S
Absolute Maximum Ratings
Symbol
7
TA=25oC unless otherwise noted
Q1
Q2
Units
V DSS
Drain-Source Voltage
Parameter
30
–30
V
V GSS
Gate-Source Voltage
±16
±20
ID
Drain Current
4.1
–3.4
20
–20
PD
– Pulsed
Power Dissipation for Dual Operation
– Continuous
(Note 1a)
2
Power Dissipation for Single Operation
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
TJ , TSTG
A
W
0.9
–55 to +150
°C
(Note 1a)
78
°C/W
(Note 1)
40
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
RθJ C
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS8333C
FDS8333C
7’’
12mm
2500 units
2002 Fairchild Semiconductor Corporation
FDS8333C Rev C (W)
FDS8333C
August 2002
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ Max
Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
∆BV DSS
∆TJ
Breakdown Voltage Temperature
Coefficient
IDSS
Zero Gate Voltage Drain Current
IGSSF /IGSSR Gate–Body Leakage, Forward
IGSSF /IGSSR Gate–Body Leakage, Reverse
On Characteristics
Gate Threshold Voltage
∆V GS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
gFS
Q1
Q2
Q1
Q2
Q1
Q2
30
–30
V
25
–22
mV/°C
1
–1
±100
±100
µA
V
nA
nA
(Note 2)
V GS(th)
ID(on)
V GS = 0 V, ID = 250 µA
V GS = 0 V, ID = –250 µA
ID = 250 µA,Ref. to 25°C
ID = –250 µA,Ref. to 25°C
V DS = 24 V, V GS = 0 V
V DS = –24 V, V GS = 0 V
V GS = ± 16 V, V DS = 0 V
V GS = ± 20V , V DS = 0 V
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Q1
V DS = V GS , ID = 250 µA
1
1.7
3
Q2
V DS = V GS , ID = –250 µA
–1
Q1
–1.8
–4.2
3.7
67
81
103
105
167
147
–3
ID = 250 µA,Ref. To 25°C
Q1
ID = –250 µA,Ref. to 25°C
Q2
V GS = 10 V, ID = 4.1 A
V GS = 4.5 V, ID = 3.2 A
V GS = 10 V, ID = 4.1 A TJ =125°C
Q2
V GS = –10 V, ID = –3.4 A
V GS = – 4.5 V, ID = –2.5 A
V GS = –10V,ID = –3.4A, TJ =125°C
Q1
V GS = 10 V, V DS = 5 V
10
Q2
V GS = –10 V, V DS = –5 V
–5
Q1
V DS = 5 V
ID = 4.1 A
9
Q2
V DS = –5 V
ID = –3.4A
5
Q1
Q2
V DS=10 V, V GS = 0 V, f=1.0MHz
V DS=–10 V, V GS = 0 V, f=1.0MHz
282
Q1
V DS=10 V, V GS = 0 V, f=1.0MHz
49
Q2
V DS=–10 V, V GS = 0 V, f=1.0MHz
56
V DS=10 V, V GS = 0 V, f=1.0MHz
20
Q2
V DS=–10 V, V GS = 0 V, f=1.0MHz
26
Q1
V GS = 15 mV, f=1.0MHz
2.3
Q2
V GS =–15 mV, f=1.0MHz
–9.6
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
For Q1:
V DS =10 V, I DS= 1 A
V GS = 4.5 V, RGEN = 6 Ω
4.5
4.5
6
13
19
11
1.5
2
4.7
4.1
0.9
0.8
0.6
0.4
mV/°C
80
130
145
mΩ
130
200
220
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance Q1
RG
Gate Resistance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
pF
185
pF
pF
Ω
(Note 2)
For Q2:
V DS =–10 V, I DS= –1 A
V GS = –4.5 V, RGEN = 6 Ω
For Q1:
V DS =10 V, I DS= 4.1 A
V GS = 4.5 V, RGEN = 6 Ω
For Q2:
V DS =–10 V, I DS= –3.4 A
V GS = –4.5 V,
9
9
12
23
34
20
3
4
6.6
5.7
ns
ns
ns
ns
nC
nC
nC
FDS8333C Rev C (W)
FDS8333C
Electrical Characteristics
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ Max
Units
Drain–Source Diode Characteristics and Maximum Ratings
Drain–Source Diode Forward
Voltage
Q1
V GS = 0 V, IS = 1.3 A
(Note 2)
0.8
1.2
Q2
V GS = 0 V, IS = –1.3 A
(Note 2)
0.8
–1.2
trr
Diode Reverse Recovery
Time
Q1
Q2
IF = 4.1 A, diF/dt = 100 A/µs
IF = –3.4 A, diF/dt = 100 A/µs
16.3
14.5
nS
Qrr
Diode Reverse Recovery
Charge
Q1
Q2
IF = 4.1 A, diF/dt = 100 A/µs
IF = –3.4 A, diF/dt = 100 A/µs
26.7
21.1
nC
V SD
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
78°C/W when
mounted on a
0.5in2 pad of 2
oz copper
b)
125°C/W when
mounted on a
0.02 in2 pad of
2 oz copper
c)
135°C/W when
mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS8333C Rev C (W)
FDS8333C
Electrical Characteristics
FDS8333C
Typical Characteristics: N-Channel
10
2
V GS = 10V
V GS = 3.0V
6.0V
RDS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
4.5V
3.5V
ID, DRAIN CURRENT (A)
8
6
3.0V
4
2
0
1.8
1.6
3.5V
1.4
4.0V
4.5V
1.2
6.0V
10V
1
0.8
0
1
2
3
0
2
4
6
ID, DRAIN CURRENT (A)
V DS, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
0.25
ID = 4.1A
V GS = 10V
RDS(ON) , ON-RESISTANCE (OHM)
R DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
10
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
1.4
1.2
1
0.8
0.6
-50
ID = 2 A
0.2
0.15
T A = 125o C
0.1
o
T A = 25 C
0.05
-25
0
25
50
75
100
125
2
150
4
o
6
8
10
V GS, GATE TO SOURCE VOLTAGE (V)
T J , JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
10
o
TA =-55 C
8
V GS = 0V
25oC
IS, REVERSE DRAIN CURRENT (A)
V DS =5V
ID, DRAIN CURRENT (A)
8
125o C
6
4
2
0
10
o
T A = 125 C
1
o
25 C
0.1
o
-55 C
0.01
0.001
0.0001
1.5
2
2.5
3
3.5
V GS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
4
0.2
0.4
0.6
0.8
1
1.2
V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS8333C Rev C (W)
FDS8333C
Typical Characteristics: N-Channel (continued)
400
V DS = 5V
ID = 4.1A
f = 1MHz
V GS = 0 V
10V
8
15V
CAPACITANCE (pF)
V GS, GATE-SOURCE VOLTAGE (V)
10
6
4
2
300
CISS
200
100
COSS
CRSS
0
0
0
1
2
3
4
5
0
5
Q g, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
15
20
25
30
Figure 8. Capacitance Characteristics.
50
P(pk), PEAK TRANSIENT POWER (W)
100
RDS(ON) LIMIT
ID , DRAIN CURRENT (A)
10
VD S, DRAIN TO SOURCE VOLTAGE (V)
100µs
1ms
10
10ms
100ms
1
1s
10s
DC
VGS = 10V
SINGLE PULSE
RθJ A = 135o C/W
0.1
T A = 25o C
0.01
0.1
1
10
100
V DS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
SINGLE PULSE
Rθ JA = 135°C/W
T A = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
10
100
1000
t 1, TIME (sec)
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS8333C Rev C (W)
FDS8333C
Typical Characteristics: P-Channel
10
3
-6.0V
-I D, DRAIN CURRENT (A)
8
VGS = -3.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V GS = -10V
2.5
-4.5V
6
-4.0V
4
2
-4.0V
-4.5V
-5.0V
1.5
-3.5V
2
-6.0V
-10V
1
0.5
0
0
1
2
3
4
0
5
2
4
Figure 11. On-Region Characteristics.
10
0.4
ID = -3.4A
VGS =-10V
R DS(ON) , ON-RESISTANCE (OHM)
RDS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
8
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
1.4
1.2
1
0.8
ID = -1.7A
0.3
T A = 125o C
0.2
-50
-25
0
25
50
75
100
125
TA = 25o C
0.1
0.6
0
150
2
TJ , JUNCTION TEMPERATURE (oC)
Figure 13. On-Resistance Variation
withTemperature.
4
6
8
-V GS , GATE TO SOURCE VOLTAGE (V)
10
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
10
5
VGS = 0V
25o C
o
TA = -55 C
-IS, REVERSE DRAIN CURRENT (A)
VD S = -5V
-I D, DRAIN CURRENT (A)
6
-ID, DRAIN CURRENT (A)
-V DS, DRAIN-SOURCE VOLTAGE (V)
4
125oC
3
2
1
0
1
o
TA = 125 C
0.1
25o C
0.01
o
-55 C
0.001
0.0001
1.5
2.5
3.5
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 15. Transfer Characteristics.
4.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS8333C Rev C (W)
300
ID = -3.4A
f = 1MHz
VGS = 0 V
-10V
VD S = -5V
250
8
-15V
CAPACITANCE (pF)
-V GS, GATE-SOURCE VOLTAGE (V)
10
6
4
2
C ISS
200
150
COSS
100
50
CRSS
0
0
0
1
2
3
4
0
5
5
Figure 17. Gate Charge Characteristics.
20
25
30
50
P(pk), PEAK TRANSIENT POWER (W)
100µs
R DS(ON) LIMIT
10
1ms
10ms
100ms
1s
1
10s
VGS = -10V
SINGLE PULSE
RθJ A = 135o C/W
0.1
DC
T A = 25o C
0.01
0.1
1
10
100
SINGLE PULSE
Rθ JA = 135°C/W
T A = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
10
100
1000
t 1, TIME (sec)
-V DS, DRAIN-SOURCE VOLTAGE (V)
Figure 19. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
15
Figure 18. Capacitance Characteristics.
100
-I D, DRAIN CURRENT (A)
10
-V DS, DRAIN TO SOURCE VOLTAGE (V)
Q g, GATE CHARGE (nC)
Figure 20. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * R θJA
o
0.2
0.1
RθJA = 135 C/W
0.1
P(pk)
0.05
t1
0.02
0.01
0.001
0.0001
0.01
SINGLE PULSE
t2
TJ - T A = P * RθJA(t)
Duty Cycle, D = t1 / t 2
0.001
0.01
0.1
1
10
100
1000
t1 , TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS8333C Rev C (W)
FDS8333C
Typical Characteristics: P-Channel (continued)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
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Across the board. Around the world.™
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I1