FDC3512 80V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed. • 3.0 A, 80 V RDS(ON) = 77 mΩ @ VGS = 10 V RDS(ON) = 88 mΩ @ VGS = 6 V • High performance trench technology for extremely low RDS(ON) Applications • Low gate charge (13nC typ) • DC/DC converter • High power and current handling capability • Fast switching speed D D S SuperSOT TM-6 D D 6 2 5 3 4 G Absolute Maximum Ratings Symbol 1 TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 80 V VGSS Gate-Source Voltage ± 20 V ID Drain Current 3.0 A – Continuous (Note 1a) – Pulsed PD 20 Maximum Power Dissipation (Note 1a) (Note 1b) TJ, TSTG 1.6 W 0.8 –55 to +150 °C (Note 1a) 78 °C/W (Note 1) 30 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity .352 FDC3512 7’’ 8mm 3000 units 2002 Fairchild Semiconductor Corporation FDC3512 Rev B2 (W) FDC3512 February 2002 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2) W DSS Drain-Source Avalanche Energy IAR Drain-Source Avalanche Current Single Pulse, VDD = 40 V, ID=3.0 A 90 mJ 3.0 A Off Characteristics VGS = 0 V, ID = 250 µA BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = 64 V, VGS = 0 V IGSSF Gate–Body Leakage, Forward IGSSR Gate–Body Leakage, Reverse On Characteristics 80 ID = 250 µA, Referenced to 25°C V 80 mV/°C 1 µA VGS = 20 V, VDS = 0 V 100 nA VGS = –20 V, VDS = 0 V –100 nA 4 V (Note 2) VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C 2 2.4 VGS(th) ∆VGS(th) ∆TJ Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient RDS(on) Static Drain–Source On Resistance ID(on) On–State Drain Current VGS = 10 V, VGS = 6.0 V, VGS = 10 V, VGS = 10 V, gFS Forward Transconductance VDS = 10 V, ID = 3.0 A 14 VDS = 40 V, f = 1.0 MHz 634 pF 58 pF 28 pF ID = 3.0 A ID = 2.8 A ID = 3.0 A;TJ = 125°C VDS = 5 V –6 56 61 97 mV/°C 77 88 141 10 mΩ A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time V GS = 0 V, (Note 2) VDD = 40 V, VGS = 10 V, ID = 1 A, RGEN = 6 Ω 7 14 ns 3 6 ns ns td(off) Turn–Off Delay Time 24 28 tf Turn–Off Fall Time 4 8 ns Qg Total Gate Charge 13 18 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = 40 V, VGS = 10 V ID = 3.0 A, 2.4 nC 2.8 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 1.3 A Voltage IF = 3.0 A, Diode Reverse Recovery Time diF/dt = 300 A/µs Diode Reverse Recovery Charge (Note 2) 0.8 (Note 2) 28.2 48 1.3 A 1.2 V nS nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 2 78°C/W when mounted on a 1in pad of 2oz copper on FR-4 board. b. 156°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDC3512 Rev B2(W) FDC3512 Electrical Characteristics FDC3512 Typical Characteristics 1.8 VGS = 10V 5.0V 4.5V 6.0V ID, DRAIN CURRENT (A) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 20 15 4.0V 10 5 1.6 VGS = 4.0V 1.4 4.5V 5.0V 1.2 6.0V 0.8 0 0 1 2 3 4 0 5 5 Figure 1. On-Region Characteristics. 15 20 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.18 2.5 ID = 3.0A VGS =10V 2.2 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 10 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 1.9 1.6 1.3 1 0.7 0.4 -50 -25 0 25 50 75 100 125 150 ID = 1.5 A 0.14 TA = 125oC 0.1 TA = 25oC 0.06 0.02 175 2 o 4 TJ, JUNCTION TEMPERATURE ( C) 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 20 IS, REVERSE DRAIN CURRENT (A) VDS = 5V ID, DRAIN CURRENT (A) 10V 1 15 10 o TA = 125 C 5 25oC -55oC VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC3512 Rev B2(W) FDC3512 Typical Characteristics 1000 ID = 3.0A VDS = 20V f = 1MHz VGS = 0 V 40V 8 800 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 60V 6 4 2 CISS 600 400 200 COSS CRSS 0 0 0 3 6 9 12 15 0 20 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 80 50 RDS(ON) LIMIT P(pk), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 60 Figure 8. Capacitance Characteristics. 100 100µs 10 1ms 10ms 100ms 1s 1 10s DC VGS = 10V SINGLE PULSE o RθJA = 156 C/W 0.1 o TA = 25 C 0.01 0.1 1 10 SINGLE PULSE RθJA = 156°C/W TA = 25°C 40 30 20 10 0 0.001 100 0.01 VDS, DRAIN-SOURCE VOLTAGE (V) 0.1 1 10 100 1000 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 40 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 156°C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 0.01 0.001 0.0001 t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC3512 Rev B2(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4