19-3869; Rev 0; 10/05 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Features The MAX16008/MAX16009 are adjustable quad window voltage detectors in a small thin QFN package. These devices are designed to provide a higher level of system reliability by monitoring multiple supply voltages and providing a fault signal when any of the voltages exceed their overvoltage thresholds or fall below their undervoltage thresholds. ♦ Monitor Four Undervoltage/Overvoltage Conditions These devices offer user-adjustable thresholds that allow voltages to be monitored down to 0.4V. These devices allow the upper and lower trip thresholds of each window detector to be set externally with the use of three external resistors. Each monitored threshold has an independent opendrain output for signaling a fault condition. The outputs can be wire OR’ed together to provide a single fault output. The open-drain outputs are internally pulled up with a 30µA current, but can be externally driven to other voltage levels for interfacing to other logic levels. Both devices feature a margin input to disable the outputs during margin testing or any other time after power-up operations. The MAX16009 offers a reset output that deasserts after a reset timeout period after all voltages are within their threshold specifications. The reset timeout is internally set to 140ms (min), but can be externally adjusted to other reset timeouts using an external capacitor. In addition, the MAX16009 offers a manual reset input. All devices are offered in a 4mm x 4mm thin QFN package and are fully specified from -40°C to +125°C. Applications Storage Equipment ♦ 1.5% Accuracy Over Temperature ♦ User-Adjustable Thresholds (Down to 0.4V) ♦ Open-Drain Outputs with Internal Pullups Reduce the Number of External Components ♦ Manual Reset Input (MAX16009) ♦ Margin Enable Input ♦ Fixed or Adjustable RESET Timeout (MAX16009) ♦ Guaranteed Correct Output Logic State Down to VCC = 1V ♦ Fully Specified from -40°C to +125°C ♦ Small, 4mm x 4mm Thin QFN Package Ordering Information TEMP RANGE PART MAX16008TP+ PINPACKAGE -40°C to +125°C 20 Thin QFN PKG CODE T2044-3 MAX16009TG+ -40°C to +125°C 24 Thin QFN T2444-4 +Denotes lead-free package. For tape-and-reel, add a “T” after the “+.” Tape-and-reel are offered in 2.5k increments. Typical Operating Circuit 3.5V 2.5V VCC 1.8V 1.5V UVIN1 RESET UVOUT1 VCC RESET µC GND OVIN1 OVOUT1 UVIN2 UVOUT2 Networking/Telecommunications Equipment Multivoltage ASICs Servers MAX16009 OVIN2 OVOUT2 UVIN3 UVOUT3 OVIN3 OVOUT3 UVIN4 UVOUT4 OVIN4 OVOUT4 GND Pin Configurations and Selector Guide appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX16008/MAX16009 General Description MAX16008/MAX16009 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN ABSOLUTE MAXIMUM RATINGS VCC, OVOUT_, UVOUT_, RESET, UVIN_, OVIN_ to GND .........................................-0.3V to +6V MARGIN, MR, TOL, SRT to GND................-0.3V to (VCC + 0.3V) Input/Output Current (RESET, MARGIN, SRT, MR, UVOUT_, OVOUT_) .......±20mA Continuous Power Dissipation (TA = +70°C) 20-Pin Thin QFN (derate 16.9mW/°C above +70°C) ....1355mW 24-Pin Thin QFN (derate 16.9mW/°C above +70°C) ....1666mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 2.0V to 5.5V, TOL = GND, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range Supply Current (Note 3) UVLO (Undervoltage Lockout) SYMBOL VCC ICC VUVLO CONDITIONS (Note 2) MIN TYP 1.0 MAX UNITS 5.5 V VCC = 3.3V, outputs deasserted 45 65 VCC = 5V, outputs deasserted 45 70 1.62 1.8 1.98 V 0.388 0.394 0.400 V VCC rising µA UVIN_/OVIN_ Adjustable Threshold (UVIN_ Falling/OVIN_ Rising) UVIN_/OVIN_ Hysteresis UVIN_/OVIN_ Input Current VTH VTH_HYS UVIN_ falling/OVIN_ rising (percentage of the threshold) IIB 0.5 -100 % VTH +100 nA RESET Reset Timeout tRP SRT Ramp Current ISRT SRT = VCC 140 200 280 CSRT = 1500pF (Note 4) 2.43 3.09 3.92 CSRT = 100pF 0.206 CSRT = open VSRT = 0 SRT Threshold SRT Hysteresis UVIN_/OVIN_ to Reset Delay 2 tRD UVIN_ falling/OVIN_ rising ms 0.05 460 600 740 1.173 1.235 1.293 nA V 100 mV 20 µs _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN (VCC = 2.0V to 5.5V, TOL = GND, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 1) PARAMETER RESET Output-Voltage Low SYMBOL VOL CONDITIONS MIN TYP 0.30 VCC = 2.5V, ISINK = 6mA, RESET asserted 0.30 VCC = 1.2V, ISINK = 50µA, RESET asserted RESET Output-Voltage High VOH MR Input-Voltage Low VIL MR Input-Voltage High VIH MAX VCC = 3.3V, ISINK = 10mA, RESET asserted VCC ≥ 2.0V, ISOURCE = 6µA, RESET deasserted V 0.7 x VCC µs 100 MR to RESET Delay ns 200 12 V V 1 MR Glitch Rejection MR Pullup Resistance V 0.30 0.8 x VCC 0.3 x VCC MR Minimum Pulse Width UNITS 20 ns 28 kΩ OUTPUTS (UVOUT_/OVOUT_) UVOUT_, OVOUT_ OutputVoltage Low VOL OVOUT_, OVOUT_ OutputVoltage High VOH UVIN_/OVIN_ to UVOUT_/ OVOUT_ Propagation Delay tD VCC = 3.3V, ISINK = 2mA 0.30 VCC = 2.5V, ISINK = 1.2mA 0.30 VCC ≥ 2.0V, ISOURCE = 6µA 0.8 x VCC (VTH - 100mV) to (VTH + 100mV) V V 20 µs DIGITAL LOGIC TOL Input-Voltage Low VIL TOL Input-Voltage High VIH TOL Input Current 0.3 x VCC 0.7 x VCC V TOL = VCC MARGIN Input-Voltage Low VIL MARGIN Input-Voltage High VIH MARGIN Pullup Resistance MARGIN Delay Time 100 nA 0.3 x VCC V 0.7 x VCC Pulled up to VCC tMD Rising or falling (Note 5) 12 V V 20 50 28 kΩ µs Devices are tested at TA = +25°C and guaranteed by design for TA = TMIN to TMAX. The outputs are guaranteed to be in the correct logic state down to VCC = 1V. Measured with MR and MARGIN unconnected. The minimum and maximum specifications for this parameter are guaranteed by using the worse case of the SRT current and SRT threshold specifications. Do not set the reset timeout period to more than 1.12s. Note 5: Amount of time required for logic to lock/unlock outputs from margin testing Note 1: Note 2: Note 3: Note 4: _______________________________________________________________________________________ 3 MAX16008/MAX16009 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (VCC = 3.3V, TA = +25°C, unless otherwise noted.) 45 40 35 VCC = 5V 0.425 50 45 VCC = 3.3V 40 VCC = 2.5V 0.400 0.375 35 0.350 30 30 2.5 3.0 3.5 4.0 4.5 5.0 1.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 5.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V) UVIN_/OVIN_ THRESHOLD vs. TEMPERATURE OUTPUT VOLTAGE vs. SINK CURRENT MAXIMUM TRANSIENT DURATION vs. INPUT OVERDRIVE 0.44 0.43 100 0.42 75 VOUT_ (mV) 0.41 0.40 0.39 50 0.38 25 0.37 0.36 600 OUTPUT GOES LOW ABOVE THIS LINE 500 5.5 MAX16008 toc06 MAX16008 toc04 0.45 MAXIMUM TRANSIENT DURATION (µs) 2.0 MAX16008 toc05 1.5 400 300 200 100 UVOUT_ / OVOUT_ LOW 0.35 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 4 MAX16008 toc03 55 0.450 INPUT THRESHOLD 50 60 MARGIN AND MR UNCONNECTED MAX16008 toc02 MARGIN AND MR UNCONNECTED SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) 65 MAX16008 toc01 60 55 UVIN_/OVIN_ THRESHOLD vs. SUPPLY VOLTAGE SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT vs. SUPPLY VOLTAGE INPUT THRESHOLD MAX16008/MAX16009 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN 0 1 2 3 4 5 SINK CURRENT (mA) 6 7 8 1 10 100 INPUT OVERDRIVE (mV) _______________________________________________________________________________________ 1000 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN RESET TIMEOUT PERIOD vs. TEMPERATURE MAX16008 toc07 197 RESET TIMEOUT PERIOD (ms) RESET TIMEOUT DELAY MAX16008 toc08 198 UVIN1 1V/div 196 195 UVOUT1 2V/div 194 193 RESET 2V/div 192 191 SRT = VCC 190 -40 -25 -10 5 20 35 50 65 80 95 110 125 40ms/div TEMPERATURE (°C) UVIN_ TO UVOUT_ DELAY TIME MARGIN ENABLE FUNCTION MAX16008 toc09 MAX16008 toc10 MARGIN 2V/div UVIN1 2V/div UVOUT_ 2V/div UVOUT1 2V/div RESET 2V/div UVIN_ BELOW RESPECTIVE THRESHOLDS 4µs/div 100µs/div _______________________________________________________________________________________ 5 MAX16008/MAX16009 Typical Operating Characteristics (continued) (VCC = 3.3V, TA = +25°C, unless otherwise noted.) Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 Pin Description 6 MAX16008 MAX16009 PIN 1 1 UVIN3 Undervoltage Threshold Input 3. When the voltage on UVIN3 falls below its threshold, UVOUT3 asserts low. 2 2 OVIN3 Overvoltage Threshold Input 3. When the voltage on OVIN3 rises above its threshold, OVOUT3 asserts low. 3 3 UVIN4 Undervoltage Threshold Input 4. When the voltage on UVIN4 falls below its threshold, UVOUT4 asserts low. 4 4 OVIN4 Overvoltage Threshold Input 4. When the voltage on OVIN4 rises above its threshold, OVOUT4 asserts low. 5 6 GND Ground 6, 20 7, 24 VCC Unmonitored Power to the Device 7 8 UVOUT3 Active-Low Undervoltage Output 3. When the voltage at UVIN3 falls below its threshold, UVOUT3 asserts low and stays asserted until the voltage at UVIN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 8 9 OVOUT3 Active-Low Overvoltage Output 3. When the voltage at OVIN3 rises above its threshold, OVOUT3 asserts low and stays asserted until the voltage at OVIN3 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. 9 10 UVOUT4 Active-Low Undervoltage Output 4. When the voltage at UVIN4 falls below its threshold, UVOUT4 asserts low and stays asserted until the voltage at UVIN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 10 11 OVOUT4 Active-Low Overvoltage Output 4. When the voltage at OVIN4 rises above its threshold, OVOUT4 asserts low and stays asserted until the voltage at OVIN4 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. 11 14 MARGIN Active-Low Margin Enable Input. Pull MARGIN low to deassert all outputs (go into high state) regardless of the voltage at any monitored input. 12 15 OVOUT2 Active-Low Overvoltage Output 2. When the voltage at OVIN2 rises above its threshold, OVOUT2 asserts low and stays asserted until the voltage at OVIN2 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. NAME FUNCTION _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008 MAX16009 PIN 13 16 UVOUT2 Active-Low Undervoltage Output 2. When the voltage at UVIN2 falls below its threshold, UVOUT2 asserts low and stays asserted until the voltage at UVIN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 14 17 OVOUT1 Active-Low Overvoltage Output 1. When the voltage at OVIN1 rises above its threshold, OVOUT1 asserts low and stays asserted until the voltage at OVIN1 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. 15 18 UVOUT1 Active-Low Undervoltage Output 1. When the voltage at UVIN1 falls below its threshold, UVOUT1 asserts low and stays asserted until the voltage at UVIN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. 16 20 UVIN1 Undervoltage Threshold Input 1. When the voltage on UVIN1 falls below its threshold, UVOUT1 asserts low. 17 21 OVIN1 Overvoltage Threshold Input 1. When the voltage on OVIN1 rises above its threshold, OVOUT1 asserts low. 18 22 UVIN2 Undervoltage Threshold Input 2. When the voltages on UVIN2 falls below its threshold, UVOUT2 asserts low. 19 23 OVIN2 Overvoltage Threshold Input 2. When the voltage on OVIN2 rises above its threshold, OVOUT2 asserts low. — 5 N.C. Not Internally Connected MR Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period after MR is deasserted. MR is pulled up to VCC through a 20kΩ resistor. SRT Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset timeout period can be calculated as follows: Reset Timeout (s) = 2.06 x 106 (Ω) x CSRT (F). Do not set the reset timeout period to more than 1.12s. For the internal timeout period of 140ms (min), connect SRT to VCC. — — 12 13 NAME — 19 RESET EP EP EP FUNCTION Active-Low Reset Output. RESET asserts low when the voltage on any of the UVIN_ inputs falls below their respective thresholds, the voltage on any of the OVIN_ inputs goes above its respective threshold, or MR is asserted. RESET remains asserted for at least the minimum reset timeout after all monitored UVIN_ inputs exceed their respective thresholds, all OVIN_ inputs fall below their respective thresholds, and MR is deasserted. This open-drain output has a 30µA internal pullup. Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal resistance path from the IC junction to the PC board. Do not use as the only electrical connection to GND. _______________________________________________________________________________________ 7 MAX16008/MAX16009 Pin Description (continued) MAX16008/MAX16009 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN (MR) (SRT) VCC VCC TIMING RESET CIRCUIT (RESET) UVIN1 UVOUT1 OVIN1 OVOUT1 UVIN2 UVOUT2 OUTPUT DRIVER OVOUT2 OVIN2 UVIN3 UVOUT3 OVOUT3 OVIN3 UVIN4 UVOUT4 OVOUT4 VCC OVIN4 VCC UNDERVOLTAGE LOCKOUT MAX16008/ MAX16009 VCC REFERENCE ( ) MAX16009 ONLY MARGIN Figure 1. Functional Diagram 8 _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN The MAX16008/MAX16009 are adjustable quad window voltage detectors in a small thin QFN package. These devices are designed to provide a higher level of system reliability by monitoring multiple supply voltages and providing a fault signal when any of the voltages exceeds its overvoltage threshold or falls below its undervoltage threshold. These devices offer user-adjustable thresholds that allow voltages to be monitored down to 0.4V. The devices allow the upper and lower trip thresholds of each window detector to be set externally with the use of three external resistors. Each monitored threshold has an independent opendrain output for signaling a fault condition. The outputs can be wire OR’ed together to provide a single fault output. The open-drain outputs are internally pulled up with a 30µA current, but can be externally driven to other voltage levels for interfacing to other logic levels. Both devices feature a margin input to disable the outputs during margin testing or any other time after power-up operations. The MAX16009 offers a reset output that deasserts after a reset timeout period after all voltages are within their threshold specification. The reset timeout is internally set to 140ms (min), but can be externally adjusted to other reset timeouts using an external capacitor. In addition, the MAX16009 offers a manual reset input. Applications Information Voltage Monitoring The MAX16008/MAX16009 feature undervoltage and overvoltage comparators for window detection (see Figure 2). UVOUT_/OVOUT_ deassert high when the monitored voltage is within the “selected window.” When the monitored voltage falls below the lower limit of the window (VTRIPLOW), UVOUT_ asserts low; or if the monitored voltage exceeds the upper limit (VTRIPHIGH), OVOUT_ asserts low. The application in Figure 2 shows the MAX16008/MAX16009 enabling the DC-DC converter when the monitored voltage is in the selected window. MAX16008/MAX16009 Detailed Description +5V R1 VCC UVIN_ OVOUT_ R2 OVIN_ IN UVOUT_ MAX16008/ MAX16009 EN OUT DC-DC REGULATOR GND R3 Figure 2. MAX16008/MAX16009 Monitor Circuit The resistor values R1, R2, and R3 can be calculated as shown: ⎛R ⎞ VTRIPLOW = VTH ⎜ TOTAL ⎟ 2 3 R + R ⎝ ⎠ ⎛R ⎞ VTRIPHIGH = VTH ⎜ TOTAL ⎟ ⎝ R3 ⎠ where RTOTAL = R1 + R2 + R3. Use the following steps to determine the values for R1, R2, and R3: 1) Choose a value for RTOTAL, the sum of R1, R2, and R3. Because the MAX16008/MAX16009 have very low input bias current (2nA typ), RTOTAL can be up to 2MΩ. Large-value resistors help minimize power consumption. Lower-value resistors can be used to maintain overall accuracy. _______________________________________________________________________________________ 9 MAX16008/MAX16009 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Use the following formulas to calculate the error: ⎛ R R ⎞ IIB ⎜ R1 + 1 3 ⎟ R2 + R3 ⎠ ⎝ EUV (%) = x 100 VTRIPLOW I (R + (2 x R1)) x 100 EOV (%) = IB 2 VTRIPHIGH where EUV and EOV are the undervoltage and overvoltage error (in %), respectively. 2) Calculate R3 based on RTOTAL and the desired upper trip point: The MAX16008/MAX16009 are powered directly from the system voltage supply. Select R1 and R2 to set the trip voltage. When the supply voltage remains below the selected threshold, a low logic level on UVOUT_ turns on the p-channel MOSFET. In the case of an overvoltage event, UVOUT_ goes high turning off the MOSFET, and shuts down the power to the load. Figure 4 shows a similar application using a fuse and a silicon-controlled rectifier (SCR). An overvoltage event turns on the SCR and shorts the supply to ground. The surge of current through the short circuit blows the fuse and terminates the current to the load. Select R3 so that the gate of the SCR is properly biased when UVOUT_ goes high. Unused Inputs R3 = Any unused UVIN_ inputs must be connected to VCC, and any unused OVIN_ inputs must be connected to GND. VTH x R TOTAL VTRIPHIGH UVOUT_ / OVOUT_ Outputs 3) Calculate R2 based on R TOTAL , R3, and the desired lower trip point: R2 = VTH x R TOTAL − R3 VTRIPLOW 4) Calculate R1 based on RTOTAL, R3, and R2: R1 = R TOTAL − R2 − R 3 Overvoltage Shutdown The MAX16008/MAX16009 are ideal for overvoltageshutdown applications. Figure 3 shows a typical circuit for this application using a pass p-channel MOSFET. UVOUT_ and OVOUT_ outputs assert low when UVIN_ and OVIN_, respectively, drop below or exceed their specified thresholds. The undervoltage/overvoltage outputs are open-drain with a (30µA) internal pullup to VCC. For many applications, no external pullup resistor is required to interface with other logic devices. An external pullup resistor to any voltage up to 5.5V overdrives the internal pullup if interfacing to different logic supply voltages. Internal circuitry prevents reverse current flow from the external pullup voltage to VCC (Figure 5). When choosing the external pullup resistor, the resistance value should be large enough to ensure that the output can sink the necessary current during a logic-low condition and small enough to be able to overdrive the internal pullup current and meet output high specifications FUSE VSUPPLY VSUPPLY R1 VCC VCC R2 LOAD LOAD UVIN_ MAX16008/ MAX16009 R3* UVOUT_ GND MAX16008/ MAX16009 R1 R3 SCR UVIN_ UVOUT_ R2 GND *OPTIONAL. VALUES OF 10kΩ AND ABOVE ARE RECOMMENDED. Figure 3. Overvoltage Shutdown Circuit (with External Pass MOSFET) 10 Figure 4. Overvoltage Shutdown Circuit (with SCR Fuse) ______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN RESET Output (MAX16009 Only) RESET asserts low when the voltage on any of the UVIN_ inputs falls below its respective threshold, the voltage on any of the OVIN_ inputs goes above its respective threshold, or MR is asserted. RESET remains asserted for the reset timeout period after all monitored UVIN_ inputs exceed their respective thresholds, all OVIN_ inputs fall below their respective thresholds, and MR is deasserted (see Figure 6). This open-drain output has a 30µA internal pullup. Reset Timeout Capacitor The reset timeout period can be adjusted to accommodate a variety of microprocessor (µP) applications from 50µs to 1.12s. Adjust the reset timeout period (tRP) by connecting a capacitor (CSRT) between SRT and GND. Calculate the reset timeout capacitor as follows: tRP (s) CSRT (F) = ⎛ VTH _ SRT ⎞ ⎜ I ⎟ ⎝ SRT ⎠ Do not use capacitor (CSRT) values higher than 390nF. Connect SRT to VCC for a factory-programmed reset timeout of 140ms (min). Manual Reset Input (MR) (MAX16009 Only) Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic-low on MR asserts RESET low. RESET remains asserted while MR is low, and during the reset timeout period (140ms min) after MR returns high. The MR input has an internal 20kΩ pullup resistor to VCC, so it can be left open if it is not used. MR can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connecting a 0.1µF capacitor from MR to GND provides additional noise immunity. Margin Output Disable (MARGIN) MARGIN allows system-level testing while power supplies are adjusted from their nominal voltages. Drive MARGIN low to deassert all outputs (UVOUT_, UVIN_ VTH_ VCC = 3.3V VTH_ + VTH_HYS 5V RESET 90% 100kΩ VCC 10% VCC UVOUT_ tRD tRP UVOUT_ 90% RESET 10% tD tD MAX16008/ MAX16009 VTH_ OVIN_ GND VTH_ - VTH_HYS GND OVOUT_ 90% 10% tD Figure 5. Interfacing to a Different Logic Supply Voltage tD Figure 6. Output Timing Diagram ______________________________________________________________________________________ 11 MAX16008/MAX16009 (VOH). Resistor values of 50kΩ to 200kΩ can generally be used. OVOUT_, and RESET) regardless of the voltage at any monitored input. The state of each output does not change while MARGIN = GND. While MARGIN is low, the IC continues to monitor all voltages. When MARGIN is deasserted, the outputs go to their monitored states after a short propagation delay. The MARGIN input is internally pulled up to VCC. Leave unconnected or connect to VCC if unused. Power-Supply Bypassing The MAX16008/MAX16009 operate from a 2.0V to 5.5V supply. An undervoltage lockout ensures that the outputs are in the correct states when the UVLO is exceeded. In noisy applications, bypass VCC to ground with a 0.1µF capacitor as close to the device as possible. In addition, the additional capacitor improves transient immunity. For fast-rising VCC transients, additional capacitance may be required. Selector Guide NUMBER OF MONITORED LEVELS UNDERVOLTAGE/ OVERVOLTAGE THRESHOLDS RESET ADJUSTABLE RESET TIMEOUT MR MAX16008 4 Adjustable — — — MAX16009 4 Adjustable ✔ ✔ ✔ PART UVIN1 16 10 OVOUT4 OVIN1 17 9 UVOUT4 UVIN2 18 8 OVOUT3 MAX16008 SRT 11 MARGIN 12 OVOUT2 MARGIN 13 UVOUT2 OVOUT2 14 OVOUT1 UVOUT2 15 TOP VIEW UVOUT1 OVOUT1 TOP VIEW UVOUT1 Pin Configurations 18 17 16 15 14 13 RESET 19 12 MR UVIN1 20 11 OVOUT4 OVIN1 21 10 UVOUT4 9 OVOUT3 8 UVOUT3 7 VCC MAX16009 UVIN2 22 OVIN2 19 7 UVOUT3 6 VCC OVIN2 23 VCC 20 + + 1 2 OVIN4 GND UVIN3 OVIN3 THIN QFN 4mm x 4mm 12 3 4 5 6 GND 5 N.C. 4 OVIN4 3 UVIN4 2 UVIN4 1 OVIN3 VCC 24 UVIN3 MAX16008/MAX16009 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN THIN QFN 4mm x 4mm ______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN 24L QFN THIN.EPS PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 1 2 ______________________________________________________________________________________ 13 MAX16008/MAX16009 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) MAX16008/MAX16009 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.