Order this document by MTB3N60E/D SEMICONDUCTOR TECHNICAL DATA Motorola Preferred Device D2PAK for Surface Mount N–Channel Enhancement–Mode Silicon Gate TMOS POWER FET 3.0 AMPERES 600 VOLTS RDS(on) = 2.2 OHMS This advanced high voltage TMOS E–FET is designed to withstand high energy in the avalanche mode and switch efficiently. This new high energy device also offers a drain–to–source diode with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. • Avalanche Energy Capability Specified at Elevated Temperature • Low Stored Gate Charge for Efficient Switching • Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor — Absorbs High Energy in the Avalanche Mode • Source–to–Drain Diode Recovery Time Comparable to Discrete Fast Recovery Diode D G CASE 418B–03, Style 2 D2PAK S MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–Source Voltage VDSS 600 Vdc Drain–Gate Voltage (RGS = 1.0 MΩ) VDGR 600 Vdc Gate–Source Voltage — Continuous Gate–Source Voltage — Non–repetitive VGS VGSM ± 20 ± 40 Vdc Vpk Drain Current — Continuous Drain Current — Continuous @ 100°C Drain Current — Pulsed ID ID IDM 3.0 2.4 14 Adc Total Power Dissipation @ TC = 25°C Derate above 25°C Total Power Dissipation @ TA = 25°C(1) PD 75 0.6 2.5 Watts W/°C Watts TJ, Tstg – 55 to 150 °C WDSR(2) mJ WDSR(3) 290 46 7.5 RθJC RθJA RθJA 1.67 62.5 50 °C/W TL 260 °C Operating and Storage Temperature Range UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (TJ < 150°C) Single Pulse Drain–to–Source Avalanche Energy — TJ = 25°C Single Pulse Drain–to–Source Avalanche Energy — TJ = 100°C Repetitive Pulse Drain–to–Source Avalanche Energy THERMAL CHARACTERISTICS Thermal Resistance — Junction to Case° Thermal Resistance — Junction to Ambient° Thermal Resistance — Junction to Ambient(1) Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds (1) When surface mounted to an FR–4 board using the minimum recommended pad size (2) VDD = 50 V, ID = 3.0 A (3) Pulse Width and frequency is limited by TJ(max) and thermal response This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. TMOS Motorola Motorola, Inc. 1997 Power MOSFET Transistor Device Data 1 MTB3N60E ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit V(BR)DSS 600 — — Vdc — — — — 10 100 OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (VGS = 0, ID = 250 µAdc) Zero Gate Voltage Drain Current (VDS = 600 V, VGS = 0) (VDS = 480 V, VGS = 0, TJ = 125°C) µAdc IDSS Gate–Body Leakage Current — Forward (VGSF = 20 Vdc, VDS = 0) IGSSF — — 100 nAdc Gate–Body Leakage Current — Reverse (VGSR = 20 Vdc, VDS = 0) IGSSR — — 100 nAdc 2.0 1.5 — — 4.0 3.5 — 2.1 2.2 — — — — 9.0 7.5 gFS 1.5 — — mhos Ciss — 770 — pF Coss — 105 — Crss — 19 — td(on) — 23 — ON CHARACTERISTICS* Gate Threshold Voltage (VDS = VGS, ID = 250 µAdc) (TJ = 125°C) VGS(th) Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 1.5 A) RDS(on) Drain–to–Source On–Voltage (VGS = 10 Vdc) (ID = 3.0 A) (ID = 1.5 A, TJ = 100°C) VDS(on) Forward Transconductance (VDS = 15 Vdc, ID = 1.5 A) Vdc Ohms Vdc DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = 25 V, V VGS = 0, 0 f = 1.0 MHz) Transfer Capacitance SWITCHING CHARACTERISTICS* Turn–On Delay Time Rise Time Turn–Off Delay Time (VDD = 300 V, V ID ≈ 3.0 3 0 A, A RL = 100 Ω, Ω RG = 12 Ω Ω, VGS(on) = 10 V)) Fall Time Total Gate Charge Gate–Source Charge (VDS = 420 V, V ID = 3 3.0 0A A, VGS = 10 V) Gate–Drain Charge ns tr — 34 — td(off) — 58 — tf — 35 — Qg — 28 31 Qgs — 5.0 — Qgd — 17 — VSD — — 1.4 Vdc ton — ** — ns trr — 400 — — — 3.5 4.5 — — — 7.5 — nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage Forward Turn–On Time (IS = 3 3.0 0A A, di/d di/dt = 100 A/ A/µs)) Reverse Recovery Time INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the contact screw on tab to center of die) (Measured from the drain lead 0.25″ from package to center of die) Ld Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) Ls nH * Pulse Test: Pulse Width = 300 µs, Duty Cycle ≤ 2.0%. ** Limited by circuit inductance. 2 Motorola TMOS Power MOSFET Transistor Device Data MTB3N60E PACKAGE DIMENSIONS C E V –B– 4 A 1 2 3 S –T– SEATING PLANE K J G D 3 PL 0.13 (0.005) H M T B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E G H J K S V INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.575 0.625 0.045 0.055 MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 14.60 15.88 1.14 1.40 M STYLE 2: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN CASE 418B–03 ISSUE C Motorola TMOS Power MOSFET Transistor Device Data 3 MTB3N60E Motorola reserves the right to make changes without further notice to any products herein. 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