MOTOROLA MJE16204

Order this document
by MJE16204/D
SEMICONDUCTOR TECHNICAL DATA
 
NPN Bipolar Power Deflection Transistor
For High and Very High Resolution Monitors
The MJE16204 is a state–of–the–art SWITCHMODE bipolar power transistor. It is
specifically designed for use in horizontal deflection circuits for 20 mm diameter neck,
high and very resolution, full page, monochrome monitors.
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550 Volt Collector–Base Breakdown Capability
Typical Dynamic Desaturation Specified (New Turn–Off Characteristic)
Application Specific State–of–the–Art Die Design
Isolated or Non–Isolated TO–220 Type Packages
Fast Switching:
65 ns Inductive Fall Time (Typ)
680 ns Inductive Storage Time (Typ)
Low Saturation Voltage:
0.4 Volts at 3.0 Amps Collector Current and 400 mA Base Drive
Low Collector–Emitter Leakage Current — 100 µA Max at 550 Volts — VCES
High Emitter–Base Breakdown Capability For High Voltage Off Drive Circuits —
9.0 Volts (Min)
Case 221D is UL Recognized at 3500 VRMS: File #E69369
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POWER TRANSISTORS
6.0 AMPERES
550 VOLTS — VCES
45 AND 80 WATTS
MAXIMUM RATINGS
Symbol
MJE16204
Unit
Collector–Emitter Breakdown Voltage
Rating
VCES
550
Vdc
Collector–Emitter Sustaining Voltage
VCEO(sus)
250
Vdc
Emitter–Base Voltage
VEBO
8.0
Vdc
VISOL
—
—
—
V
Collector Current — Continuous
— Pulsed (1)
IC
ICM
6.0
8.0
Adc
Base Current — Continuous
— Pulsed (1)
IB
IBM
2.0
4.0
Adc
W(BER)
0.2
mJ
PD
80
32
0.64
Watts
TJ, Tstg
– 55 to 150
_C
Symbol
Max
Unit
RθJC
1.56
_C/W
TL
260
_C
RMS Isolation Voltage(2)
(for 1 sec, TA = 25_C,
Rel. Humidity < 30%)
Per Fig. 14
Per Fig. 15
Per Fig. 16
Repetitive Emitter–Base Avalanche Energy
Total Power Dissipation @ TC = 25_C
Total Power Dissipation @ TC = 100_C
Derated above TC = 25_C
Operating and Storage Temperature Range
CASE 221A–06
TO–220AB
MJE16204
W/_C
THERMAL CHARCTERISTICS
Characteristic
Thermal Resistance — Junction to Case
Lead Temperature for Soldering Purposes
1/8″ from the case for 5 seconds
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle
10%.
(2) Proper strike and creepage distance must be provided.
* Measurement made with thermocouple contacting the bottom insulated mounting surface of the
package (in a location beneath the die), the device mounted on a heatsink thermal grease applied,
and a mounting torque of 6 to 8 inSlbs.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
SCANSWITCH, SWITCHMODE and Designer’s are trademarks of Motorola, Inc.
(REPLACES MJF16204)
 Motorola, Inc. 1995
Motorola Bipolar Power Transistor Device Data
1
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ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Collector Cutoff Current
(VCE = 550 Vdc, VBE = 0 V)
ICES
—
—
100
µAdc
Emitter–Base Leakage
(VEB = 8.0 Vdc, IC = 0)
IEBO
—
—
10
µAdc
Emitter–Base Breakdown Voltage
(IE = 1.0 mA, IC = 0)
V(BR)EBO
8.0
11
—
Vdc
Collector–Emitter Sustaining Voltage (Table 1)
(IC = 10 mAdc, IB = 0)
VCEO(sus)
250
325
—
Vdc
—
—
0.25
0.4
0.6
1.0
OFF CHARACTERISTICS (1)
ON CHARACTERISTICS (1)
Collector–Emitter Saturation Voltage
(IC = 1.0 Adc, IB = 133 mAdc)
(IC = 3.0 Adc, IB = 400 mAdc)
VCE(sat)
Vdc
Base–Emitter Saturation Voltage
(IC = 3.0 Adc, IB = 400 mAdc)
VBE(sat)
—
0.9
1.5
Vdc
DC Current Gain
(ICE = 6.0 Adc, VCE = 5.0 Vdc)
hFE
8.0
14
20
—
Dynamic Desaturation Interval (IC = 3.0 A, IB1 = 400 mA)
tds
—
50
—
ns
Output Capacitance
(VCE = 10 Vdc, IE = 0, ftest = 100 kHz)
Cob
—
90
150
pF
fT
10
—
—
MHz
Emitter–Base Turn–Off Energy
(EB(avalanche) = 500 ns, RBE = 22 Ω)
EB(off)
—
6.6
—
µJ
Collector–Heatsink Capacitance
(Mounted on a 1″ x 2″ x 1/16″ Copper Heatsink, VCE = 0, ftest = 100 kHz)
Cc–hs
—
3.0
—
pF
tsv
tfi
—
—
680
65
1500
150
DYNAMIC CHARACTERISTICS
Gain Bandwidth Product
(VCE = 10 Vdc, IC = 1.0 A, ftest = 1.0 MHz)
SWITCHING CHARACTERISTICS
Inductive Load (Table 2) (IC = 3.0 A, IB = 400 mA)
Storage
Fall Time
2.0%.
hFE , DC CURRENT GAIN
60
50
30
TJ = 100°C
VCE = 5 V
25°C
20
– 55°C
10
7
5
3
0.5
0.7
1
3
5
2
IC, COLLECTOR CURRENT (AMPS)
Figure 1. Typical DC Current Gain
2
7
10
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle
ns
10
7
5
3
TJ = 25°C
TJ = 100°C
2
IC/IB1 = 10
1
0.7
0.5
7.5
5
0.3
0.2
0.1
0.1
0.2
0.3
0.5 0.7
1
2
3
5
7
IC, COLLECTOR CURRENT (AMPS)
Figure 2. Typical Collector–Emitter
Saturation Voltage
Motorola Bipolar Power Transistor Device Data
30
20
VBE, BASE–EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
TJ = 25°C
10
7
5
3
2
IC = 1 A
1
0.7
0.5
0.3
0.2
2A
0.1
0.07
0.05
0.03
0.03 0.05 0.07 0.1
3A
6A
0.2 0.3
0.5 0.7
IB, BASE CURRENT (AMPS)
1
2
10
7
5
IC/IB1 = 5 to 10
3
2
TJ = 25°C
TJ = 100°C
1
0.7
0.5
0.3
0.2
0.1
0.3
3
0.5 0.7
10K
20
5K
3K
2K
18
TC = 25°C
Cib
500
300
200
100
50
30
20
Cob
f T, TRANSITION FREQUENCY (MHz)
C, CAPACITANCE (pF)
3
5
7
10
20
30
Figure 4. Typical Base–Emitter
Saturation Voltage
Figure 3. Typical Collector–Emitter
Saturation Region
1K
2
1
IC, COLLECTOR CURRENT (AMPS)
VCE = 10 V
ftest = 1 MHz
TC = 25°C
16
14
12
10
8
6
4
2
10
0.1 0.2 0.3 0.5
0
1 2 3 5 10 20 30 50 100 200 300 500 1K
VR, REVERSE VOLTAGE (VOLTS)
0
0.5
1
1.5
2
2.5
3
IC, COLLECTOR CURRENT (AMPS)
Figure 5. Typical Capacitance
Figure 6. Typical Transition Frequency
10
7
5
3
2
7
10 µs
MJE16204
1
0.7
0.5
0.3
0.2
TC = 25°C
0.1
0.07
0.05
0.03
0.02
dc
1 ms
SECONDARY BREAKDOWN
WIREBOND LIMIT
THERMAL LIMIT
0.01
3
5
10
30
200 250
20
50 70 100
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
7
Figure 7. Maximum Forward Biased
Safe Operating Area
Motorola Bipolar Power Transistor Device Data
IC, COLLECTOR CURRENT (AMPS)
IC, COLLECTOR CURRENT (AMPS)
SAFE OPERATING AREA
6
VBE(off) = 5 V
5
4
3
2
VBE(off) = 0 V
IC/IB1 ≥ 5
TJ ≤ 100°C
1
0
50
150
250
350
450
550
VCE(pk), PEAK COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 8. Maximum Reverse Biased
Safe Operating Area
3
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
1
SECOND BREAKDOWN
DERATING
0.8
POWER DERATING FACTOR
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 7 is based on TC = 25_C; T J(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the
voltages shown on Figure 7 may be found at any case temperature by using the appropriate curve on Figure 9.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the limitations imposed by second breakdown.
0.6
THERMAL
DERATING
0.4
0.2
0
20
40
60
80
100
120
140
160
TC, CASE TEMPERATURE (°C)
Figure 9. Power Derating
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc.
The safe level for these devices is specified as Reverse
Biased Safe Operating Area and represents the voltage–current condition allowable during reverse biased turnoff. This
rating is verified under clamped conditions so that the device
is never subjected to an avalanche mode. Figure 8 gives the
RBSOA characteristics.
Table 1. RBSOA/V(BR)CEO(sus) Test Circuit
0.02 µF
H.P. 214
OR EQUIV.
P.G.
+ V ≈ 11 V
100
2N6191
20
+
0
–
10 µF
RB1
≈ – 35 V
A
RB2
0.02 µF
+
50
–
2N5337
1 µF
500
100
T1
IC
+V
0V
T1
[
A
VCE(pk)
*IC
–V
Lcoil (ICpk)
VCC
IC(pk)
–V
VCE
L
T.U.T.
MR856
T1 adjusted to obtain IC(pk)
IB1
*IB
50
IB
Vclamp
VCC
IB2
V(BR)CEO
L = 10 mH
RB2 = ∞
VCC = 20 Volts
4
*Tektronix
*P–6042 or
*Equivalent
RBSOA
L = 200 µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired IB1
Note: Adjust – V to obtain desired VBE(off) at Point A.
Motorola Bipolar Power Transistor Device Data
Table 2. High Resolution Deflection Application Simulator
+ 24 V
U2
MC7812
G VO
VI
N
D
+
C1
100 µF
C2
10 µF
(IB)
R7
2.7 k
R8
9.1 k
R9
470
R10
47
C4
0.005
(DC)
R2
R510
R3
250
SYNC
Q1
R6
1k
7
O
S
8
%C
VCC
1
G OUT
U1
N
D
MC1391P
2
+
100 V
R10
470
1W
D2
MUR460
Q3
MJE
15031
T1
R12
470
1W
BS170
CY
VCE
LB
Q4
DUT
R4
22
D1
MUR110
LB = 0.5 µH
CY = 0.01 µF
LY = 13 µH
T1: Ferroxcube Pot Core #1811 P3C8
Primary/Sec. Turns Ratio = 18:6
Primary Inductance Gap:
LP = 250 µH
200
2K
TC = 25°C
TC = 25°C
1K
700
ICI/B1 = 7.5
500
10
tf , FALL TIME (ns)
t s , STORAGE TIME (ns)
C6
100 µF
C3
10 µF
LY
C5
0.1
6
Q5
MJ11016
R1
1k
6.2 V
+
(IC)
R5
1k
Q2
MJ11016
+
100
70
ICI/B1 = 7.5
50
10
30
300
200
20
1
2
3
5
IC, COLLECTOR CURRENT (AMPS)
7
Figure 10. Typical Collector Current Storage
Time in Deflection Circuit Simulator
Motorola Bipolar Power Transistor Device Data
1
2
3
5
IC, COLLECTOR CURRENT (AMPS)
7
10
Figure 11. Typical Collector Current Fall Time
in Deflection Circuit Simulator
5
tfi
90% IC(pk)
VCE
IC
VCE = 20 V
10% IC(pk)
0
tsv
0
0% IB
COLLECTOR–EMITTER VOLTAGE (VOLTS)
DYNAMIC DESATURATIION
5
VCE
4
3
DYNAMIC SATURATION TIME
IS MEASURED FROM VCE = 1 V
TO VCE = 5 V
2
1
0
tds
TIME (ns)
Figure 12. Deflection Simulator Switching
Waveforms From Circuit in Table 2
The SCANSWITCH series of bipolar power transistors are
specifically designed to meet the unique requirements of horizontal deflection circuits in computer monitor applications.
Historically, deflection transistor design was focused on minimizing collector current fall time. While fall time is a valid
figure of merit, a more important indicator of circuit performance as scan rates are increased is a new characteristic,
“dynamic desaturation.” In order to assure a linear collector
current ramp, the output transistor must remain in hard saturation during storage time and exhibit a rapid turn–off transition. A sluggish transition results in serious consequences.
As the saturation voltage of the output transistor increases,
6
Figure 13. Definition of Dynamic
Saturation Measurement
the voltage across the yoke drops. Roll off in the collector
current ramp results in improper beam deflection and distortion of the image at the right edge of the screen. Design
changes have been made in the structure of the SCANSWITCH series of devices which minimize the dynamic desaturation interval. Dynamic desaturation has been defined in
terms of the time required for the VCE to rise from 1.0 to
5.0 volts (Figures 12 and 13) and typical performance at optimized drive conditions has been specified. Optimization of
device structure results in a linear collector current ramp, excellent turn–off switching performance, and significantly lower overall power dissipation.
Motorola Bipolar Power Transistor Device Data
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1
0.7
0.5
D = 0.5
0.2
0.2
0.1
0.07
0.05
0.1
RθJC(t) = r(t) RθJC
RθJC = 1.56°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) RθJC(t)
0.05
0.02
0.01
0.02
0.01
0.01
SINGLE PULSE
0.02
0.05
0.1
0.2
0.5
1
2
5
t, TIME (ms)
10
20
50
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
100
200
500
10 k
Figure 14. Typical Thermal Response for MJE16204
Motorola Bipolar Power Transistor Device Data
7
PACKAGE DIMENSIONS
B
–T–
F
C
T
4
S
A
Q
1 2 3
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
U
H
K
Z
L
R
V
J
G
D
N
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
–––
–––
0.080
STYLE 1:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
–––
–––
2.04
BASE
COLLECTOR
EMITTER
COLLECTOR
CASE 221A–06
TO–220AB
ISSUE Y
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8
◊
Motorola Bipolar Power Transistor Device Data
*MJE16204/D*
MJE16204/D