LH168R 384-output TFT-LCD Source Driver IC LH168R DESCRIPTION PIN CONNECTIONS The LH168R is a 384-output TFT-LCD source driver IC which can simultaneously display 16.7 million colors in 256 gray scales. TOP VIEW 464-PIN TCP XO1 1 YO1 2 ZO1 3 FEATURES • Number of LCD drive outputs : 384 • Built-in 8-bit digital input DAC • Dot-inversion drive : Outputs the inverted gray scale voltages between LCD drive pins next to each other • 2-port input for each circuit of data inputs R, G and B, and it is possible to sample and hold display data of two pixels at the same time • Possible to display 16.7 million colors in 256 gray scales with reference voltage input of 18 gray scales : This reference voltage input corresponds to ‹ correction and intermediate reference voltage input can be abbreviated • Cascade connection • Sampling sequence : Output shift direction can be selected XO1, YO1, ZO1/XO128, YO128, ZO128 or ZO128, YO128, XO128/ZO1, YO1, XO1 • Shift clock frequency : 65 MHz (MAX.) • Supply voltages – VCC (for logic system) : +2.5 to +3.6 V – VLS (for LCD drive) : +13 V (MAX.) • Package : 464-pin TCP (Tape Carrier Package) 464 463 462 461 GND VLS GND XB7 454 XB0 453 XA7 CHIP SURFACE 446 XA0 445 YA7 438 437 436 435 434 433 432 431 430 429 428 427 426 425 424 423 422 421 420 419 418 417 416 415 414 413 412 YA0 SPOI VH0 VH32 VH64 VH96 VH128 VH160 VH192 VH224 VH256 VL256 VL224 VL192 VL160 VL128 VL96 VL64 VL32 VL0 POLB POLA CK SPIO LS REV YB7 405 YB0 404 ZB7 397 ZB0 396 ZA7 389 388 387 386 385 ZA0 LBR VCC VLS GND XO128 382 YO128 383 ZO128 384 NOTE : Doesn't prescribe TCP outline. In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. 1 LH168R PIN DESCRIPTION PIN NO. 1 to 384 SYMBOL XO1-ZO128 I/O O LCD drive output pins DESCRIPTION 385, 462, 464 386 GND VLS – Ground pins – Power supply pin for analog circuit 387 VCC 388 LBR – I Power supply pin for digital circuit Shift direction selection input pin 389 to 396 397 to 404 ZA0-ZA7 ZB0-ZB7 I I Data input pins Data input pins 405 to 412 YB0-YB7 I Data input pins 413 414 REV LS I I LCD drive output polarity exchange input pin Latch input pin 415 416 SPIO CK I/O I Start pulse input/cascade output pin Shift clock input pin 417, 418 POLA, POLB I Input data polarity exchange input pins 419 to 427 VL0-VL256 428 to 436 VH256-VH0 I I Reference voltage input pins Reference voltage input pins 437 438 to 445 SPOI I/O YA0-YA7 I Data input pins 446 to 453 XA0-XA7 I Data input pins 454 to 461 463 XB0-XB7 VLS I – Data input pins Power supply pin for analog circuit Start pulse input/cascade output pin 2 LH168R BLOCK DIAGRAM VCC GND 387 GND GND 385 462 464 LBR 388 SPOI 437 SHIFT REGISTER CK 416 415 SPIO POLA 417 PLOB 418 1 2 XA0 446 454 XB0 XA7 453 461 XB7 YA0 438 405 YB0 YA7 445 412 YB7 ZA0 389 397 ZB0 ZA7 396 404 ZB7 128 8x2 DATA LATCH 8x2 SAMPLING MEMORY 8x2 8 8 8 LS 414 HOLD MEMORY 8 8 8 463 VLS LEVEL SHIFTER 8 8 8 VH0 436 VH256 428 VL256 427 18 REFERENCE VOLTAGE GENERATION CIRCUIT 256 x 2 DA CONVERTER VL0 419 REV 413 OUTPUT CIRCUIT 1 2 3 XO1 YO1 ZO1 3 382 383 384 XO128 YO128 ZO128 386 VLS LH168R FUNCTIONAL OPERATIONS OF EACH BLOCK BLOCK Shift Register FUNCTION Used as a bi-directional shift register which performs the shifting operation by CK and Data Latch selects bits for data sampling. Used to temporary latch the input data which is sent to the sampling memory. Sampling Memory Hold memory Used to sample the data to be entered by time sharing. Used for latch processing of data in the sampling memory by LS input. Level Shifter Used to shift the data in the hold memory to the power supply level of the analog circuit unit and sends the shifted data to DA converter. Reference Voltage Generation Circuit DA Converter Output Circuit Used to generate a gamma-corrected 256 x 2-level voltage by the resistor dividing circuit. Used to generate an analog signal according to the display data and sends the signal to the output circuit. Used as a voltage follower, configured with an operational amplifier and an output buffer, which outputs analog signals of 256 x 2 gray scales to LCD drive output pin. INPUT/OUTPUT CIRCUITS VCC I To Internal Circuit GND ¿Applicable pins¡ CK, LS, REV, LBR, XA0-XA7, XB0-XB7, YA0-YA7, YB0-YB7, ZA0-ZA7, ZB0-ZB7 Fig. 1 Input Circuit (1) VCC I To Internal Circuit GND ¿Applicable pins¡ POLA, POLB GND Fig. 2 Input Circuit (2) 4 LH168R Pch Tr I VCC Output Signal O Output Control Signal Nch Tr GND VCC To Internal Circuit ¿Applicable pins¡ SPIO, SPOI GND Fig. 3 Input/Output Circuit VLS Operational Amplifier O + From Internal Circuit ¿Applicable pins¡ XO1-XO128, YO1-YO128, ZO1-ZO128 – GND Fig. 4 Output Circuit 5 LH168R FUNCTIONAL DESCRIPTION Pin Functions SYMBOL VCC VLS FUNCTION Used as power supply pin for digital circuit, connected to +2.5 to +3.6 V. GND Used as power supply pin for analog circuit, connected to +8.0 to +13.0 V. Used as ground pin, connected to 0 V. SPIO Used as input pins of start pulse and also used as output pins for cascade connection. When "H" is input into start pulse input pin, data sampling is started. On completion of SPOI sampling, "H" pulse is output to output pin for cascade connection. Pin functions are LBR LS CK VH0-VH256 VL0-VL256 XA0-XA7, YA0-YA7 ZA0-ZA7, XB0-XB7 YB0-YB7, ZB0-ZB7 selected by LBR. For selecting , refer to "Functional Operations". Used as input pin for selecting the shift register direction. For selecting, refer to "Functional Operations". Used as input pin for parallel transfer from sampling memory to hold memory. Data is transferred at the rising edge and output from LCD drive output pin. Used as shift clock input pin. Data is latched into sampling memory from data input pin at the rising edge. Used as reference voltage input pins. Hold the reference voltage fixed during the period of LCD drive output. For relation between input data and output voltage values, refer to "Output Voltage Value". For internal gamma correction, refer to "Gamma Correction Value". Observe the following relation for input voltage. VLS > VH0 ≥ VH32 ≥ π ≥ VH256 ≥ VL256 ≥ π ≥ VL32 ≥ VL0 > GND. Used as data input pins of R, G, and B colors. 8-bit x 2-pixel data are input from data pins at the rising edge of CK. For relation between input data and output voltage values, refer to "Functional Operations" and "Output Voltage Value". Select the data to be entered into X, Y, and Z according to picture element arrays of the panel. Used as LCD drive output pins which output the voltage corresponding to the input of data XO1-XO128 YO1-YO128 ZO1-ZO128 input pins (XA0 to XA7, YA0 to YA7, ZA0 to ZA7, XB0 to XB7, YB0 to YB7, ZB0 to ZB7). Data of XO1 to XO128 correspond to XA0 to XA7 and XB0 to XB7. Data of YO1 to YO128 correspond to YA0 to YA7 and YB0 to YB7, and data of ZO1 to ZO128 correspond to ZA0 to ZA7 and ZB0 to ZB7. For relation between input data and output voltage values, refer to "Functional Operations" and "Output Voltage Value". POLA POLB Used as input pins for input data polarity exchange, POLA corresponds to XA0 to XA7, YA0 to YA7 and ZA0 to ZA7, and POLB corresponds to XB0 to XB7, YB0 to YB7 and ZB0 to ZB7. When "L" is entered, display data becomes normal mode. When "H" is entered, input data becomes polarity exchange mode. For relation between input data and output voltage values, refer to "Output Voltage Value". These pins are pulled down at the inside. REV Used as polarity exchange pin of LCD drive output. Date is taken at the term when LS is "H" and the output polarity of the LCD drive output pin is determined. For exchanging, refer to "Output Characteristics". 6 LH168R Functional Operations The following describes the relation between data input pin and output direction. Data input pin XA0-XA7 YA0-YA7 ZA0-ZA7 XB0-XB7 YB0-YB7 ZB0-ZB7 Output XO1 YO1 ZO1 XO2 YO2 ZO2 direction πππ πππ XB0-XB7 YB0-YB7 ZB0-ZB7 XO128 YO128 ZO128 The following describes the relation between LBR pin, SPOI pin, SPIO pin and output direction. OUTPUT DIRECTION RIGHT SHIFT (XO1, YO1, ZO1/XO128, YO128, ZO128) LEFT SHIFT (ZO128, YO128, XO128/ZO1, YO1, XO1) H L Input Output Output Input PIN LBR SPOI SPIO NOTE : Color data corresponding to X, Y, and Z vary depending on the output direction. Output Characteristics The following describes the relation between REV pin and output polarity of LCD drive pin. REV XO1 "H" + "L" – YO1 – + + – YO2 – + + – ZO2 – + XO3 YO3 + – – + : XO126 : : – + + – – + XO127 + – YO127 – + + – YO128 – + + – ZO128 – + ZO1 XO2 YO126 ZO126 ZO127 XO128 NOTES : + : The gray scale voltages corresponding to reference voltage VH0 to VH256 are output. – : The gray scale voltages corresponding to reference voltage VL0 to VL256 are output. 7 LH168R Output Voltage Value Two voltages are selected from all of the reference voltages (V0-V256) by the upper 3-bit data (D7, D6 and D5) of the 8-bit input data (D7, D6, D5, D4, D3, D2, D1 and D0) taken by time sharing, and intermediate value is determined by the lower 5-bit data (D4, D3, D2, D1 and D0). INPUT The Vi is a reference voltage (VHi or VLi) that is determined by the polarity exchange input (REV). Relation between input data and output voltage values is shown below. (i = 0, 32, 64, 96, 128, 160, 192, 224, 256) OUTPUT VOLTAGE DATA 0 POLA (POLB) = "L" V0 POLA (POLB) = "H" V256 + (V224 – V256) x (0.99 – 0.99 x 6.61/8.96)/2.13 1 V32 + (V0 – V32) x 31/32 V32 + (V0 – V32) x 30/32 V256 + (V224 – V256) x (0.99 – 0.99 x 5.74/8.96)/2.13 V256 + (V224 – V256) x (0.99 – 0.99 x 4.87/8.96)/2.13 V32 + (V0 – V32) x 29/32 V32 + (V0 – V32) x 28/32 V256 + (V224 – V256) x (0.99 – 0.99 x 4/8.96)/2.13 V256 + (V224 – V256) x (0.99 – 0.99 x 3/8.96)/2.13 6 V32 + (V0 – V32) x 27/32 V32 + (V0 – V32) x 26/32 V256 + (V224 – V256) x (0.99 – 0.99 x 2/8.96)/2.13 V256 + (V224 – V256) x (0.99 – 0.99 x 1/8.96)/2.13 7 V32 + (V0 – V32) x 25/32 V256 + (V224 – V256) x (1.44 – 0.45 x 8/8)/2.13 8 V32 + (V0 – V32) x 24/32 V32 + (V0 – V32) x 23/32 V256 + (V224 – V256) x (1.44 – 0.45 x 7/8)/2.13 V256 + (V224 – V256) x (1.44 – 0.45 x 5/8)/2.13 B V32 + (V0 – V32) x 22/32 V32 + (V0 – V32) x 21/32 C V32 + (V0 – V32) x 20/32 V256 + (V224 – V256) x (1.44 – 0.45 x 3/8)/2.13 D V32 + (V0 – V32) x 19/32 V32 + (V0 – V32) x 18/32 V256 + (V224 – V256) x (1.44 – 0.45 x 2/8)/2.13 V256 + (V224 – V256) x (1.44 – 0.45 x 1/8)/2.13 10 V32 + (V0 – V32) x 17/32 V32 + (V0 – V32) x 16/32 V256 + (V224 – V256) x (1.8 – 0.36 x 8/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 7/8)/2.13 11 V32 + (V0 – V32) x 15/32 V256 + (V224 – V256) x (1.8 – 0.36 x 6/8)/2.13 12 V32 + (V0 – V32) x 14/32 V32 + (V0 – V32) x 13/32 V256 + (V224 – V256) x (1.8 – 0.36 x 5/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 4/8)/2.13 15 V32 + (V0 – V32) x 12/32 V32 + (V0 – V32) x 11/32 V256 + (V224 – V256) x (1.8 – 0.36 x 3/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 2/8)/2.13 16 V32 + (V0 – V32) x 10/32 V256 + (V224 – V256) x (1.8 – 0.36 x 1/8)/2.13 17 V32 + (V0 – V32) x 9/32 V32 + (V0 – V32) x 8/32 V256 + (V224 – V256) x (2.13 – 0.33 x 8/8)/2.13 V32 + (V0 – V32) x 7/32 V32 + (V0 – V32) x 6/32 V256 + (V224 – V256) x (2.13 – 0.33 x 6/8)/2.13 V256 + (V224 – V256) x (2.13 – 0.33 x 5/8)/2.13 V32 + (V0 – V32) x 5/32 V32 + (V0 – V32) x 4/32 V256 + (V224 – V256) x (2.13 – 0.33 x 4/8)/2.13 V256 + (V224 – V256) x (2.13 – 0.33 x 3/8)/2.13 1D V32 + (V0 – V32) x 3/32 V256 + (V224 – V256) x (2.13 – 0.33 x 2/8)/2.13 1E V32 + (V0 – V32) x 2/32 V32 + (V0 – V32) x 1/32 V256 + (V224 – V256) x (2.13 – 0.33 x 1/8)/2.13 V224 2 3 4 5 9 A E F 13 14 18 19 1A 1B 1C 1F V256 + (V224 – V256) x (1.44 – 0.45 x 6/8)/2.13 V256 + (V224 – V256) x (1.44 – 0.45 x 4/8)/2.13 V256 + (V224 – V256) x (2.13 – 0.33 x 7/8)/2.13 8 LH168R INPUT OUTPUT VOLTAGE DATA 20 POLA (POLB) = "L" V32 POLA (POLB) = "H" V224 + (V192 – V224) x 1/32 21 V64 + (V32 – V64) x 31/32 V64 + (V32 – V64) x 30/32 V224 + (V192 – V224) x 2/32 22 : 3D V224 + (V192 – V224) x 3/32 : : V64 + (V32 – V64) x 3/32 V224 + (V192 – V224) x 30/32 V64 + (V32 – V64) x 2/32 V64 + (V32 – V64) x 1/32 V224 + (V192 – V224) x 31/32 V192 40 V64 V192 + (V160 – V192) x 1/32 41 42 V96 + (V64 – V96) x 31/32 V96 + (V64 – V96) x 30/32 V192 + (V160 – V192) x 2/32 V192 + (V160 – V192) x 3/32 : 5D : V96 + (V64 – V96) x 3/32 V192 + (V160 – V192) x 30/32 5E V96 + (V64 – V96) x 2/32 V192 + (V160 – V192) x 31/32 5F V96 + (V64 – V96) x 1/32 V96 V160 V160 + (V128 – V160) x 1/32 V128 + (V96 – V128) x 31/32 V128 + (V96 – V128) x 30/32 V160 + (V128 – V160) x 2/32 V160 + (V128 – V160) x 3/32 3E 3F 60 61 62 : : : : 7D V128 + (V96 – V128) x 3/32 V128 + (V96 – V128) x 2/32 V160 + (V128 – V160) x 30/32 V160 + (V128 – V160) x 31/32 80 V128 + (V96 – V128) x 1/32 V128 V128 V128 + (V96 – V128) x 1/32 81 V160 + (V128 – V160) x 31/32 V128 + (V96 – V128) x 2/32 82 V160 + (V128 – V160) x 30/32 : V128 + (V96 – V128) x 3/32 : V160 + (V128 – V160) x 3/32 V160 + (V128 – V160) x 2/32 V128 + (V96 – V128) x 30/32 V128 + (V96 – V128) x 31/32 7E 7F : 9D 9E 9F A0 V160 + (V128 – V160) x 1/32 V160 V96 A1 V192 + (V160 – V192) x 31/32 V96 + (V64 – V96) x 2/32 A2 V192 + (V160 – V192) x 30/32 : V96 + (V64 – V96) x 3/32 : BE V192 + (V160 – V192) x 3/32 V192 + (V160 – V192) x 2/32 V96 + (V64 – V96) x 30/32 V96 + (V64 – V96) x 31/32 BF V192 + (V160 – V192) x 1/32 C0 C1 V192 + (V192 – V224) x 31/32 V64 + (V32 – V64) x 1/32 V64 + (V32 – V64) x 2/32 : V224 + (V192 – V224) x 30/32 : V64 + (V32 – V64) x 3/32 : DD V224 + (V192 – V224) x 3/32 V64 + (V32 – V64) x 30/32 DE V224 + (V192 – V224) x 2/32 V224 + (V192 – V224) x 1/32 V64 + (V32 – V64) x 31/32 V32 : BD C2 DF V224 V96 + (V64 – V96) x 1/32 V64 9 LH168R INPUT OUTPUT VOLTAGE DATA E0 POLA (POLB) = "L" V224 POLA (POLB) = "H" V32 + (V0 – V32) x 1/32 E1 V256 + (V224 – V256) x (2.13 – 0.33 x 1/8)/2.13 V256 + (V224 – V256) x (2.13 – 0.33 x 2/8)/2.13 V32 + (V0 – V32) x 2/32 V256 + (V224 – V256) x (2.13 – 0.33 x 3/8)/2.13 V256 + (V224 – V256) x (2.13 – 0.33 x 4/8)/2.13 V32 + (V0 – V32) x 4/32 E6 V256 + (V224 – V256) x (2.13 – 0.33 x 5/8)/2.13 V256 + (V224 – V256) x (2.13 – 0.33 x 6/8)/2.13 V32 + (V0 – V32) x 6/32 V32 + (V0 – V32) x 7/32 E7 V256 + (V224 – V256) x (2.13 – 0.33 x 7/8)/2.13 V32 + (V0 – V32) x 8/32 E8 V256 + (V224 – V256) x (2.13 – 0.33 x 8/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 1/8)/2.13 V32 + (V0 – V32) x 9/32 V32 + (V0 – V32) x 10/32 EB V256 + (V224 – V256) x (1.8 – 0.36 x 2/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 3/8)/2.13 V32 + (V0 – V32) x 11/32 V32 + (V0 – V32) x 12/32 EC V256 + (V224 – V256) x (1.8 – 0.36 x 4/8)/2.13 V32 + (V0 – V32) x 13/32 ED V256 + (V224 – V256) x (1.8 – 0.36 x 5/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 6/8)/2.13 V32 + (V0 – V32) x 14/32 V32 + (V0 – V32) x 15/32 F0 V256 + (V224 – V256) x (1.8 – 0.36 x 7/8)/2.13 V256 + (V224 – V256) x (1.8 – 0.36 x 8/8)/2.13 V32 + (V0 – V32) x 16/32 V32 + (V0 – V32) x 17/32 F1 V256 + (V224 – V256) x (1.44 – 0.45 x 1/8)/2.13 V32 + (V0 – V32) x 18/32 F2 V256 + (V224 – V256) x (1.44 – 0.45 x 2/8)/2.13 V256 + (V224 – V256) x (1.44 – 0.45 x 3/8)/2.13 V32 + (V0 – V32) x 19/32 V32 + (V0 – V32) x 20/32 F5 V256 + (V224 – V256) x (1.44 – 0.45 x 4/8)/2.13 V256 + (V224 – V256) x (1.44 – 0.45 x 5/8)/2.13 V32 + (V0 – V32) x 21/32 V32 + (V0 – V32) x 22/32 F6 V256 + (V224 – V256) x (1.44 – 0.45 x 6/8)/2.13 V32 + (V0 – V32) x 23/32 F7 V256 + (V224 – V256) x (1.44 – 0.45 x 7/8)/2.13 V256 + (V224 – V256) x (1.44 – 0.45 x 8/8)/2.13 V32 + (V0 – V32) x 24/32 V32 + (V0 – V32) x 25/32 V256 + (V224 – V256) x (0.99 – 0.99 x 1/8.96)/2.13 V256 + (V224 – V256) x (0.99 – 0.99 x 2/8.96)/2.13 V32 + (V0 – V32) x 26/32 V32 + (V0 – V32) x 27/32 V256 + (V224 – V256) x (0.99 – 0.99 x 3/8.96)/2.13 V256 + (V224 – V256) x (0.99 – 0.99 x 4/8.96)/2.13 V32 + (V0 – V32) x 28/32 V32 + (V0 – V32) x 29/32 FD V256 + (V224 – V256) x (0.99 – 0.99 x 4.87/8.96)/2.13 V32 + (V0 – V32) x 30/32 FE V256 + (V224 – V256) x (0.99 – 0.99 x 5.74/8.96)/2.13 V256 + (V224 – V256) x (0.99 – 0.99 x 6.61/8.96)/2.13 V32 + (V0 – V32) x 31/32 V0 E2 E3 E4 E5 E9 EA EE EF F3 F4 F8 F9 FA FB FC FF 10 V32 + (V0 – V32) x 3/32 V32 + (V0 – V32) x 5/32 LH168R ‹ (Gamma) Correction Value Between reference voltage input pins VH0 and VH256, 256 resistors are connected in series. And between reference voltage input pins VL0 and VL256, 256 resistors are connected in series. No resistor is connected between reference voltage input pins VH256 and VL256. The ‹ correction curve is a broken line connected between intermediate voltage inputs (VH32, VH64, VH96, VH128, VH160, VH192, VH224, VL32, VL64, VL96, VL128, VL160, VL192 and VL224). Each ‹ correction value between the intermediate voltage inputs is divided into 32 parts by resistor. LH168R External Reference Voltage VH0 VH32 R0 32 equal parts VH64 R1 32 equal parts VH96 R2 32 equal parts VH128 R3 32 equal parts VH160 R4 32 equal parts VH192 R5 32 equal parts VH224 R6 32 equal parts R70 8 equal parts R71 8 equal parts R72 8 equal parts R73 8 parts R83 8 parts R82 8 equal parts R81 8 equal parts VL224 R80 8 equal parts VL192 R9 32 equal parts VL160 R10 32 equal parts VL128 R11 32 equal parts VL96 R12 32 equal parts VL64 R13 32 equal parts VL32 R14 32 equal parts VL0 R15 32 equal parts VH256 VL256 11 LH168R The following shows the ratio of ‹ correction resistance, when R0 equals 1. R0 1.00 R83 0.99 R1 R2 0.60 0.49 R82 0.45 0.36 R3 R80 R4 0.52 0.60 R9 0.33 1.00 R5 R6 0.74 1.00 R10 R11 0.74 0.60 R70 0.33 R12 0.52 R71 R13 R72 0.36 0.45 R14 0.49 0.60 R73 0.99 R15 1.00 R81 The following shows the ratio of ‹ correction resistance of R73 and R83, when R730 equals 1. R73 R730 R731 1.00 1.00 R837 (VL256 side) R836 2.35 0.87 R732 R733 1.00 1.00 R835 R834 0.87 0.87 R734 0.87 R833 1.00 R735 R736 0.87 0.87 R832 R831 1.00 1.00 R737 (VH256 side) 2.35 R830 1.00 R83 PRECAUTIONS Reference voltage input The relation of the reference voltage input is shown here. Precautions when connecting or disconnecting the power supply This IC has some power supply pins, so it may be permanently damaged by a high current which may flow if voltage is supplied to the LCD drive power supply while the logic system power supply is floating. Therefore, when connecting the power supply, observe the following sequence. VLS > VH0 ≥ VH32 ≥ π ≥ VH224 ≥ VH256 ≥ 0.5VLS ≥ VL256 ≥ VL224 ≥ π ≥ VL32 ≥ VL0 > GND Maximum ratings When connecting or disconnecting the power supply, this IC must be used within the range of the absolute maximum ratings. VCC / logic input / VLS, VH0-VH256, VL0-VL256 When disconnecting the power supply, follow the reverse sequence. Target output load This IC is designed for a 200 pF output load capacity. When using this IC for other than 200 pF panels, confirm the device is having no problem before using it. 12 LH168R ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage SYMBOL VCC APPLICABLE PINS VCC RATING –0.3 to +6.0 UNIT V VLS VLS –0.3 to +14.0 V VH0-VL0 –0.3 to VLS + 0.3 V –0.3 to VCC + 0.3 V VI Input voltage VI SPIO, SPOI, CK, LS, REV, LBR, POLA, POLB, XA0-XA7, XB0-XB7, YA0-YA7, YB0-YB7, ZA0-ZA7, ZB0-ZB7 Output voltage Storage temperature VO SPIO, SPOI –0.3 to VCC + 0.3 V VO XO1-ZO128 –0.3 to VLS + 0.3 –45 to +125 V ˚C TSTG NOTES : 1. TA = +25 ˚C 2. The maximum applicable voltage on any pin with respect to GND (0 V). RECOMMENDED OPERATING CONDITIONS PARAMETER Supply voltage Reference voltage input SYMBOL VCC MIN. +2.5 VLS +8.0 TYP. VH0-VH256 0.5VCC VL0-VL256 +0.2 MAX. +3.6 UNIT V +13.0 V VLS – 0.2 0.5VCC V V Clock frequency fCK 65 MHz LCD drive output load capacity CL 200 pF +75 ˚C Operating temperature TOPR –20 NOTE : 1. The applicable voltage on any pin with respect to GND (0 V). 13 NOTE 1 NOTE 1, 2 LH168R ELECTRICAL CHARACTERISTICS DC Characteristics PARAMETER (VCC = +2.5 to +3.6 V, VLS = +8.0 to +13.0 V, TOPR = –20 to +75 ˚C) SYMBOL CONDITIONS Input "Low" voltage VIL Input "High" voltage VIH Output "Low" voltage VOL IOL = 0.3 mA Output "H" voltage VOH IOH = –0.3 mA Input "Low" current APPLICABLE PINS XA0-XA7, YA0-YA7, ZA0-ZA7, MAX. UNIT. GND 0.3VCC V 0.7VCC VCC V GND GND + 0.4 V VCC – 0.4 VCC V 10 µA 10 µA POLA, POLB 400 µA VCC-GND 14 mA VCC-GND 1.5 mA VLS-GND 5 mA VLS-GND 4 mA GND + 0.2 VLS – 0.2 V –10 +10 mV XB0-XB7, YB0-YB7, ZB0-ZB7, SPIO, SPOI, CK, LS, LBR, REV, POLA, POLB SPIO, SPOI MIN. TYP. XA0-XA7, YA0-YA7, ZA0-ZA7, XB0-XB7, YB0-YB7, ZB0-ZB7, IILL1 SPIO, SPOI, CK, LS, LBR, REV, POLA, POLB NOTE XA0-XA7, YA0-YA7, ZA0-ZA7, Input "High" current XB0-XB7, YB0-YB7, ZB0-ZB7, IILH1 SPIO, SPOI, CK, LS, LBR, REV IILH2 Supply current (In operation mode) Supply current (In standby mode) Supply current (In operation mode) Supply current (In standby mode) fCK = 65 MHz ICC1 ICC2 fLS = 50 kHz (Data sampling state) fCK = 65 MHz fLS = 50 kHz SPI = GND is fixed. (Standby state) fCK = 65 MHz ILS1 ILS2 fLS = 50 kHz (Data sampling state) fCK = 65 MHz fLS = 50 kHz SPI = GND is fixed. (Standby state) Output voltage range VOUT Deviations between output voltage pins VOD Output current IO1-IO4 Resistance between reference voltage input pins RGMAH RGMAL XO1-ZO128 VH0-VH256 VL0-VL256 14 200 µA 20 20 k$ k$ 1 2 LH168R NOTES : 1. Criterion of evaluating voltage deviations. (a) Between output voltage pins Measuring values : Output voltage value at the time after 10 µs at the rising edge of LS. (Average of several times) (Conditions) Output load capacity is 200 pF. In a state when the reference voltage is fixed. Expecting values : Calculated following these specifications. (Conditions) In a state when the reference voltage is fixed. (b) Between LCD drivers Measuring values : Applicable to (a). (Conditions) Applicable to (a). Expecting values : Applicable to (a). (Conditions) Applicable to (a). Each input voltage between the LCD drivers must be made perfectly equal by connecting corresponding reference voltage input pins. 2. IO1 : Applied voltage = 8.0 V for output pins XO1 to ZO128. Output voltage = 7.5 V for output pins XO1 to ZO128. VLS = 10.0 V IO2 : Applied voltage = 7.0 V for output pins XO1 to ZO128. Output voltage = 7.5 V for output pins XO1 to ZO128. VLS = 10.0 V IO3 : Applied voltage = 3.0 V for output pins XO1 to ZO128. Output voltage = 2.5 V for output pins XO1 to ZO128. VLS = 10.0 V IO4 : Applied voltage = 2.0 V for output pins XO1 to ZO128. Output voltage = 2.5 V for output pins XO1 to ZO128. VLS = 10.0 V 15 LH168R AC Characteristics PARAMETER Clock frequency "H" level pulse width "L" level pulse width (VCC = +2.5 to +2.7 V, VLS = +8.0 to +13.0 V, TOPR = –20 to +75 ˚C) SYMBOL CONDITIONS fCK tCR Input fall time tCF CK Data setup time tSUD XA0-XA7, YA0-YA7, ZA0-ZA7, XB0-XB7, YB0-YB7, ZB0-ZB7, Data hold time tHD POLA, POLB Start pulse setup time tSUSP Start pulse hold time tHSP Start pulse width tWSP Start pulse output delay time LCD drive output delay time 1 LCD drive output delay time 2 CL = 15 pF tDO1 CL = 200 pF tDO2 LS signal-CK signal hold time tHLS setup time REV signal-LS signal hold time MAX. 40 UNIT MHz ns ns 10 ns 10 ns 6 ns 6 ns 6 6 ns ns 1 -------fCK ns 19 ns 3 µs 10 µs XO1-ZO128 tLSSP width REV signal-LS signal TYP. 8 SPIO, SPOI tDSP LS signal-SPI signal setup time LS signal "H" level MIN. 8 tCWH tCWL Input rise time APPLICABLE PINS CL = 200 pF 1 -------fCK ns 7 ns tWLS 1 -------fCK ns tSURV 14 ns 10 ns LS REV tHRV 16 LH168R (VCC = +2.7 to +3.6 V, VLS = +8.0 to +13.0 V, TOPR = –20 to +75 ˚C) PARAMETER Clock frequency "H" level pulse width "L" level pulse width SYMBOL CONDITIONS fCK tCR Input fall time tCF CK Data setup time tSUD XA0-XA7, YA0-YA7, ZA0-ZA7, XB0-XB7, YB0-YB7, ZB0-ZB7, Data hold time tHD POLA, POLB Start pulse setup time tSUSP Start pulse hold time tHSP Start pulse width tWSP Start pulse output delay time LCD drive output delay time 1 LCD drive output delay time 2 CL = 15 pF tDO1 CL = 200 pF tDO2 LS signal-CK signal hold time tHLS setup time REV signal-LS signal hold time MAX. 65 UNIT MHz ns ns 10 ns 10 ns 4 ns 1 ns 3 2 ns ns 1 -------fCK ns 11 ns 3 µs 10 µs XO1-ZO128 tLSSP width REV signal-LS signal TYP. 4 SPIO, SPOI tDSP LS signal-SPI signal setup time LS signal "H" level MIN. 4 tCWH tCWL Input rise time APPLICABLE PINS CL = 200 pF 1 -------fCK ns 7 ns tWLS 1 -------fCK ns tSURV 14 ns 10 ns LS REV tHRV 17 LH168R Timing Chart 1 fCK tcWH tcWL 1 CK tSUSP tHSP tCR 2 tCF SPIO Input (SPOI) CK tSUD tWSP XA0-XA7 YA0-YA7 ZA0-ZA7 XB0-XB7 YB0-YB7 ZB0-ZB7 POLA POLB tHD 1 LAST – 1 2 LAST tDSP SPIO Output (SPOI) tHLS tWLS LS tLSSP SPIO Input (SPOI) tSURV tHRV REV tDO1 Target voltage ±(VLS x 0.1) XO1-ZO128 Target voltage (8-bit accuracy) tDO2 18 0.5 (SL) 0.8 (SL) 4.6 (SL) 8.0 (SL) 4.6 (SL) 25.0±0.05 (Holes) 21.4±0.05 (Holes) 12.7 (SL) ZO128 8.0 (SL) 13.6±0.2 (SR) 13.5 (SL) 20.4MAX.(Resin area) P0.065 x (400 – 1) – 0.028 = 25.907±0.035 W0.033±0.015 26.6 (SL) 13.35 (SR) 13.35 (SR) [27.6 (E.L.)] 28.0 XO1 12.7 (SL) 1.5 (SL) 34.975 31.82 [27.6 (E.L.)] P0.35 x (77 – 1) = 26.6±0.04 W0.15±0.02 10.5±0.5 4.0 (SL) (SR) 13.6 13.5 (SL) 0.6 (SL) ±0.2 6.32±0.2 (SR) 7.32 (SL) [8.32(E.L.)] [14.5 (E.L.)] 9.32(SL) 9.62±0.5 2.88 (SL) 3.98±0.2 (SR) 5.08±0.05 [6.18 (E.L.)] UPILEX is a trademark of UBE INDUSTRIES, LTD.. 19 ZO1 YO1 XO1 DUMMY DUMMY DUMMY VCOM VCOM VCOM R21 R20 2.9(SL) 1.7(SL) 4.6(SL) 3.5±0.05 (Holes) 4.1±0.05 (Holes) 0.6 (SL) [2.2TYP.(2.0MIN.)] 0.75 [1.1] [1.225] [1.65] [2.2TYP.(2.0MIN.)] 35 mm Super wide 4 pitches Substrate Adhesive Cu foil [thickness] Solder resist 1.0MAX. Total 0.75MAX. Backside 1.42±0.05 UPILEX S75 #7100 FQ-VLP 15 µm Poly urethane SSF ø Tape Material 0.2 Pattern side MAX. Chip center Sprocket center 0.6(MAX.) (Backside PI coating) 2-R0.6 (SR) 2-Ø0.6 (Cu hole) 2-Ø1.0 (PI) 2-R0.8 (Cu) PACKAGE Tape width Tape type Perforation pitch 5.8MAX. (Resin area) R10 R11 VCOM VCOM VCOM DUMMY DUMMY DUMMY ZO128 YO128 XO128 ø Tape Specification 1.5 (SL) 0.6 (SL) 2-Ø0.9 (Cu) 2-Ø0.6 (PI) 1.0 0.05 [0.45] Device center 1.42±0.05 4.75±0.05 [0.1] Film center R10 R11 VCOM GND VLS VCC LBR ZA0 ZA1 ZA2 ZA3 ZA4 ZA5 ZA6 ZA7 ZB0 ZB1 ZB2 ZB3 ZB4 ZB5 ZB6 ZB7 YB0 YB1 YB2 YB3 YB4 YB5 YB6 YB7 REV LS SPIO CK VL0 VL64 VL128 VL192 VL256 VH256 VH192 VH128 VH64 VH0 SPOI YA0 YA1 YA2 YA3 YA4 YA5 YA6 YA7 XA0 XA1 XA2 XA3 XA4 XA5 XA6 XA7 XB0 XB1 XB2 XB3 XB4 XB5 XB6 XB7 DUMMY GND VLS GND VCOM R21 R20 Ø1.0 (Good device hole) LH168R01 PACKAGES FOR LCD DRIVERS (Unit : mm) 0.4±0.2 (Backside PI coating) 0.6(MAX.) (Backside PI coating) 0.05 0.1±0.02 [0.3]