TSM109/A DUAL COMPARATOR AND VOLTAGE REFERENCE COMPARATOR ■ LOW SUPPLY CURRENT (1.1mA) INDEPENDENT OF SUPPLY VOLTAGE ■ LOW INPUT BIAS CURRENT : 25nA TYP ■ LOW INPUT OFFSET VOLTAGE : ±1mV TYP ■ INPUT COMMON-MODE VOLTAGE RANGE N DIP8 INCLUDES GROUND ■ LOW OUTPUT SATURATION VOLTAGE : 250mV TYP; (Io = 4mA) ■ DIFFERENTIAL INPUT VOLTAGE RANGE EQUAL TO THE SUPPLY VOLTAGE ■ WIDE POWER SUPPLY RANGE : ±1V to ±18V D SO8 ■ ESD PROTECTION : 1.5kV VOLTAGE REFERENCE ■ Fixed Vref to 2.5V ■ 0.4% AND 1% VOLTAGE PRECISION ■ SINK CURRENT CAPABILITY : 1 to 100mA DESCRIPTION The TSM109 is a monolithic IC that includes two comparators and a shunt voltage reference. This device offers space and cost savings in many applications including power supply management or data acquisition systems. ORDER CODE Part Number Temperature Range TSM109 TSM109A -40°C, +105°C -40°C, +105°C Package N D • • • • N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) PIN CONNECTIONS (top view) 1 2 3 4 November 2002 Out Vcc Vref Out Ve+ Ve- Gnd Ve+ 8 7 6 5 1/7 TSM109/A ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC Supply voltage 36 V Vid Differential Input Voltage 36 V Vin Input Voltage Ik Continuous Cathode current range Toper Tj Rthja ESD -0.3 to Vcc +0.3 V -100 to 150 mA -40 to105 °C Operating Free-air Temperature Range Maximum Junction Temperature 150 °C Thermal Resistance Junction to Ambient (SO package) Electrostatic Discharge Protection 175 1.5 °C/W kV ELECTRICAL CHARACTERISTICS VCC+ = 5V, V CC- = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC 2/7 Parameter Total Supply Current, excluding current in the Voltage Reference VCC = +5V, no load VCC = +30V, no load Min Typ Max Unit 0.4 1 1 2.5 mA TSM109/A ELECTRICAL CHARACTERISTICS COMPARATOR (independent comparator) VCC+ = +5V, VCC-= GND, Tamb = +25°C (unless otherwise specified) TSM109 Symbol Parameter Unit Min. Typ. Max. Vio Input Offset Voltage - note 1) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 1 5 9 mV Iio Input Offset Current Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 3 25 100 nA Iib Input Bias Current (I+ or I-) - note 2) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 25 250 400 nA Avd Vicm Large Signal Voltage Gain VCC = 15V, RL = 15kΩ, Vo = 1V to 11V Input Common Mode Voltage Range - note VCC = 30V Tamb = +25°C Tmin ≤ Tamb ≤ Tmax Vid Differential Input Voltage -note 4) VOL Low Level Output Voltage Vid = -1V, Isink = 4mA Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 50 200 V/mV 3) VCC+ -1.5 0 0 V VCC+ -2 VCC+ 250 400 700 mV 30 150 1 nA µA High Level Output Current (Vid = 1V) IOH Isink 1. 2. 3. 4. 5. VCC = Vo = 30V Tamb = +25°C Tmin ≤ Tamb ≤ Tmax Output Sink Currrent Vid= 1V, Vo = 1.5V 10 20 mA tre Response Time - note 5) RL= 5.1kΩ connected to VCC+ 1.3 µs trel Large Signal Response Time RL= 5.1kΩ connected to VCC+, el = TTL, V(ref) = +1.4v 300 ns At output switch point, Vo ≈ 1.4V, R s = 0 with VCC + from 5V to 30V, and over the full common-mode range (0V to VCC + -1.5V). The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so no loading charge exists on the reference of input lines. The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common-mode voltage range is VCC + -1.5V, but either or both inputs can go to +30V without damage. Positive voltage excursions of one input may exceed the power supply level. As long as the other input voltage remains within the common-mode range, the comparator will provide an appropriate output state. The low input voltage state must not be less than -0.3V (or 0.3V below the negative power supply, if used). The response time specified is for a 100mV input step with 5mV overdrive. For larger overdrive signals, 300ns can be obtained 3/7 TSM109/A COMPARATOR (comparator with inverting input connected to the internal Vref)) VCC+ = +5V, VCC-= GND, Tamb = +25°C (unless otherwise specified) TSM109 Symbol Parameter Unit Min. Typ. Max. Vio Input Offset Voltage - note 1) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 1 5 9 mV Iib Input Bias Current for positive input note 2) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 25 250 400 nA Avd Large Signal Voltage Gain VCC = 15V, RL = 15kΩ, Vo = 1V to 11V VOL Low Level Output Voltage Vid = -1V, Isink = 4mA Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 50 200 V/mV 250 400 700 mV 30 150 1 nA µA High Level Output Current (Vid = 1V) IOH Isink VCC = Vo = 30V Tamb = +25°C Tmin ≤ Tamb ≤ Tmax Output Sink Currrent Vid= 1V, Vo = 1.5V 10 20 mA 3) 1. 2. 3. 4/7 tre Response Time - note RL= 5.1kΩ connected to VCC+ 1.3 µs trel Large Signal Response Time RL= 5.1kΩ connected to VCC+, el = TTL, V(ref) = +1.4v 300 ns At output switch point, Vo ≈ 1.4V, R s = 0 with VCC from 5V to 30V, and over the full common-mode range (0V to VCC -1.5V). The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output, so no loading charge exists on the reference of input lines. The response time specified is for a 100mV input step with 5mV overdrive. For larger overdrive signals, 300ns can be obtained. + + TSM109/A ELECTRICAL CHARACTERISTICS VOLTAGE REFERENCE Symbol IK Conditions Cathode Current Value Unit 1 to 100 mA Tamb = 25°C (unless otherwise specified) TSM109A Symbol Unit Min. Vref ∆Vref Reference Input Voltage, IK = 10 mA Tamb = 25°C Tmin ≤ Tamb ≤ Tmax Reference Input Voltage Deviation OverTemperature Range IK = 10 mA Tmin ≤Tamb ≤ Tmax |ZVref| Typ. Max. Min. Typ. Max. 2.490 2.500 2.510 2.475 2.500 2.525 2.48 2.52 2.45 V 2.55 7 30 7 30 mV ±13 ±90 ±13 ±90 ppm/°C Minimum Cathode Current for Regulation 0.5 1 0.5 1 mA Dynamic Impedance - note 1) ∆Vref, ∆IK = 1 to 100mA, f < 1KHz 0.3 0.65 0.3 0.65 Ω Temperature Coefficient of Reference Input Voltage ∆Vref IK = 10 mA, -------------------Vref∆T Tmin ≤Tamb ≤ Tmax Imin TSM109 Parameter 1. The dynamic impedance is defined as [Z Vref| = ∆VVref/∆IK 5/7 TSM109/A PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Inches Dimensions Min. A a1 B b b1 D E e e3 e4 F i L Z 6/7 Typ. Max. Min. 3.32 0.51 1.15 0.356 0.204 1.65 0.55 0.304 10.92 9.75 7.95 0.020 0.045 0.014 0.008 Max. 0.065 0.022 0.012 0.430 0.384 0.313 2.54 7.62 7.62 3.18 Typ. 0.131 0.100 0.300 0.300 6.6 5.08 3.81 1.52 0.125 0260 0.200 0.150 0.060 TSM109/A PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) Dimensions A A1 A2 b c D E E1 e L L1 k aaa Millimeters Min. Typ. 0.050 0.780 0.250 0.130 2.900 4.750 2.900 0.100 0.860 0.330 0.180 3.000 4.900 3.000 0.650 0.550 0.950 3d 0.400 0d Inches Max. Min. Typ. 1.100 0.150 0.940 0.400 0.230 3.100 5.050 3.100 0.002 0.031 0.010 0.005 0.114 0.187 0.114 0.700 0.016 6d 0.100 0d 0.004 0.034 0.013 0.007 0.118 0.193 0.118 0.026 0.022 0.037 3d Max. 0.043 0.006 0.037 0.016 0.009 0.122 0.199 0.122 0.028 6d 0.004 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www.st.com 7/7