PHILIPS TDA6501TT

INTEGRATED CIRCUITS
DATA SHEET
TDA6500TT; TDA6501TT
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
Product specification
2003 Jun 05
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
CONTENTS
1
FEATURES
2
APPLICATIONS
3
GENERAL DESCRIPTION
4
ORDERING INFORMATION
5
BLOCK DIAGRAM
6
PINNING
7
FUNCTIONAL DESCRIPTION
8
LIMITING VALUES
9
THERMAL CHARACTERISTICS
2003 Jun 05
2
TDA6500TT; TDA6501TT
10
CHARACTERISTICS
11
APPLICATION INFORMATION
12
INTERNAL PIN CONFIGURATION
13
PACKAGE OUTLINE
14
SOLDERING
15
DATA SHEET STATUS
16
DEFINITIONS
17
DISCLAIMERS
18
PURCHASE OF PHILIPS I2C COMPONENTS
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
1
TDA6500TT; TDA6501TT
FEATURES
• Single-chip 5 V mixer/oscillator and synthesizer for
TV and VCR tuners
• I2C-bus protocol compatible with 3.3 V and 5 V
microcontrollers:
– Address + 6 data bytes transmission
– Address + 1 status byte (I2C-bus read mode)
– Four independent
I2C-bus
2
• TV and VCR tuners
addresses.
• Two PMOS open-drain ports with 5 mA source
capability to switch high band and FM sound trap
(P2 and P3)
• Specially suited for switched concepts, all systems
• Specially suited for strong off-air reception.
• One PMOS open-drain port with 20 mA source
capability to switch the mid band (P1)
• One PMOS open-drain port with 10 mA source
capability to switch the low band (P0)
• Five step, 3-bit Analog-to-Digital Converter (ADC) and
NPN open-collector general purpose port with 5 mA
sinking capability (P6)
• NPN open-collector general purpose port with 5 mA
sinking capability (P4)
• Internal AGC flag
• In-lock flag
• 33 V tuning voltage output
• 15-bit programmable divider
• Programmable reference divider ratio: 64, 80 or 128
• Programmable charge pump current: 60 or 280 µA
• Varicap drive disable
• Balanced mixer with a common emitter input for the low
band (single input)
• Balanced mixer with a common base input for the mid
and high bands (balanced input)
• 2-pin asymmetrical oscillator for the low band
• 2-pin asymmetrical oscillator for the mid band
• 4-pin symmetrical oscillator for the high band
• Frequency ranges: see Table 1
• IF preamplifier with asymmetrical 75 Ω output
impedance to drive a SAW filter (500 Ω/40 pF)
• Wide-band AGC detector for internal tuner AGC:
– Five programmable take-over points
– Two programmable time constants.
2003 Jun 05
APPLICATIONS
3
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
3
TDA6500TT; TDA6501TT
GENERAL DESCRIPTION
The synthesizer consists of a 15-bit programmable divider,
a crystal oscillator and its programmable reference divider
and a phase/frequency detector combined with a charge
pump, which drives the tuning amplifier including 33 V
output.
TDA6500TT and TDA6501TT are programmable 2-mixer,
3-oscillator and synthesizer MOPLL intended for pure
3-band tuner concepts (see Fig.1).
The device includes two double balanced mixers for the
low and mid/high bands and three oscillators for the low,
mid and high bands respectively. The band limits for PAL
tuners are shown in Table 1. Other functions are an
IF amplifier, a wide-band AGC detector and a PLL
synthesizer. Two pins are available between the mixer
output and the IF amplifier input to enable IF filtering for
improved signal handling.
Table 1
Depending on the reference divider ratio (64, 80 or 128)
the phase comparator operates at 62.50 kHz, 50.00 kHz
or 31.25 kHz with a 4 MHz crystal.
The device can be controlled according to the I2C-bus
format. The lock detector bit FL is set to logic 1 when the
loop is locked. The AGC bit is set to logic 1 when the
internal AGC is active (level below 3 V). These two flags
are read on the SDA line (status byte) during a read
operation (see Table 8).
Low, mid and high band limits
The ADC input is available on pin P6/ADC for digital AFC
control. The ADC code is read during a read operation
(see Table 8). In test mode, pin P6/ADC is used as a test
output for 1⁄2fref and 1⁄2fdiv (see Table 5).
RFpix INPUT (MHz) OSCILLATOR (MHz)
BAND
Low
MIN.
MAX.
MIN.
MAX.
45.25
154.25
84.15
193.15
Mid
161.25
439.25
200.15
478.15
High
455.25
855.25
494.15
894.15
A minimum of seven bytes, including address byte, is
required to address the device, select the VCO frequency,
program the ports, set the charge pump current, set the
reference divider ratio, select the AGC take-over point and
select the AGC time constant. The device has
four independent I2C-bus addresses which can be
selected by applying a specific voltage on input AS
(see Table 4).
Bit P0 enables Port P0 and the low band mixer and
oscillator. Bit P1 enables Port P1, the mid/high band mixer
and the mid band oscillator. Bit P2 enables Port P2 and
bit P3 enables Port P3. When P0 and P1 are disabled, the
mid/high band mixer and the high band oscillator are
enabled.
The AGC detector provides information about the
IF amplifier level. Five AGC take-over points are available
by software. Two programmable AGC time constants are
available for search tuning and normal tuner operation.
4
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
TDA6500TT
TDA6501TT
2003 Jun 05
DESCRIPTION
TSSOP32 plastic thin shrink small outline package; 32 leads; body width 6.1 mm;
lead pitch 0.65 mm
4
VERSION
SOT487-1
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
5
TDA6500TT; TDA6501TT
BLOCK DIAGRAM
VCC
handbook, full pagewidth
10 (23)
(8) 25
(6) 27
VCC
(5) 28
VSTAB
STABILIZER
AL0, AL1,
AL2
AGC
DETECTOR
SAW
DRIVER
AGC
(21) 12
ATC
LBIN
RFGND
(22) 11
30 (3)
(31) 2
RF INPUT
LOW
29 (4)
MIXER
LOW
LOW
OSCILLATOR
AGC
IFFIL1
IFFIL2
IFOUT
IFGND
LOSCOUT
(32) 1
LOSCIN
(30) 3
P0
OSCGND
P0
(29) 4
MID
OSCILLATOR
MOSCOUT
(28) 5
MOSCIN
MHBIN1
MHBIN2
31 (2)
RF INPUT
MID + HIGH
32 (1)
MIXER
MID + HIGH
P1
(27) 6
HOSCIN1
(26) 7
HIGH
OSCILLATOR
(25) 8
(24) 9
P1 + P0 . P1
PLLGND
14 (19)
CRYSTAL
OSCILLATOR
REFERENCE
DIVIDER
64, 80, 128
RSA
13 (20)
RSB
15-BIT
PROGRAMMABLE
DIVIDER
SCL
(18) 15
PHASE
COMPARATOR
CHARGE
PUMP
T0, T1, T2
fdiv
SDA
AS
FL
1
T2
fdiv
GATE
T0 RSA RSB OS
AUXILIARY
REGISTER
0
0
0
0
BAND SWITCH
REGISTER
FL AGC
3-BIT ADC
T1
ATC AL2 AL1 AL0
fref
T0, T1, T2
P6
0
18 (15)
P6/ADC
0
17 22 26
(16) (11) (7)
P4
The pin numbers in parenthesis represent the TDA6501TT.
Fig.1 Block diagram.
2003 Jun 05
CP
I2C-BUS
TRANSCEIVER
POWER
ON RESET
OS
CONTROL
REGISTER
STATUS
REGISTER
POR
VT
OPAMP
CP
20 (13)
21 (12)
CP
Vref
15-BIT
FREQUENCY
REGISTER
19 (14)
(17) 16
fref
LOCK
DETECTOR
TDA6500TT
(TDA6501TT)
HOSCOUT1
HOSCIN2
P0 . P1
XTAL
HOSCOUT2
5
P3
P2
24
(9)
P1
23
(10)
P0
MCE149
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
6
TDA6500TT; TDA6501TT
PINNING
PIN
SYMBOL
DESCRIPTION
TDA6500TT
TDA6501TT
LOSCIN
1
32
low band oscillator input
LOSCOUT
2
31
low band oscillator output
OSCGND
3
30
oscillator ground
MOSCOUT
4
29
mid band oscillator output
MOSCIN
5
28
mid band oscillator input
HOSCIN1
6
27
high band oscillator input
HOSCOUT2
7
26
high band oscillator output 2
HOSCOUT1
8
25
high band oscillator output 1
HOSCIN2
9
24
high band oscillator input 2
VCC
10
23
supply voltage
IFGND
11
22
IF ground
IFOUT
12
21
IF output
PLLGND
13
20
digital ground
XTAL
14
19
crystal oscillator input
VT
15
18
tuning voltage output
CP
16
17
charge pump output
P4
17
16
NPN open-collector general purpose port
P6/ADC
18
15
NPN open-collector general purpose port or ADC input
SDA
19
14
serial data input and output
SCL
20
13
serial clock input
AS
21
12
address selection input
P3
22
11
PMOS open-drain general purpose port
P0
23
10
PMOS open-drain port to select low band operation
P1
24
9
PMOS open-drain port to select mid band operation
AGC
25
8
AGC output
P2
26
7
PMOS open-drain general purpose port
IFFIL1
27
6
IF filter output 1
IFFIL2
28
5
IF filter output 2
RFGND
29
4
RF ground
LBIN
30
3
low band RF input
MHBIN1
31
2
mid and high band RF input 1
MHBIN2
32
1
mid and high band RF input 2
2003 Jun 05
6
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, halfpage
LOSCIN
1
32 MHBIN2
LOSCOUT
2
31 MHBIN1
OSCGND
3
30 LBIN
MOSCOUT
4
29 RFGND
MOSCIN
5
HOSCIN1
handbook, halfpage
MHBIN2
1
32 LOSCIN
MHBIN1
2
31 LOSCOUT
LBIN
3
30 OSCGND
RFGND
4
29 MOSCOUT
28 IFFIL2
IFFIL2
5
28 MOSCIN
6
27 IFFIL1
IFFIL1
6
27 HOSCIN1
HOSCOUT2
7
26 P2
P2
7
26 HOSCOUT2
HOSCOUT1
8
AGC
8
25 AGC
TDA6500TT
9
24 P1
P1
VCC 10
23 P0
P0 10
23 VCC
IFGND 11
22 P3
P3 11
22 IFGND
IFOUT 12
21 AS
AS 12
21 IFOUT
HOSCIN2
24 HOSCIN2
20 SCL
SCL 13
20 PLLGND
XTAL 14
19 SDA
SDA 14
19 XTAL
VT 15
18 P6/ADC
CP 16
17 P4
18 VT
P4 16
17 CP
Fig.3 Pin configuration TDA6501TT.
FUNCTIONAL DESCRIPTION
The first bit of the first data byte indicates whether
frequency data (first bit = 0) or control, port and auxiliary
data (first bit = 1) will follow. Until an I2C-bus STOP
command is sent by the controller, additional data bytes
can be entered without the need to re-address the device.
The frequency register is loaded after the 8th clock pulse
of the second divider byte DB2, the control register is
loaded after the 8th clock pulse of the control byte CB, the
band switch register is loaded after the 8th clock pulse of
the band switch byte BB and the auxiliary register is
loaded after the 8th clock pulse of the auxiliary byte AB.
The device is controlled via the I2C-bus. For programming,
a module address of 7 bits and the R/W bit for selecting the
read or the write mode is required.
Write mode
Data bytes can be sent to the device after the address
transmission (first byte). Seven data bytes are needed to
fully program the device. The bus transceiver has an
auto-increment facility, which permits the programming of
the device within one single transmission (address + 6
data bytes).
To program the AGC take-over point setting and the AGC
current to a different value than the default value, an
additional byte, the auxiliary byte, has to be sent. To this
end, the auxiliary byte is preceded by a control byte with
the test bits T2, T1 and T0 set to 011 (see Table 5).
The device can also be partially programmed providing
that the first data byte following the address is the first
divider byte DB1 or the control byte CB. The data bytes
are defined in Tables 2 and 3.
2003 Jun 05
P6/ADC 15
FCE906
Fig.2 Pin configuration TDA6500TT.
7.1
9
PLLGND 13
FCE830
7
25 HOSCOUT1
TDA6501TT
7
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
Table 2
TDA6500TT; TDA6501TT
I2C-bus data format for write mode
BIT
NAME
BYTE
ACK
MSB
LSB
1
1
0
0
0
MA1
MA0
R/W = 0
A
DB1
0
N14
N13
N12
N11
N10
N9
N8
A
DB2
N7
N6
N5
N4
N3
N2
N1
N0
A
Control byte
CB
1
CP
T2
T1
T0
RSA
RSB
OS
A
Band switch byte
BB
0
P6
0
P4
P3
P2
P1
P0
A
Auxiliary byte;
note 1
AB
ATC
AL2
AL1
AL0
0
0
0
0
A
Address byte
ADB
Divider byte 1
Divider byte 2
Note
1. Auxiliary byte AB replaces band switch byte BB when bits T2, T1 and T0 = 011.
Table 3
Description of bits shown in Table 2
SYMBOL
A
DESCRIPTION
acknowledge
MA1 and MA0
programmable address bits; see Table 4
R/W
logic 0 for write mode
N14 to N0
programmable divider bits; N = (N14 × 214) + (N13 × 213) + ... + (N1 × 21) + N0
CP
charge pump current
CP = 0, the charge pump current is 60 µA
CP = 1, the charge pump current is 280 µA (default)
T2, T1 and T0
test bits; see Table 5
RSA and RSB
reference divider ratio select bits; see Table 6
OS
tuning amplifier control bit
OS = 0, normal operation; tuning voltage is on
OS = 1, tuning voltage is off; high-impedance state (default)
P6 and P4
NPN port control bits
Pn = 0, port n is off; high-impedance state (default)
Pn = 1, buffer n is on; VO = VCE(sat)
P3 to P0
PMOS port control bits
0 = port n is off; high-impedance state (default)
1 = buffer n is on; VO = VCC − VDS(sat)
ATC
AGC time constant
ATC = 0, IAGC = 220 nA; ∆t = 2 s with C = 160 nF (default)
ATC = 1, IAGC = 9 µA; ∆t = 50 ms with C = 160 nF
AL2, AL1 and AL0
2003 Jun 05
AGC take-over point bits; see Table 7
8
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having up to 4
synthesizers in one system by applying a specific voltage on the AS input. Table 4 gives the relationship between the
input voltage applied to the AS input and bits MA1 and MA0.
Table 4
I2C-bus address selection
VOLTAGE APPLIED TO PIN AS
MA1
MA0
0 V to 0.1VCC
0
0
open or 0.2VCC to 0.3VCC
0
1
0.4VCC to 0.6VCC
1
0
0.9VCC to VCC
1
1
Table 5
Test modes
T2
T1
T0
TEST MODES
0
0
0
normal mode
0
0
1
normal mode; note 1
0
1
0
charge pump is off
0
1
1
control byte is followed by auxiliary byte AB in stead of the band switch byte BB
1
1
0
charge pump is sinking current
1
1
1
charge pump is sourcing current
2fref
2fdiv is available on pin P6/ADC; note 2
1
0
0
1/
1
0
1
1/
is available on pin P6/ADC; note 2
Notes
1. This is the default mode at Power-on reset.
2. The ADC input cannot be used when these test modes are active; see Section 7.2 for more information
Table 6
Reference divider ratio select
RSA
RSB
0
0
80
0
1
128
1
1
64
1
0
forbidden
2003 Jun 05
REFERENCE DIVIDER RATIO
9
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
Table 7
TDA6500TT; TDA6501TT
AGC take-over point
AL2
AL1
AL0
ASYMMETRICAL MODE
0
0
0
115 dBµV
0
0
1
115 dBµV
0
1
0
112 dBµV; default mode at Power-on reset
0
1
1
109 dBµV
1
0
0
106 dBµV
1
0
1
103 dBµV
1
1
0
IAGC = 0; external AGC; note 1
1
1
1
3.5 V; disabled; note 2
Notes
1. The AGC detector is disabled. Both the sinking and sourcing currents from the IC are disabled. The AGC output goes
into a high-impedance state and an external AGC source can be connected in parallel.
2. The AGC detector is disabled and the fast mode current source is enabled.
7.2
Read mode
The POR flag is set to logic 1 at Power-on. The flag is
reset when an end-of-data is detected by the device (end
of a read sequence).
Data can be read from the device by setting the R/W bit to
logic 1. The data read format is shown in Table 8. After the
slave address has been recognized, the device generates
an acknowledge pulse and the first data byte (status byte)
is transferred on the SDA line with the MSB first. Data is
valid on the SDA line during a HIGH-level of the SCL clock
signal.
Control of the loop is made possible with the in-lock flag
(FL) which indicates when the loop is locked (FL = 1).
The internal AGC status is available from the AGC bit.
AGC = 1 indicates when the selected take-over point is
reached.
A second data byte can be read from the device if the
microcontroller generates an acknowledge on the SDA
line (master acknowledge). End of transmission will occur
if no master acknowledge occurs. The device will then
release the data line to allow the microcontroller to
generate a STOP condition.
Table 8
A built-in ADC is available on the P6/ADC pin. The ADC
can be used to apply AFC information to the
microcontroller from the IF section of the tuner. The
relationship between the voltage applied to the ADC input
and the A2, A1 and A0 bits is given in Table 10.
Read data format
BIT
NAME
Address byte
Status byte
BYTE
ACK
MSB(1)
LSB
ADB
1
1
0
0
0
MA1
MA0
R/W = 1
A
SB
POR
FL
1
1
AGC
A2
A1
A0
−
Note
1. MSB is transmitted first.
2003 Jun 05
10
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
Table 9
TDA6500TT; TDA6501TT
Description of bits shown in Table 8
SYMBOL
DESCRIPTION
A
acknowledge
MA1 and MA0
programmable address bits; see Table 4
R/W
logic 1 for read mode
POR
Power-on reset flag
POR = 0, normal operation
POR = 1, power-on state
FL
in-lock flag
FL = 0, not locked
FL = 1, the PLL is locked
AGC
internal AGC flag
AGC = 0, internal AGC not active
AGC = 1, internal AGC is active; level below 3 V
A2, A1 and A0
digital output of the 5-level ADC; see Table 10
Table 10 ADC levels
VOLTAGE APPLIED TO ADC INPUT(1)
A2
A1
A0
0.60VCC to VCC
1
0
0
0.45VCC to 0.60VCC
0
1
1
0.30VCC to 0.45VCC
0
1
0
0.15VCC to 0.30VCC
0
0
1
0 to 0.15VCC
0
0
0
Note
1. Accuracy is ±0.03VCC.
7.3
Power-on reset
The Power-on detection threshold voltage (VPOR) is set to VCC = 3.5 V at room temperature. Below this threshold, the
device is reset to the Power-on state.
In the Power-on state, the charge pump current is set to 280 µA, the tuning voltage output is disabled, the test bits T2, T1
and T0 are set to 001, the AGC take-over point is set to 112 dBµV and the AGC current is set to the slow mode. The high
band is selected by default.
Table 11 Default bits at Power-on reset
BIT
NAME
BYTE
MSB
1
LSB
Address byte
ADB
1
0
0
0
MA1
MA0
X
Divider byte 1
DB1
0
X
X
X
X
X
X
X
Divider byte 2
DB2
X
X
X
X
X
X
X
X
Control byte
CB
1
1
0
0
1
X
X
1
Band switch byte
BB
−
0
−
0
0
0
0
0
Auxiliary byte
AB
0
0
1
0
−
−
−
−
2003 Jun 05
11
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
8 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); note 1.
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VCC
supply voltage
−0.3
+6
V
VXTAL
crystal input voltage
−0.3
VCC + 0.3
V
VP6/ADC
NPN port input and output voltage
−0.3
VCC + 0.3
V
IP6/ADC
NPN port output current (open-collector)
0
+10
mA
VVT
tuning voltage output
−0.3
+35
V
VCP
charge pump output voltage
−0.3
VCC + 0.3
V
VP4
NPN port output voltage (open-collector)
−0.3
VCC + 0.3
V
IP4
NPN port output current (open-collector)
0
+10
mA
VSDA
serial data input/output voltage
−0.3
+6
V
ISDA
serial data output current
−1
+10
mA
VSCL
serial clock input voltage
−0.3
+6
V
VAS
address selection input voltage
−0.3
VCC + 0.3
V
VPn
PMOS port output voltage (open-drain)
−0.3
VCC + 0.3
V
IP1
PMOS port output current (open-drain)
−25
0
mA
IP0
PMOS port output current (open-drain)
−15
0
mA
IP2, IP3
PMOS port output current (open-drain)
−10
0
mA
Tstg
storage temperature
−40
+150
°C
Tamb
ambient temperature
−20
+85
°C
Tj
junction temperature
−
150
°C
Note
1. Maximum ratings cannot be exceeded, not even momentarily without causing irreversible IC damage. Maximum
ratings cannot be accumulated.
9
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
110
K/W
115
K/W
SOT487EC3 package (TDA6500TT)
Rth(j-a)
thermal resistance from junction to ambient in free air; one layer PCB,
JEDEC standards; note 1
SOT487EC5 package (TDA6501TT)
Rth(j-a)
thermal resistance from junction to ambient in free air; one layer PCB,
JEDEC standards; note 1
Note
1. The thermal resistance is highly dependant on the PCB on which the package is mounted. The thermal resistance
values are given only for customer’s guidance.
2003 Jun 05
12
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
10 CHARACTERISTICS
VCC = 5 V; Tamb = 25 °C; values are given for an IF amplifier with 500 Ω load (measured as shown in Fig.16 for the PAL
standard); unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VCC
supply voltage
ICC
supply current
4.5
5.0
5.5
V
−
74
94
mA
one PNP port on; sourcing 20 mA −
96
116
mA
−
102
122
mA
V
VCC = 5 V
PNP ports off
two PNP ports on; one port
sourcing 20 mA; one other port
sourcing 5 mA
PLL part
FUNCTIONAL RANGE
VPOR
Power-on reset supply
voltage
for a voltage lower than VPOR,
Power-on reset is active
1.5
3.5
−
N
divider ratio
15-bit frequency word
64
−
32767
fXTAL
crystal oscillator
RXTAL = 25 to 300 Ω
3.2
4.0
4.48
MHz
ZXTAL
input impedance (absolute
value)
fXTAL = 4 MHz
600
1200
−
Ω
−
−
10
µA
PMOS PORTS: P0, P1, P2 AND P3
ILO
output leakage current
VCC = 5.5 V; VPn = 0 V
VDS(P0)(sat)
output saturation voltage
buffer P0 only is on; sourcing 10 mA −
0.25
0.4
V
VDS(P1)(sat)
output saturation voltage
buffer P1 only is on; sourcing 20 mA −
0.25
0.4
V
VDS(P2)(sat),
VDS(P3)(sat)
output saturation voltage
buffer P2 or P3 is on; sourcing 5 mA −
0.25
0.4
V
NPN PORTS: P4 AND P6
ILO
output leakage current
VCC = 5.5 V; VPn = 6 V
−
−
10
µA
VCE(sat)
output saturation voltage
buffer P4 or P6 is on; sinking 5 mA
−
0.25
0.4
V
VI
ADC input voltage
see Table 10
0
−
VCC
V
IIH
HIGH-level input current
ADC input Vi = VCC
−
−
10
µA
IIL
LOW-level input current
ADC input Vi = 0 V
−10
−
−
µA
ADC INPUT
AS INPUT (ADDRESS SELECTION)
IIH
HIGH-level input current
AS input Vi = VCC
−
−
10
µA
IIL
LOW-level input current
AS input Vi = 0 V
−10
−
−
µA
2003 Jun 05
13
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
SYMBOL
PARAMETER
TDA6500TT; TDA6501TT
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SCL AND SDA INPUTS
VIL
LOW-level input voltage
0
−
1.5
V
VIH
HIGH-level input voltage
2.3
−
5.5
V
IIH
HIGH-level input current
VBUS = 5.5 V; VCC = 0 V
−
−
10
µA
VBUS = 5.5 V; VCC = 5.5 V
−
−
10
µA
IIL
LOW-level input current
VBUS = 1.5 V; VCC = 0 V
−
−
10
µA
VBUS = 0 V; VCC = 5.5 V
−10
−
−
µA
SDA OUTPUT
ILO
leakage current
SDA output Vo = 5.5 V
−
−
10
µA
Vo
output voltage
sink current = 3 mA
−
−
0.4
V
−
−
400
kHz
CLOCK FREQUENCY
fclk
clock frequency
CHARGE PUMP OUTPUT CP
IIH
HIGH-level input current
(absolute value)
CP = 1
−
280
−
µA
IIL
LOW-level input current
(absolute value)
CP = 0
−
60
−
µA
ILO(off)
off-state leakage current
T2 = 0; T1 = 1; T0 = 0
−15
0
+15
nA
TUNING VOLTAGE OUTPUT VT
ILO(off)
off-state leakage current
OS = 1; tuning supply = 33 V
−
−
10
µA
Vo
output voltage when the
loop is closed
OS = 0; T2 = 0; T1 = 0; T0 = 1;
RL = 27 kΩ; tuning supply = 33 V
0.2
−
32.7
V
44.25
−
154.25
MHz
Mixer/oscillator part
LOW BAND MIXER MODE (P0 = 1 AND P1 = 0); INCLUDING IF AMPLIFIER
fRF
RF frequency
Gv
voltage gain
picture carrier; note 1
fRF = 44.25 MHz; see Fig.7
25.0
27.5
30
dB
fRF = 157 MHz; see Fig.7
25.0
27.5
30
dB
−
8.0
10.0
dB
NF
noise figure
fRF = 50 MHz; see Figs 8 and 9
Vo
output voltage causing
0.3% cross modulation in
channel
fRF = 44.25 MHz; see Fig.10
108
111
−
dBµV
fRF = 157 MHz; see Fig.10
108
111
−
dBµV
fRF = 44.25 MHz; note 2
108
111
−
dBµV
fRF = 157 MHz; note 2
108
111
−
dBµV
Vo
output voltage causing
1.1 kHz incidental FM
INTSO2
channel SO2 beat
VRFpix = 115 dBµV at IF output;
note 3
57
60
−
dBc
Vi
input level without lock-out
see Fig.14; note 13
−
−
120
dBµV
gos
optimum source
conductance for noise
figure
fRF = 50 MHz
−
0.7
−
mS
fRF = 150 MHz
−
0.9
−
mS
fRF = 44.25 MHz; see Fig.4
−
0.30
−
mS
fRF = 161.25 MHz; see Fig.4
−
0.33
−
mS
gi
2003 Jun 05
input conductance
14
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
SYMBOL
Ci
PARAMETER
input capacitance
TDA6500TT; TDA6501TT
CONDITIONS
fRF = 44.25 to 161.25 MHz;
see Fig.4
MIN.
TYP.
MAX.
UNIT
−
1.29
−
pF
HIGH BAND MIXER IN MID BAND MODE (P0 = 0 AND P1 = 1); INCLUDING IF AMPLIFIER
fRF
RF frequency
picture carrier; note 1
161.25
−
439.25
MHz
Gv
voltage gain
fRF = 157 MHz; see Fig.11
35
38
41
dB
NF
noise figure (not corrected
for image)
Vo
Vo
output voltage causing
0.3% cross modulation in
channel
output voltage causing
1.1 kHz incidental FM
fRF = 443 MHz; see Fig.11
35
38
41
dB
fRF = 157MHz; see Fig.12
−
6
8.0
dB
fRF = 443 MHz; see Fig.12
−
6
8.0
dB
fRF = 157 MHz; see Fig.13
108
111
−
dBµV
fRF = 443 MHz; see Fig.13
108
111
−
dBµV
fRF = 157 MHz; note 2
108
111
−
dBµV
fRF = 443 MHz; note 2
108
111
−
dBµV
Vf(N+5)-1
(N + 5) − 1 MHz pulling
fRFwanted = 443 MHz;
fosc = 481.9 MHz;
fRFunwanted = 482 MHz; note 8
72
80
−
dBµV
Zi
input impedance
(RS + jLSω)
RS at fRF = 157 MHz; see Fig.5
−
25
−
Ω
RS at fRF = 443 MHz; see Fig.5
−
25
−
Ω
Vi
input level without lock-out
LS at fRF = 157 MHz; see Fig.5
−
13
−
nH
LS at fRF = 443 MHz; see Fig.5
−
13
−
nH
see Fig.15; note 13
−
−
120
dBµV
picture carrier; note 1
455.25
−
855.25
MHz
HIGH BAND MIXER IN HIGH BAND MODE (P0 = 0 AND P1 = 0); INCLUDING IF AMPLIFIER
fRF
RF frequency
Gv
voltage gain
NF
Vo
noise figure (not corrected
for image)
output voltage causing
0.3% cross modulation in
channel
fRF = 443 MHz; see Fig.11
35
38
41
dB
fRF = 863.25 MHz; see Fig.11
35
38
41
dB
fRF = 443 MHz; see Fig.12
−
6.0
8.0
dB
fRF = 863.25 MHz; see Fig.12
−
7.0
9.0
dB
fRF = 443 MHz; see Fig.13
108
111
−
dBµV
fRF = 863.25 MHz; see Fig.13
108
111
−
dBµV
fRF = 443 MHz; note 2
108
111
−
dBµV
Vo
output voltage causing
1.1 kHz incidental FM
fRF = 863.25 MHz; note 2
108
111
−
dBµV
Vf(N+5)-1
(N + 5) − 1 MHz pulling
fRFwanted = 863.25 MHz;
fosc = 902.15 MHz;
fRFunwanted = 902.25 MHz; note 8
72
80
−
dBµV
Zi
input impedance
(RS + jLSω)
RS at fRF = 443 MHz; see Fig.5
−
25
−
Ω
Vi
2003 Jun 05
input level without lock-out
RS at fRF = 863.25 MHz; see Fig.5
−
23
−
Ω
LS at fRF = 443 MHz; see Fig.5
−
13
−
nH
LS at fRF = 863.25 MHz; see Fig.5
−
13
−
nH
see Fig.15; note 13
−
−
120
dBµV
15
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
SYMBOL
PARAMETER
TDA6500TT; TDA6501TT
CONDITIONS
MIN.
TYP.
MAX.
UNIT
LOW BAND OSCILLATOR (see Fig.16)
fosc
oscillator frequency
note 4
84.15
−
193.15
MHz
∆fosc(V)
oscillator frequency shift
with supply voltage
∆VCC = 5%; note 5
−
20
70
kHz
∆VCC = 10%; note 5
−
110
−
kHz
∆fosc(T)
oscillator frequency drift
with temperature
∆T = 25 °C; VCC = 5 V with
compensation; note 6
−
800
1100
kHz
∆fosc(t)
oscillator frequency
switch-on drift
5 s to 15 min after switching on
VCC = 5 V; note 7
−
500
700
kHz
Φosc
phase noise, carrier to
noise sideband
±10 kHz frequency offset; worst
case in the frequency range
84
87
−
dBc/Hz
±100 kHz frequency offset; worst
case in the frequency range
104
107
−
dBc/Hz
4.75 < VCC < 5.25 V; worst case in
the frequency range; ripple
frequency 500 kHz; note 9
15
20
−
mV
RSCp-p
ripple susceptibility of VCC
(peak-to-peak value)
MID BAND OSCILLATOR (see Fig.16)
fosc
oscillator frequency
note 4
200.15
−
478.15
MHz
∆fosc(V)
oscillator frequency shift
with supply voltage
∆VCC = 5%; note 5
−
20
70
kHz
∆VCC = 10%; note 5
−
110
−
kHz
∆fosc(T)
oscillator frequency drift
with temperature
∆T = 25 °C; VCC = 5 V with
compensation; note 6
−
1000
1500
kHz
∆fosc(t)
oscillator frequency drift
after switch on
5 s to 15 min after switching on
VCC = 5 V; note 7
−
500
700
kHz
Φosc
phase noise, carrier to
noise sideband
±10 kHz frequency offset; worst
case in the frequency range
84
87
−
dBc/Hz
±100 kHz frequency offset; worst
case in the frequency range
104
107
−
dBc/Hz
4.75 < VCC < 5.25 V; worst case in
the frequency range; ripple
frequency 500 kHz; note 9
15
20
−
mV
894.15
MHz
RSCp-p
ripple susceptibility of VCC
(peak-to-peak value)
HIGH BAND OSCILLATOR (see Fig.16)
fosc
oscillator frequency
note 4
494.15
−
∆fosc(V)
oscillator frequency shift
with supply voltage
∆VCC = 5%; note 5
−
20
70
kHz
∆VCC = 10%; note 5
−
300
−
kHz
∆fosc(T)
oscillator frequency drift
with temperature
∆T = 25 °C VCC = 5 V; with
compensation; note 6
−
1100
1500
kHz
∆fosc(t)
oscillator frequency drift
after switch on
5 s to 15 min after switching on;
VCC = 5 V; note 7
−
600
900
kHz
Φosc
phase noise, carrier to
noise sideband
±10 kHz frequency offset; worst
case in the frequency range
84
87
−
dBc/Hz
±100 kHz frequency offset; worst
case in the frequency range
104
107
−
dBc/Hz
2003 Jun 05
16
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
SYMBOL
RSCp-p
PARAMETER
TDA6500TT; TDA6501TT
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ripple susceptibility of VCC
(peak-to-peak value)
4.75 < VCC < 5.25 V; worst case in
the frequency range; ripple
frequency 500 kHz; note 9
15
20
−
mV
output reflection coefficient
magnitude; see Fig.6
−
38
−
dB
phase; see Fig.6
−
0.36
−
deg
RS at 36.15 MHz; see Fig.6
−
79
−
Ω
CS at 36.15 MHz; see Fig.6
−
9
−
nF
RS at 43.5 MHz; see Fig.6
−
80
−
Ω
CS at 43.5 MHz; see Fig.6
−
3
−
nF
IF AMPLIFIER
S22
Zo
output impedance
(RS + jLSω)
REJECTION AT THE IF OUTPUT
INTdiv
level of divider interferences note 10; worst case
in the IF signal
−
−
23
dBµV
INTXTAL
crystal oscillator
interferences rejection
VIF = 100 dBµV; worst case in the
frequency range; note 11
60
66
−
dBc
INTfref
reference frequency
rejection
VIF = 100 dBµV; worst case in the
frequency range; note 12
60
66
−
dBc
AGCTOP
AGC take-over point
AL2 = 0; AL1 = 1; AL0 = 0
110.5
112
113.5
dBµV
Isource(fast)
source current 1
8.0
9.5
11.0
µA
AGC OUTPUT
Isource(slow)
source current 2
210.0
245.0
280.0
nA
Isink(peak)
peak sink current to ground
80
100
120
µA
Vmax
AGC maximum output
voltage
3.45
3.5
3.6
V
Vmin
AGC minimum output
voltage
0
−
0.1
V
VRF(slip)
RF voltage range to switch
the AGC from active to not
active mode
−
−
0.5
dB
VRM(L)
AGC output voltage
AGC bit = 1 or AGC active
0
−
2.9
V
VRM(H)
AGC output voltage
AGC bit = 0 or AGC not active
3
3.5
3.6
V
ILO
AGC leakage current
AL2 = 1; AL1 = 1; AL0 = 0;
0 < VAGC < VCC
−50
−
+50
nA
VO(off)
AGC output voltage with
AGC disabled
AL2 = 1; AL1 = 1; AL0 = 1
3.45
3.5
3.6
V
Notes
1. The RF frequency range is defined by the oscillator frequency range and the Intermediate Frequency (IF).
2. This is the level of the RF unwanted signal, 50% amplitude modulated with 1 kHz, that causes a 1.1 kHz
FM modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBµV; funwanted = fwanted + 5.5 MHz.
The FM modulation is measured at the oscillator output with a peeking coil using a modulation analyser with a peak
to peak detector and a post detection filter of 300 Hz up to 3 kHz.
3. Channel SO2 beat is the interfering product of fRFpix, fIF and fosc of channel SO2; fbeat = 37.35 MHz. The possible
mechanisms are: fosc − 2 × fIF or 2 × fRFpix − fosc. For the measurement Vo(IFOUT) = VRFpix = 115 dBµV.
2003 Jun 05
17
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
4. Limits are related to the tank circuits used in Fig.16 for a PAL application. The choice of different external
components adapts the measurement circuit to other frequency bands or NTSC applications.
5. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from
VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this measurement.
6. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from
Tamb = 25 to 50 °C or from Tamb = 25 to 0 °C. The oscillator is free running during this measurement.
7. Switch-on drift is defined as the change in oscillator frequency between 5 s and 15 min after switch on. The oscillator
is free running during this measurement.
8. (N + 5) − 1 MHz pulling is the input level of channel N + 5, at frequency 1 MHz lower, causing FM sidebands 30 dB
below the wanted carrier.
9. The supply ripple susceptibility is measured in the circuit according to Fig.16 using a spectrum analyser connected
to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave signal with a frequency
of 500 kHz is superimposed onto the supply voltage. The amplitude of this ripple signal is adjusted to bring the
500 kHz sidebands around the IF carrier to a level of −53.5 dB with respect to the carrier.
10. This is the level of divider interferences close to the IF. For example channel S3: fosc = 158.15 MHz,
1⁄ f
4 osc = 39.5375 MHz. The LOSCIN input must be left open (i.e. not connected to any load or cable); the HOSCIN1
and HOSCIN2 inputs are connected to a hybrid.
11. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be
greater than 60 dB for an IF output signal of 100 dBµV.
12. The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the carrier.
The rejection has to be greater than 60 dB for an IF output signal of 100 dBµV.
13. The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBµV. This should
be verified for every channel in the band.
1
handbook, full pagewidth
2
0.5
0.2
5
10
−j
10
∞
5
2
1
0.5
0.2
40 MHz
0
+j
10
140 MHz
5
0.2
2
0.5
1
MCE150
Fig.4 Input admittance (S11) of the low band mixer (40 to 140 MHz); Yo = 20 mS.
2003 Jun 05
18
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
1
handbook, full pagewidth
0.5
2
870 MHz
0.2
5
10
+j
0
160 MHz
0.2
0.5
1
2
5
10
∞
−j
10
5
0.2
2
0.5
1
MCE151
Fig.5 Input impedance (S11) of the mid and high band mixer(160 to 870 MHz); Zo = 100 Ω.
1
handbook, full pagewidth
0.5
2
0.2
5
10
+j
0
0.2
0.5
1 50 MHz 2
5
10
∞
30 MHz
−j
10
5
0.2
2
0.5
1
MCE152
Fig.6 Output impedance (S22) of the IF amplifier (30 to 50 MHz); Zo = 50 Ω.
2003 Jun 05
19
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
handbook, full pagewidth
50 Ω
TDA6500TT; TDA6501TT
signal
source
L
LBIN
e
50
Ω
Vmeas V
Vi
IFOUT
D.U.T.
spectrum
analyzer
Vo
C
50 Ω
V'meas
RMS
voltmeter
FCE213
Zi >> 50 Ω → Vi = 2 × Vmeas = 80 dBµV.
Vi = Vmeas + 6 dB = 80 dBµV.
50
Vo = V’meas × --------------------------------- = V’meas + attenuation.
2
2 2
50 + L ω
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
attenuation = 10.2 dB.
Vo
Gv = 20 log ------ .
Vi
Fig.7 Gain (GV) measurement in low band.
I1
handbook, full pagewidth
BNC
I3
PCB
C1
L1
BNC
C2
plug
plug
I2
RIM-RIM
PCB
C3
RIM-RIM
C4
(a)
(b)
For fRF = 50 MHz.
Low band mixer frequency response measured = 57 MHz; loss = 0 dB;
image suppression = 16 dB.
For fRF = 150 MHz.
Low band mixer frequency response measured = 150.3 MHz;
loss = 1.3 dB; image suppression = 13 dB.
C3 = 5 pF.
C4 = 25 pF.
l2 = semi rigid cable (RIM): 30 cm long; 33 dB/100 m; 50 Ω; 96 pF/m.
l3 = semi rigid cable (RIM): 5 cm long; 33 dB/100 m; 50 Ω; 96 pF/m.
C1 = 9 pF.
C2 = 15 pF.
L1 = 7 turns (∅ 5.5 mm, wire ∅ = 0.5 mm).
l1 = semi rigid cable (RIM): 5 cm long; 33 dB/100 m; 50 Ω; 96 pF/m.
Fig.8 Input circuit for optimum noise figure in the low band.
2003 Jun 05
MBE286
20
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
handbook, full pagewidth
L
NOISE
SOURCE
RIM
BNC
LBIN
INPUT
CIRCUIT
IFOUT
NOISE
FIGURE
METER
C
D.U.T.
FCE214
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
NF = NFmeas − loss of input circuit.
Fig.9 Noise figure (NF) measurement in low band.
FILTER
handbook, full pagewidth
50 Ω
eu
AM = 30%
2 kHz
unwanted
signal
source
L
A
LBIN
C
IFOUT
wanted
signal
source
B
Vo
C
Vmeas
V
50
Ω
D
50
Ω
RMS
voltmeter
50
Vo = Vmeas × --------------------------------- = Vmeas + attenuation.
2
2 2
50 + L ω
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
attenuation = 10.2 dB.
Wanted output signal at fRFpix; Vo = 100 dBµV.
Unwanted output signal at fRFpix + 5.5 MHz.
The level of unwanted signal is measured by causing 0.09%
AM modulation in the wanted signal.
Fig.10 Cross modulation measurement in low band.
2003 Jun 05
modulation
analyzer
38.9 MHz (PAL & OFDM)
D.U.T.
HYBRID
50 Ω
ew
18 dB
attenuator
21
FCE827
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
handbook, full pagewidth
50 Ω
e
TDA6500TT; TDA6501TT
signal
source
A
50
Ω
Vmeas V
Vi
C
L
IFOUT
spectrum
analyzer
D.U.T.
HYBRID
C
V'meas
Vo
B
RMS
voltmeter
MHBIN1
D
MHBIN2
50
Ω
FCE216
Loss in hybrid = 1 dB.
Vi = Vmeas − Ioss = 70 dBµV.
50
Vo = V’meas × --------------------------------- = V’meas + attenuation.
2
2 2
50 + L ω
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
attenuation = 10.2 dB.
Vo
Gv = 20 log ------ .
Vi
Fig.11 Gain (GV) measurement in mid and high bands.
handbook, full pagewidth
L
NOISE
SOURCE
A
C
HYBRID
B
D
MHBIN1
IFOUT
D.U.T.
NOISE
FIGURE
METER
C
MHBIN2
50
Ω
PAL:
IF = 38.9 MHz.
Loss in hybrid = 1 dB.
NF = NFmeas − Ioss.
L = 680 nH.
C = 25.9 pF.
Fig.12 Noise figure (NF) measurement in mid and high bands.
2003 Jun 05
50 Ω
22
FCE217
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
FILTER
handbook, full pagewidth
AM = 30%
2 kHz
eu
unwanted
signal
source
L
A
A
C
C
MHBIN1 IFOUT
HYBRID
HYBRID
D.U.T.
C
V Vmeas
Vo
ew
wanted
signal
source
B
B
D
50
Ω
12 dB
attenuator
D
50
Ω
RMS
voltmeter
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
attenuation = 10.2 dB.
Wanted output signal at fRFpix; Vo = 100 dBµV.
Unwanted output signal at fRFpix + 5.5 MHz.
The level of unwanted signal is measured by causing 0.09%
AM modulation in the wanted signal.
Fig.13 Cross modulation measurement in mid and high bands.
50 Ω
signal
source
L
LBIN
e
Vmeas V
50
Ω
IFOUT
D.U.T.
Vi
spectrum
analyzer
C
50 Ω
FCE219
RMS
voltmeter
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
Zi >> 50 Ω → Vi = 2 × Vmeas = Vmeas + 6 dB.
Fig.14 Maximum RF input level without lock-out in low band.
2003 Jun 05
50
Ω
MHBIN2
50
Vo = Vmeas × --------------------------------- = Vmeas + attenuation.
2
2 2
50 + L ω
handbook, full pagewidth
38.9 MHz
(PAL & OFDM)
23
FCE829
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
handbook, full pagewidth
e
50 Ω
TDA6500TT; TDA6501TT
signal
source
L
A
Vmeas V
50
Ω
Vi
IFOUT
D.U.T.
HYBRID
B
RMS
voltmeter
MHBIN1
C
spectrum
analyzer
C
50 Ω
MHBIN2
D
50
Ω
FCE220
PAL:
IF = 38.9 MHz.
L = 680 nH.
C = 25.9 pF.
Loss in hybrid = 1 dB.
Vi = Vmeas − loss.
Fig.15 Maximum RF input level without lock-out in mid and high bands.
2003 Jun 05
24
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
handbook, full pagewidth
C3
R5
22 kΩ
D1
BB182
C1
82 pF
1.8 pF
L1
C2
6t; ∅
4 mm
R1
12 Ω
LOSCIN
TDA6500TT; TDA6501TT
(1) 32
1 (32)
C17
MHBIN2
MHBIN2
4.7 nF
LOSCOUT
(2) 31
2 (31)
C18
MHBIN1
MHBIN1
4.7 nF
1.5 pF
OSCGND
(3) 30
3 (30)
C19
LBIN
LBIN
4.7 nF
R6
C6
C4
22 kΩ
100 pF
1 pF
L2
C5
D2
BB178
3t; ∅
2 mm
R2
5.6 Ω
MOSCOUT
MOSCIN
R7
C11
R3
27 pF
27 Ω
5 (28)
(5) 28
RFGND
C20
IFFIL2
L4
2x6t
HOSCIN1
(6) 27
6 (27)
IFFIL1
C8
HOSCOUT2
(7) 26
7 (26)
C10
(8) 25
8 (25)
(9) 24
9 (24)
VCC
10 (23)
(10) 23
P1
IFGND
(11) 22
C13
IFOUT
C14
XTAL
18 pF
470 Ω
VT
12 (21)
(12) 21
13 (20)
(13) 20
14 (19)
(14) 19 SDA
15 (18)
(15) 18
R19
C15
3.9 kΩ
18 kΩ
C16
100 pF
0Ω
CP
16 (17)
330 Ω
R18
330 Ω
1/2fref or 1/2fdiv
P6/ADC
(16) 17
4.7 kΩ
P4
JP1
R22
5V
GND
1
33 V
R15
2.2 kΩ
6
JP2
VCC
for test purpose only
R17
SCL
820 pF
R10
27 kΩ
2
LED
R16
AS
R20
R21
3
LED
D7
R14
P3
4 MHz
TP
2
4
LED
D6
R13
P0
4.7 nF
PLLGND
C23
10 nF
D5
1 kΩ
C28
3.9 pF
C27
22 pF
11 (22)
R12
220 Ω
4.7 nF
for test purpose only
IFOUT measurement
L5
680 nH
LED
160 nF
1.2 pF
C12
1 kΩ
C22
AGC
TDA6500TT
(TDA6501TT)
HOSCIN2
D4
R11
TP
1
HOSCOUT1
1.2 pF
R4
5.6 kΩ
C21
P2
1.2 pF
C9
12 pF
12 pF
1.2 pF
L3
3t; ∅
2 mm
D3
BB179
(4) 29
1.5 pF
C7
5.6 kΩ
4 (29)
C25
10 µF
Q1
BC847
6.8 kΩ
C26
10 µF
JP3
5
SDA
4
3
AS
SCL
2
1
5V
GND
n.c.
JUMPER
VCC
for test purpose only
FCE828
The pin numbers in parenthesis represent the TDA6501TT.
Fig.16 Measurement circuit for PAL on test jig.
2003 Jun 05
25
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
Table 12 Component values for measurement circuit
COMPONENT
COMPONENT
VALUE
VALUE
R7
5.6 kΩ
Capacitors (SMD and NP0, unless otherwise stated)
R10
27 kΩ
C1
1.8 pF (N750)
R11
1 kΩ
C2
1.5 pF (N750)
R12
220 Ω
C3
82 pF (N750)
R13
470 Ω
C4
1 pF (N750)
R14
1 kΩ
C5
1.5 pF (N750)
R15
2.2 kΩ
C6
100 pF (N750)
R16
0Ω
C7
1.2 pF (N750)
R17
330 Ω
C8
1.2 pF (N750)
R18
330 Ω
C9
1.2 pF (N750)
R19
18 kΩ
C10
1.2 pF (N750)
R20
4.7 kΩ
C11
27 pF (N750)
R21
3.9 kΩ
C12
4.7 nF
R22
6.8 kΩ
C13
4.7 nF
Diodes and ICs
C14
18 pF
D1
BB182
C15
100 nF
D2
BB178
C16
820 pF
D3
BB179
C17
4.7 nF
IC
TDA6500TT/TDA6501TT
C18
4.7 nF
Coils; including IF coil; wire size 0.4 mm
C19
4.7 nF
C20
12 pF
C21
12 pF
C22
160 nF
C23
10 nF
L1
6 t; ∅ 4 mm
L2
3 t; ∅ 2 mm
L3
3 t; ∅ 2 mm
L4
12 t; coil type: TOKO 7kN;
material: 113 kN; screw core:
03-0093; pot core: 04-0026
680 nH
C25
10 µF (16 V; electrolytic)
C26
10 µF (16 V; electrolytic)
L5
C27
22 pF
Crystal
C28
3.9 pF
X1
Resistors; all SMD
Transistors
R1
12 Ω
Q1
R2
5.6 Ω
27 Ω
LEDs
R3
R4
5.6 kΩ
R5
22 kΩ
R6
22 kΩ
2003 Jun 05
4 MHz
26
BC847
D4
3 mm
D5
3 mm
D6
3 mm
D7
3 mm
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
11 APPLICATION INFORMATION
11.3
11.1
Tables 13 to 18 show various write sequences where:
Tuning amplifier
S = START
The tuning amplifier is capable of driving the varicap
voltage without an external transistor. The tuning voltage
output must be connected to an external load of 27 kΩ
which is connected to the tuning voltage supply rail. The
loop filter design depends on the oscillator characteristics
and the selected reference frequency.
11.2
Examples of I2C-bus sequences
A = acknowledge
P = STOP.
Conditions:
fosc = 100 MHz
P0 is on to switch on the low band
Crystal oscillator
P3 is on
The crystal oscillator uses a 4 MHz crystal connected in
series with an 18 pF capacitor thereby operating in the
series resonance mode. Connecting the crystal to the
ground is preferred, but it can also be connected to the
supply voltage.
ICP = 280 µA
fstep = 62.5 kHz
N = 1600
fXTAL = 4 MHz
IAGC = 245 nA
AGC take-over point is set to 112 dBµV asymmetrical.
For the complete sequence see Table 13 (sequence 1) or
Table 14 (sequence 2).
Other I2C-bus addresses may be selected by applying an
appropriate voltage to the AS input.
Table 13 Complete sequence 1
START
S
ADDRESS
BYTE
C2
A
DIVIDER
BYTE 1
06
A
DIVIDER
BYTE 2
40
BAND
SWITCH
BYTE
CONTROL
BYTE
A
CE
A
09
A
CONTROL
BYTE
DE
AUXILIARY
BYTE
A
20
A
STOP
P
Table 14 Complete sequence 2
START
S
ADDRESS
BYTE
C2
A
CONTROL
BYTE
DE
A
AUXILIARY
BYTE
20
A
BAND
SWITCH
BYTE
CONTROL
BYTE
CE
A
09
A
DIVIDER
BYTE 1
06
DIVIDER
BYTE 2
A
40
A
STOP
P
Table 15 Divider bytes only sequence
START
S
ADDRESS BYTE
C2
A
DIVIDER BYTE 1
06
A
DIVIDER BYTE 2
40
A
STOP
P
Table 16 Control and band switch bytes only sequence
START
S
ADDRESS BYTE
C2
2003 Jun 05
A
CONTROL BYTE
CE
A
27
BAND SWITCH BYTE
09
A
STOP
P
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
Table 17 Control and auxiliary bytes only sequence
START
S
ADDRESS BYTE
C2
A
CONTROL BYTE
DE
A
AUXILIARY BYTE
20
A
STOP
P
Table 18 Control byte only sequence
START
S
ADDRESS BYTE
C2
A
CONTROL BYTE
DE
A
STOP
P
Tables 19 and 20 show read sequences where:
S = START
A = acknowledge
XX = read status byte
X = no acknowledge from the master means end of sequence
P = STOP.
Table 19 Status byte acquisition
START
S
ADDRESS BYTE
C3
A
STATUS BYTE
XX
STOP
X
P
Table 20 Two status bytes acquisition
START
S
2003 Jun 05
ADDRESS BYTE
C3
A
STATUS BYTE 1
XX
A
28
STATUS BYTE 2
XX
X
STOP
P
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
12 INTERNAL PIN CONFIGURATION
PIN
SYMBOL
AVERAGE DC VOLTAGE VERSUS
BAND SELECTION
TDA6500TT TDA6501TT
LOW
MID
EQUIVALENT CIRCUIT(1)
HIGH
LOSCIN
1
32
1.7
1.4
1.4
LOSCOUT
2
31
2.9
3.5
3.5
2 (31)
(32) 1
FCE222
OSCGND
3
30
−
−
−
MOSCOUT
4
29
3.5
3.02
3.5
MOSCIN
5
28
1.4
1.7
1.4
−
4 (29)
(28) 5
FCE223
HOSCIN1
6
27
2.2
2.2
1.8
HOSCOUT2
7
26
5
5
2.5
HOSCOUT1
8
25
5
5
2.5
HOSCIN2
9
24
2.2
2.2
1.8
(25) 8
7 (26)
(27) 6
9 (24)
MCE141
VCC
10
23
5.0
5.0
5.0
IFGND
11
22
−
−
−
−
11 (22)
FCE225
2003 Jun 05
29
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
PIN
SYMBOL
AVERAGE DC VOLTAGE VERSUS
BAND SELECTION
TDA6500TT TDA6501TT
IFOUT
12
21
TDA6500TT; TDA6501TT
LOW
2.1
MID
2.1
EQUIVALENT CIRCUIT(1)
HIGH
2.1
12 (21)
FCE226
PLLGND
13
20
−
−
−
13 (20)
FCE227
XTAL
14
19
0.7
0.7
0.7
14 (19)
MCE142
VT
15
18
VVT
VVT
VVT
15 (18)
MCE143
CP
16
17
1.0
1.0
1.0
16 (17)
MCE144
P4
17
16
VCE(sat)
or High Z
VCE(sat)
or High Z
VCE(sat)
or High Z
17 (16)
MCE145
2003 Jun 05
30
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
PIN
SYMBOL
TDA6500TT TDA6501TT
P6/ADC
18
15
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS
BAND SELECTION
LOW
VCE(sat)
or High Z
MID
VCE(sat)
or High Z
EQUIVALENT CIRCUIT(1)
HIGH
VCE(sat)
or High Z
(15) 18
MCE146
SDA
19
14
n.a.
n.a.
n.a.
(14) 19
MCE147
SCL
20
13
n.a.
n.a.
n.a.
(13) 20
FCE234
AS
21
12
1.25
1.25
1.25
(12) 21
FCE235
P3
22
11
High Z or
VCC − VDS
High Z or
VCC − VDS
High Z or
VCC − VDS
22 (11)
FCE236
2003 Jun 05
31
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
PIN
SYMBOL
AVERAGE DC VOLTAGE VERSUS
BAND SELECTION
TDA6500TT TDA6501TT
P0
23
10
TDA6500TT; TDA6501TT
LOW
VCC − VDS
MID
High Z
EQUIVALENT CIRCUIT(1)
HIGH
High Z
23 (10)
FCE237
P1
24
9
High Z
VCC − VDS
High Z
24 (9)
FCE238
AGC
25
8
0 V or
3.5 V
0 V or
3.5 V
0 V or
3.5 V
25 (8)
FCE239
P2
26
7
High Z or
VCC − VDS
High Z or
VCC − VDS
High Z or
VCC − VDS
26 (7)
FCE240
IFFIL1
27
6
4.4
4.4
4.4
IFFIL2
28
5
4.4
4.4
4.4
27 (6)
28 (5)
FCE241
RFGND
29
4
−
−
−
29 (4)
FCE242
2003 Jun 05
32
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
PIN
SYMBOL
TDA6500TT TDA6501TT
LBIN
30
3
TDA6500TT; TDA6501TT
AVERAGE DC VOLTAGE VERSUS
BAND SELECTION
LOW
1.8
MID
n.a.
EQUIVALENT CIRCUIT(1)
HIGH
n.a.
(3) 30
FCE243
MHBIN1
31
2
n.a.
1.0
1.0
MHBIN2
32
1
n.a.
1.0
1.0
(2) 31
32 (1)
MCE148
Note
1. The pin numbers in parenthesis represent the TDA6501TT.
2003 Jun 05
33
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
13 PACKAGE OUTLINE
TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm;
lead pitch 0.65 mm
SOT487-1
E
D
A
X
c
y
HE
v M A
Z
17
32
A2
(A 3)
A
A1
pin 1 index
θ
Lp
L
1
detail X
16
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1)
E(2)
e
HE
L
Lp
v
w
y
Z
θ
mm
1.1
0.15
0.05
0.95
0.85
0.25
0.30
0.19
0.20
0.09
11.1
10.9
6.2
6.0
0.65
8.3
7.9
1
0.75
0.50
0.2
0.1
0.1
0.78
0.48
8
0o
o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT487-1
2003 Jun 05
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
34
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
To overcome these problems the double-wave soldering
method was specifically developed.
14 SOLDERING
14.1
Introduction to soldering surface mount
packages
If wave soldering is used the following conditions must be
observed for optimal results:
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
14.2
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
worldwide use of lead-free solder pastes is increasing.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
• below 220 °C (SnPb process) or below 245 °C (Pb-free
process)
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
– for all BGA and SSOP-T packages
14.4
– for packages with a thickness ≥ 2.5 mm
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
• below 235 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
14.3
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
2003 Jun 05
Manual soldering
35
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
14.5
TDA6500TT; TDA6501TT
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA
not suitable
suitable(4)
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
not
PLCC(5), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO, VSSOP
REFLOW(2)
suitable
suitable
suitable
not
recommended(5)(6)
suitable
not
recommended(7)
suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2003 Jun 05
36
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
15 DATA SHEET STATUS
LEVEL
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
Development
DEFINITION
I
Objective data
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Production
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16 DEFINITIONS
17 DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Jun 05
37
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
18 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2003 Jun 05
38
Philips Semiconductors
Product specification
5 V mixer/oscillator and synthesizer
for PAL and NTSC standards
TDA6500TT; TDA6501TT
NOTES
2003 Jun 05
39
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected]
SCA75
© Koninklijke Philips Electronics N.V. 2003
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/01/pp40
Date of release: 2003
Jun 05
Document order number:
9397 750 10109