Revised November 1999 74AC280 9-Bit Parity Generator/Checker General Description Features The AC280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output. ■ ICC reduced by 50% ■ 9-bit width for memory applications ■ AC280: 5962-92201 Ordering Code: Package Number Package Description 74AC280SC Order Number M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74AC280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Pin Descriptions Pin Names Number of Description HIGH Inputs Outputs ∑ Even ∑ Odd I0–I8 Data Inputs ∑Ο Odd Parity Output 0, 2, 4, 6, 8 H L ∑Ε Even Parity Output 1, 3, 5, 7, 9 L H I0–I8 H = HIGH Voltage Level L = LOW Voltage Level FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS009955 www.fairchildsemi.com 74AC280 9-Bit Parity Generator/Checker November 1988 74AC280 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V −20 mA VI = VCC + 0.5V +20 mA DC Input Voltage (VI) Supply Voltage (VCC) 0V to VCC Output Voltage (VO) −0.5V to VCC + 0.5V 0V to VCC −40°C to +85°C Operating Temperature (TA) DC Output Diode Current (IOK) Minimum Input Edge Rate (∆V/∆t) VO = −0.5V −20 mA VO = VCC + 0.5V +20 mA DC Output Voltage (VO) 2.0V to 6.0V Input Voltage (VI) VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V −0.5V to VCC + 0.5V 125 mV/ns DC Output Source ±50 mA or Sink Current (IO) DC VCC or Ground Current ±50 mA per Output Pin (ICC or IGND ) Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. −65°C to +150°C Storage Temperature (TSTG) Junction Temperature (TJ) PDIP 140°C DC Electrical Characteristics Symbol Parameter (V) VIH VIL VOH TA = +25°C VCC Typ TA = −40°C to+85°C Units Conditions Guaranteed Limits Minimum HIGH Level 3.0 1.5 2.1 2.1 Input Voltage 4.5 2.25 3.15 3.15 5.5 2.75 3.85 3.85 Maximum LOW Level 3.0 1.5 0.9 0.9 Input Voltage 4.5 2.25 1.35 1.35 5.5 2.75 1.65 1.65 Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 3.0 2.56 2.46 4.5 3.86 3.76 5.5 4.86 4.76 VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V V IOUT = −50 µA VIN = VIL or VIH VOL IOH = −12 mA V IOH = −24 mA IOH = −24 mA (Note 2) Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 3.0 0.36 0.44 4.5 0.36 0.44 5.5 0.36 0.44 5.5 ±0.1 ±1.0 µA VI = VCC, GND VOLD = 1.65V Max V IOUT = 50 µA VIN = VIL or VIH IIN Maximum Input Leakage Current IOL = 12 mA V IOL = 24 mA (Note 2) IOLD Minimum Dynamic 5.5 75 mA IOHD Output Current (Note 3) 5.5 −75 mA ICC Maximum Quiescent (Note 4) Supply Current 5.5 4.0 40.0 IOL = 24 mA µA VOHD = 3.85V Min VIN = VCC or GND Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3 www.fairchildsemi.com 74AC280 Absolute Maximum Ratings(Note 1) 74AC280 AC Electrical Characteristics Symbol Parameter VCC TA = +25°C (V) CL = 50 pF TA = −40°C to +85°C CL = 50 pF (Note 5) Min Typ Max Min Max tPLH Propagation Delay 3.3 5.0 10.5 17.0 4.0 18.5 tPHL In to ∑Ε 5.0 3.0 7.5 13.0 2.0 14.5 tPLH Propagation Delay 3.3 5.0 12.0 17.0 4.0 18.5 tPHL In to ∑Ο 5.0 3.0 8.5 13.0 2.0 14.5 Note 5: Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V. Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC = OPEN CPD Power Dissipation Capacitance 75.0 pF VCC = 5.0V www.fairchildsemi.com 4 Conditions Units ns ns 74AC280 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body Package Number M14A 5 www.fairchildsemi.com 74AC280 9-Bit Parity Generator/Checker Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6