Order this document by MC33178/D The MC33178/9 series is a family of high quality monolithic amplifiers employing Bipolar technology with innovative high performance concepts for quality audio and data signal processing applications. This device family incorporates the use of high frequency PNP input transistors to produce amplifiers exhibiting low input offset voltage, noise and distortion. In addition, the amplifier provides high output current drive capability while consuming only 420 µA of drain current per amplifier. The NPN output stage used, exhibits no deadband crossover distortion, large output voltage swing, excellent phase and gain margins, low open–loop high frequency output impedance, symmetrical source and sink AC frequency performance. The MC33178/9 family offers both dual and quad amplifier versions, tested over the vehicular temperature range, and are available in DIP and SOIC packages. • 600 Ω Output Drive Capability • • • • • • • • HIGH OUTPUT CURRENT LOW POWER, LOW NOISE OPERATIONAL AMPLIFIERS DUAL P SUFFIX PLASTIC PACKAGE CASE 626 8 1 D SUFFIX PLASTIC PACKAGE CASE 751 (SO–8) Large Output Voltage Swing 8 Low Offset Voltage: 0.15 mV (Mean) 1 Low T.C. of Input Offset Voltage: 2.0 µV/°C Low Total Harmonic Distortion: 0.0024% (@ 1.0 kHz w/600 Ω Load) PIN CONNECTIONS High Gain Bandwidth: 5.0 MHz Output 1 High Slew Rate: 2.0 V/µs Dual Supply Operation: ±2.0 V to ±18 V Inputs 1 ESD Clamps on the Inputs Increase Ruggedness without Affecting Device Performance VEE 1 8 2 7 – + 3 6 – + 5 4 VCC Output 2 Inputs 2 (Top View) Representative Schematic Diagram (Each Amplifier) VCC QUAD P SUFFIX PLASTIC PACKAGE CASE 646 Iref Iref 14 1 Vin + Vin – CC VO CM D SUFFIX PLASTIC PACKAGE CASE 751A (SO–14) 14 1 PIN CONNECTIONS Output 1 VEE ORDERING INFORMATION 1 14 2 13 Inputs 1 3 Op Amp Function Dual Quad Fully Compensated Operating Temperature Range MC33178D MC33178P MC33179D MC33179P Package SO–8 Plastic DIP TA = –40° to +85°C SO–14 Plastic DIP VCC 1 4 – + + Inputs 4 12 4 11 5 10 Inputs 2 6 Output 2 – + – 2 7 3 + – Output 4 VEE Inputs 3 9 8 Output 3 (Top View) Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Rev 0 1 MC33178 MC33179 MAXIMUM RATINGS Rating Symbol Value Unit VS +36 V VIDR (Note 1) V Input Voltage Range VIR (Note 1) V Output Short Circuit Duration (Note 2) tSC Indefinite sec Maximum Junction Temperature TJ +150 °C Storage Temperature Range Tstg –60 to +150 °C Maximum Power Dissipation PD (Note 2) mW Supply Voltage (VCC to VEE) Input Differential Voltage Range NOTES: 1. Either or both input voltages should not exceed VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. (See power dissipation performance characteristic, Figure 1.) DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) Characteristics Figure Symbol Input Offset Voltage (RS = 50 Ω, VCM = 0 V, VO = 0 V) (VCC = +2.5 V, VEE = –2.5 V to VCC = +15 V, VEE = –15 V) TA = +25°C TA = –40° to +85°C 2 |VIO| Average Temperature Coefficient of Input Offset Voltage (RS = 50 Ω, VCM = 0 V, VO = 0 V) TA = –40° to +85°C 2 Input Bias Current (VCM = 0 V, VO = 0 V) TA = +25°C TA = –40° to +85°C 3, 4 Large Signal Voltage Gain (VO = –10 V to +10 V, RL = 600 Ω) TA = +25°C TA = –40° to +85°C Output Voltage Swing (VID = ±1.0 V) (VCC = +15 V, VEE = –15 V) RL = 300 Ω RL = 300 Ω RL = 600 Ω RL = 600 Ω RL = 2.0 kΩ RL = 2.0 kΩ (VCC = +2.5 V, VEE = –2.5 V) RL = 600 Ω RL = 600 Ω Typ Max 0.15 — 3.0 4.0 ∆VIO/∆T µV/°C — 2.0 — — — 100 — 500 600 — — 5.0 — 50 60 –13 — –14 +14 — +13 50 k 25 k 200 k — — — IIB nA |IIO| 5 VICR 6, 7 AVOL Unit mV — — Input Offset Current (VCM = 0 V, VO = 0 V) TA = +25°C TA = –40° to +85°C Common Mode Input Voltage Range (∆VIO = 5.0 mV, VO = 0 V) Min nA V V/V 8, 9, 10 V VO+ VO– VO+ VO– VO+ VO– — — +12 — +13 — +12 –12 +13.6 –13 +14 –13.8 — — — –12 — –13 VO+ VO– 1.1 — 1.6 –1.6 — –1.1 Common Mode Rejection (Vin = ±13 V) 11 CMR 80 110 — dB Power Supply Rejection VCC/VEE = +15 V/ –15 V, +5.0 V/ –15 V, +15 V/ –5.0 V 12 PSR 80 110 — dB Output Short Circuit Current (VID = ±1.0 V, Output to Ground) Source (VCC = 2.5 V to 15 V) Sink (VEE = –2.5 V to –15 V) 13, 14 ISC +50 –50 +80 –100 — — Power Supply Current (VO = 0 V) (VCC = 2.5 V, VEE = –2.5 V to VCC = +15 V, VEE = –15 V) MC33178 (Dual) TA = +25°C TA = –40° to +85°C MC33179 (Quad) TA = +25°C TA = –40° to +85°C 15 2 mA ID mA — — — — 1.4 1.6 — — 1.7 — 2.4 2.6 MOTOROLA ANALOG IC DEVICE DATA MC33178 MC33179 AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.) Characteristics Slew Rate (Vin = –10 V to +10 V, RL = 2.0 kΩ, CL = 100 pF, AV = +1.0 V) Gain Bandwidth Product (f = 100 kHz) AC Voltage Gain (RL = 600 Ω, VO = 0 V, f = 20 kHz) Figure Symbol Min Typ Max Unit 16, 31 SR 1.2 2.0 — V/µs 17 GBW 2.5 5.0 — MHz 18, 19 AVO — 50 — dB fU — 3.0 — MHz Unity Gain Frequency (Open–Loop) (RL = 600 Ω, CL = 0 pF) Gain Margin (RL = 600 Ω, CL = 0 pF) 20, 22, 23 Am — 15 — dB Phase Margin (RL = 600 Ω, CL = 0 pF) 21, 22, 23 φm — 60 — Degree s CS — –120 — dB BWp — 32 — kHz — — — 0.0024 0.014 0.024 — — — |ZO| — 150 — Ω Differential Input Resistance (VCM = 0 V) Rin — 200 — kΩ Differential Input Capacitance (VCM = 0 V) Cin — 10 — pF — — 8.0 7.5 — — — — 0.33 0.15 — — Channel Separation (f = 100 Hz to 20 kHz) 24 Power Bandwidth (VO = 20 Vpp, RL = 600 Ω, THD ≤ 1.0%) Distortion (RL = 600 Ω,, VO = 2.0 Vpp, AV = +1.0 V) (f = 1.0 kHz) (f = 10 kHz) (f = 20 kHz) 25 Open Loop Output Impedance (VO = 0 V, f = 3.0 MHz, AV = 10 V) 26 27 Equivalent Input Noise Current f = 10 Hz f = 1.0 kHz 28 Figure 1. Maximum Power Dissipation versus Temperature 2400 2000 % nV/ √ Hz en pA/ √ Hz in Figure 2. Input Offset Voltage versus Temperature for 3 Typical Units 4.0 V IO , INPUT OFFSET VOLTAGE (mV) PD (MAX), MAXIMUM POWER DISSIPATION (mW) Equivalent Input Noise Voltage (RS = 100 Ω,) f = 10 Hz f = 1.0 kHz THD MC33178P/9P 1600 MC33179D 1200 800 MC33178D 400 0 –60 –40 –20 0 20 40 60 80 100 120 140 160 180 TA, AMBIENT TEMPERATURE (°C) MOTOROLA ANALOG IC DEVICE DATA VCC = +15 V VEE = –15 V RS = 10 Ω VCM = 0 V 3.0 2.0 Unit 1 1.0 Unit 2 0 Unit 3 –1.0 –2.0 –3.0 –4.0 –55 –25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) 3 MC33178 MC33179 Figure 3. Input Bias Current versus Common Mode Voltage Figure 4. Input Bias Current versus Temperature 120 140 I IB , INPUT BIAS CURRENT (nA) I IB , INPUT BIAS CURRENT (nA) 160 120 100 80 60 40 VCC = +15 V VEE = –15 V TA = 25°C 20 –10 –5.0 0 5.0 VCM, COMMON MODE VOLTAGE (V) 10 100 90 80 70 60 –55 15 Figure 5. Input Common Mode Voltage Range versus Temperature VCC VCC –0.5 V VCC = +5.0 V to +18 V VEE = –5.0 V to –18 V ∆VIO = 5.0 mV VCC –1.0 V VCC –1.5 V VCC –2.0 V VEE +1.0 V VEE +0.5 V VEE –55 –25 0 25 50 75 100 125 150 VCC = +15 V VEE = –15 V f = 10 Hz ∆VO = 10 V to +10 V RL = 600 Ω 100 50 0 –55 140 180 1A 200 1B 220 240 260 20 280 VO, OUTPUT VOLTAGE (Vpp ) 35 120 , EXCESS PHASE (DEGREES) 40 100 0 1A) Phase (RL = 600 Ω) 2B –30 2A) Phase (RL = 600 Ω, CL = 300 pF) 2A –40 1B) Gain (RL = 600 Ω) 2B) Gain (RL = 600 Ω, CL = 300 pF) –50 2 3 4 5 6 7 8 9 10 f, FREQUENCY (Hz) 4 80 φ A VOL, OPEN LOOP VOLTAGE GAIN (dB) VCC = +15 V VEE = –15 V VO = 0 V TA = 25°C 160 –20 –25 0 25 50 75 100 125 Figure 8. Output Voltage Swing versus Supply Voltage 10 –10 125 TA, AMBIENT TEMPERATURE (°C) 50 20 100 200 Figure 7. Voltage Gain and Phase versus Frequency 30 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 250 TA, AMBIENT TEMPERATURE (°C) 40 –25 Figure 6. Open Loop Voltage Gain versus Temperature AVOL, OPEN LOOP VOLTAGE GAIN (kV/V) V ICR, INPUT COMMON MODE VOLTAGE RANGE (V) 0 –15 VCC = +15 V VEE = –15 V VCM = 0 V 110 TA = 25°C 30 RL = 10 kΩ 25 RL = 600 Ω 20 15 10 5.0 0 0 5.0 10 15 VCC, |VEE|, SUPPLY VOLTAGE (V) 20 MOTOROLA ANALOG IC DEVICE DATA MC33178 MC33179 Figure 9. Output Saturation Voltage versus Load Current VCC –1.0 V 28 Source TA = +125°C VO, OUTPUT VOLTAGE (Vpp ) V sat , OUTPUT SATURATION VOLTAGE (V) VCC Figure 10. Output Voltage versus Frequency TA = –55°C VCC –2.0 V VEE +2.0 V Sink TA = –55°C VEE +1.0 V VCC = +5.0 V to +18 V VEE = –5.0 V to –18 V TA = +125°C VEE 0 5.0 10 15 24 20 16 VCC = +15 V VEE = –15 V RL = 600 Ω AV = +1.0 V THD = ≤1.0% TA = 25°C 12 8.0 4.0 0 1.0 k 20 10 k Figure 11. Common Mode Rejection versus Frequency Over Temperature PSR, POWER SUPPLY REJECTION (dB) VCC = +15 V VEE = –15 V VCM = 0 V ∆VCM = ±1.5 V TA = –55° to +125°C 80 60 – ADM + ∆VCM 20 CMR = 20 Log 100 ∆VO ∆VCM ∆VO x ADM 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Figure 13. Output Short Circuit Current versus Output Voltage 100 Source 80 Sink 60 40 VCC = +15 V VEE = –15 V VID = ±1.0 V 20 0 –15 –9.0 –3.0 0 3.0 VO, OUTPUT VOLTAGE (V) MOTOROLA ANALOG IC DEVICE DATA 9.0 15 TA = –55° to +125°C VCC = +15 V VEE = –15 V ∆VCC = ±1.5 V +PSR 100 80 –PSR – ADM + 60 40 VCC ∆VO VEE 20 PSR = 20 Log 0 10 I SC , OUTPUT SHORT CIRCUIT CURRENT (mA) CMR, COMMON MODE REJECTION (dB) I SC , OUTPUT SHORT CIRCUIT CURRENT (mA) 120 100 0 10 1.0 M Figure 12. Power Supply Rejection versus Frequency Over Temperature 120 40 100 k f, FREQUENCY (Hz) IL, LOAD CURRENT (±mA) ∆VO/ADM ∆VCC 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Figure 14. Output Short Circuit Current versus Temperature 100 90 VCC = +15 V VEE = –15 V VID = ±1.0 V RL < 10 Ω Sink 80 Source 70 60 50 –55 –25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) 5 MC33178 MC33179 Figure 16. Normalized Slew Rate versus Temperature 1.15 625 TA = +25°C 250 TA = –55°C 125 0 0 2.0 4.0 6.0 8.0 10 12 14 16 1.05 1.00 0.95 0.90 – 0.85 ∆Vin 0.75 –55 18 –25 0 VCC = +15 V VEE = –15 V f = 100 kHz RL = 600 Ω CL = 0 pF –25 100 125 30 140 10 180 0 VCC = +15 V VEE = –15 V RL = 600 Ω TA = 25°C CL = 0 pF –10 –20 –30 –50 100 k –10 1A 1B 2A –20 1A) Phase V =18 V, V = –18 V CC EE –30 2A) Phase VCC 1.5 V, VEE = –1.5 V 1B) Gain V = 18 V, V = –18 V –40 2B) Gain VCC = 1.5 V, VEE = –1.5 V CC EE –50 100 k 1.0 M 140 160 200 220 240 260 10 M f, FREQUENCY (Hz) 6 120 180 2B 200 220 240 260 280 100 M 1.0 M 10 M f, FREQUENCY (Hz) 15 100 280 100 M Am, OPEN LOOP GAIN MARGIN (dB) 20 160 Gain Figure 20. Open Loop Gain Margin versus Temperature φ , PHASE (DEGREES) 30 120 20 80 TA = 25°C RL = ∞ CL = 0 pF 40 100 Phase –40 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 125 80 50 50 0 100 Figure 18. Voltage Gain and Phase versus Frequency 6.0 10 75 Figure 17. Gain Bandwidth Product versus Temperature 8.0 0 –55 50 600 Ω TA, AMBIENT TEMPERATURE (°C) 40 2.0 25 VO 100 pF VCC, |VEE| , SUPPLY VOLTAGE (V) 10 4.0 + 0.80 Figure 19. Voltage Gain and Phase versus Frequency A V , VOLTAGE GAIN (dB) VCC = +15 V VEE = –15 V ∆Vin = 20 Vpp φ , EXCESS PHASE (DEGREES) 375 1.10 SR, SLEW RATE (NORMALIZED) TA = +125°C 500 A V , VOLTAGE GAIN (dB) GBW, GAIN BANDWIDTH PRODUCT (MHz) I CC, SUPPLY CURRENT/AMPLIFIER (µ A) Figure 15. Supply Current versus Supply Voltage with No Load CL = 10 pF 12 CL = 100 pF 9.0 CL = 300 pF 6.0 3.0 0 –55 VCC = +15 V VEE = –15 V RL = 600 Ω –25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (°C) MOTOROLA ANALOG IC DEVICE DATA MC33178 MC33179 Figure 21. Phase Margin versus Temperature Figure 22. Phase Margin and Gain Margin versus Differential Source Resistance 12 10 CL = 100 pF 40 30 CL = 300 pF 20 VCC = +15 V VEE = –15 V RL = 600 Ω 10 0 –55 –25 8.0 6.0 25 50 75 100 50 VCC = +15 V VEE = –15 V RT = R1+R2 VO = 0 V TA = 25°C 1.0 k 40 30 – 6.0 Vin 3.0 + 20 VO 600 Ω CL 10 0 1.0 k 0 10 100 Drive Channel VCC = +15 V CEE = –15 V RL = 600 Ω TA = 25°C 140 130 120 110 100 100 1.0 k CL, OUTPUT LOAD CAPACITANCE (pF) 100 k 1.0 M Figure 26. Output Impedance versus Frequency 10 500 VCC = +15 V VO = 2.0 Vpp VEE = –15 V TA = 25°C RL = 600 Ω |Z O |, OUTPUT IMPEDANCE ( Ω ) THD, TOTAL HARMONIC DISTORTION (%) 10 k f, FREQUENCY (Hz) Figure 25. Total Harmonic Distortion versus Frequency AV = 1000 1.0 AV = 100 0.1 0.01 10 0 100 k 10 k 150 CS, CHANNEL SEPARATION (dB) 50 Gain Margin 9.0 10 Figure 24. Channel Separation versus Frequency m, PHASE MARGIN (DEGREES) 12 VO RT, DIFFERENTIAL SOURCE RESISTANCE (Ω) φ A m , OPEN LOOP GAIN MARGIN (dB) VCC = +15 V VEE = –15 V VO = 0 V Phase Margin + R2 0 100 125 60 15 30 – Vin Figure 23. Open Loop Gain Margin and Phase Margin versus Output Load Capacitance Phase Margin 40 20 R1 TA, AMBIENT TEMPERATURE (°C) 18 Gain Margin 4.0 2.0 0 60 φ m , PHASE MARGIN (DEGREES) CL = 10 pF 50 A m , GAIN MARGIN (dB) φ m , PHASE MARGIN (DEGREES) 60 AV = 10 AV = 1.0 400 300 VCC = +15 V VEE = –15 V VO = 0 V TA = 25°C 1. AV = 1.0 2. AV = 10 3. AV = 100 4. AV = 1000 200 100 3 2 1 4 100 1.0 k 10 k f, FREQUENCY (Hz) MOTOROLA ANALOG IC DEVICE DATA 100 k 0 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M 7 e n , INPUT REFERRED NOISE VOLTAGE ( nV/ √ Hz ) Figure 27. Input Referred Noise Voltage versus Frequency 20 Input Noise Voltage Test Circuit 18 + 16 VO – 14 12 10 8.0 6.0 4.0 2.0 0 10 VCC = +15 V VEE = –15 V TA = 25°C 100 1.0 k f, FREQUENCY (Hz) 10 k 10 k i n , INPUT REFERRED NOISE CURRENT (pA/ √ Hz ) MC33178 MC33179 Figure 28. Input Referred Noise Current versus Frequency 0.5 Input Noise Current Test Circuit 0.4 RS + – VO 0.3 (RS = 10 kΩ) 0.2 0.1 VCC = +15 V VEE = –15 V TA = 25°C 0 10 Figure 29. Percent Overshoot versus Load Capacitance 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k Figure 30. Noninverting Amplifier Slew Rate 90 PERCENT OVERSHOOT (%) 80 70 VCC = +15 V VEE = –15 V TA = 25°C 60 RL = 600 Ω 50 RL = 2.0 kΩ 40 30 20 10 0 10 100 1.0 k V O, OUTPUT VOLTAGE (5.0 V/DIV) 100 10 k VCC = +15 V VEE = –15 V AV = +1.0 RL = 600 Ω CL = 100 pF TA = 25°C t, TIME (2.0 µs/DIV) CL, LOAD CAPACITANCE (pF) V O, OUTPUT VOLTAGE (50 mV/DIV) VCC = +15 V VEE = –15 V AV = +1.0 RL = 600 Ω CL = 100 pF TA = 25°C t, TIME (2.0 ns/DIV) 8 Figure 32. Large Signal Transient Response VCC = +15 V VEE = –15 V AV = +1.0 RL = 600 Ω CL = 100 pF TA = 25°C V O, OUTPUT VOLTAGE (5.0 V/DIV) Figure 31. Small Signal Transient Response t, TIME (5.0 µs/DIV) MOTOROLA ANALOG IC DEVICE DATA MC33178 MC33179 Figure 33. Telephone Line Interface Circuit 10 k A1 To Receiver – 10 k + 10 k 1.0 µF 200 k 120 k From Microphone 2.0 k – + 0.05 µF 300 A2 820 Tip VR 1N4678 Phone Line 10 k Ring 10 k – + A3 VR APPLICATION INFORMATION This unique device uses a boosted output stage to combine a high output current with a drain current lower than similar bipolar input op amps. Its 60° phase margin and 15 dB gain margin ensure stability with up to 1000 pF of load capacitance (see Figure 23). The ability to drive a minimum 600 Ω load makes it particularly suitable for telecom applications. Note that in the sample circuit in Figure 33 both A2 and A3 are driving equivalent loads of approximately 600 Ω . The low input offset voltage and moderately high slew rate and gain bandwidth product make it attractive for a variety of other applications. For example, although it is not single supply (the common mode input range does not include ground), it is specified at +5.0 V with a typical common mode rejection of 110 dB. This makes it an excellent choice for use with digital circuits. The high common mode rejection, which is stable over temperature, coupled with a low noise figure and low distortion, is an ideal op amp for audio circuits. The output stage of the op amp is current limited and therefore has a certain amount of protection in the event of a short circuit. However, because of its high current output, it is especially important not to allow the device to exceed the maximum junction temperature, particularly with the MC33179 (quad op amp). Shorting more than one amplifier MOTOROLA ANALOG IC DEVICE DATA could easily exceed the junction temperature to the extent of causing permanent damage. Stability As usual with most high frequency amplifiers, proper lead dress, component placement, and PC board layout should be exercised for optimum frequency performance. For example, long unshielded input or output leads may result in unwanted input/output coupling. In order to preserve the relatively low input capacitance associated with these amplifiers, resistors connected to the inputs should be immediately adjacent to the input pin to minimize additional stray input capacitance. This not only minimizes the input pole frequency for optimum frequency response, but also minimizes extraneous “pick up” at this node. Supplying decoupling with adequate capacitance immediately adjacent to the supply pin is also important, particularly over temperature, since many types of decoupling capacitors exhibit great impedance changes over temperature. Additional stability problems can be caused by high load capacitances and/or a high source resistance. Simple compensation schemes can be used to alleviate these effects. 9 MC33178 MC33179 For moderately high capacitive loads (500 pF < CL < 1500 pF) the addition of a compensation resistor on the order of 20 Ω between the output and the feedback loop will help to decrease miller loop oscillation (see Figure 35). For high capacitive loads (C L > 1500 pF), a combined compensation scheme should be used (see Figure 36). Both the compensation resistor and the compensation capacitor affect the transient response and can be calculated for optimum performance. The value of CC can be calculated using Equation (1). The Equation to calculate RC is as follows: If a high source of resistance is used (R1 > 1.0 kΩ), a compensation capacitor equal to or greater than the input capacitance of the op amp (10 pF) placed across the feedback resistor (see Figure 34) can be used to neutralize that pole and prevent outer loop oscillation. Since the closed loop transient response will be a function of that capacitance, it is important to choose the optimum value for that capacitor. This can be determined by the following Equation: CC = (1 +[R1/R2])2 CL (ZO/R2) (1) where: ZO is the output impedance of the op amp. RC = ZO Figure 34. Compensation for High Source Impedance R1/R2 (2) Figure 35. Compensation Circuit for Moderate Capacitive Loads R2 R2 CC – RC – + R1 + CL R1 ZL Figure 36. Compensation Circuit for High Capacitive Loads R2 CC – R1 RC + CL 10 MOTOROLA ANALOG IC DEVICE DATA MC33178 MC33179 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 626–05 ISSUE K 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 –B– 1 DIM A B C D F G H J K L M N F –A– NOTE 2 MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 10_ 0.76 1.01 4 L C J –T– INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 10_ 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) M T A M B M D SUFFIX PLASTIC PACKAGE CASE 751–05 (SO–8) ISSUE R D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 8 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S MOTOROLA ANALOG IC DEVICE DATA DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.18 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ 11 MC33178 MC33179 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 646–06 ISSUE L 14 NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. 8 B 1 7 A F DIM A B C D F G H J K L M N L C J N H G D SEATING PLANE K M D SUFFIX PLASTIC PACKAGE CASE 751A–03 (SO–14) ISSUE F 8 –B– 1 P 7 PL 0.25 (0.010) 7 G M F –T– D 14 PL 0.25 (0.010) M K M T B S M R X 45 _ C SEATING PLANE B A S MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– 14 INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 Motorola reserves the right to make changes without further notice to any products herein. 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