SEMICONDUCTOR TECHNICAL DATA The MC10136 is a high speed synchronous counter that can count up, count down, preset, or stop count at frequencies exceeding 100 MHz. The flexibility of this device allows the designer to use one basic counter for most applications, and the synchronous count feature makes the MC10136 suitable for either computers or instrumentation. Three control lines (S1, S2, and Carry In) determine the operation mode of the counter. Lines S1 and S2 determine one of four operations; preset (program), increment (count up), decrement (count down), or hold (stop count). Note that in the preset mode a clock pulse is necessary to load the counter, and the information present on the data inputs (D0, D1, D2, and D3) will be entered into the counter. Carry Out goes low on the terminal count, or when the counter is being preset. This device is not designed for use with gated clocks. Control is via S1 and S2. L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 DIP PIN ASSIGNMENT PD = 625 mW typ/pkg (No Load) fcount = 150 MHz typ tpd = 3.3 ns typ (C-Q) 7.0 ns typ (C-Cout) 5.0 ns typ (Cin-Cout) VCC1 1 16 VCC2 Q2 2 15 Q1 Q3 3 14 Q0 Cout 4 13 CLOCK D3 5 12 D0 D2 6 11 D1 S2 7 10 Cin VEE 8 9 S1 FUNCTION TABLE Cin S1 S2 Operating Mode X L L Preset (Program) L L H Increment (Count Up) H L H Hold Count L H L Decrement (Count Down) H H L Hold Count X H H Hold (Stop Count) Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 3/93 Motorola, Inc. 1996 3–27 REV 5 MC10136 LOGIC DIAGRAM S1 9 S2 7 Carry In 10 VCC1 = PIN 1 VCC2 = PIN 16 Q0 T Q1 Q0 C T Q1 T C T T T T T Q3 T T Q3 TT C Q2 T Q2 T C VEE = PIN 8 Clock 13 12 D0 14 Q0 11 D1 15 Q1 6 D2 2 Q2 5 D3 3 Q3 4 Carry Out NOTE: Flip-flops will toggle when all T inputs are low. SEQUENTIAL TRUTH TABLE* INPUTS OUTPUTS S1 S2 D0 D1 D2 D3 Carry In Clock ** Q0 Q1 Q2 Q3 Carry Out L L L L L L H L H H H H L H H H H H H L L L L L L X X X X X X H X X X X L X X X X X X H X X X X H X X X X X X L X X X X H X X X X X X L X X X X X L L L H H X X L L L L H H H H L H H H H H H H L H L H H H H H L H L H L L H H H H H H H L L H H H H H H H H L L L L H H H H H H H H L L L L H L H H L H H H L H H L H * Truth table shows logic states assuming inputs vary in sequence shown from top to bottom. ** A clock H is defined as a clock input transition from a low to a high logic level. MOTOROLA 3–28 MECL Data DL122 — Rev 6 MC10136 ELECTRICAL CHARACTERISTICS Test Limits Characteristic Power Supply Drain Current Input Current Symbol Pin Pi Under Test IE 8 138 IinH 5,6,11,12 7 9,10 13 350 425 390 460 –30°C Min +25°C Max Min +85°C Max Unit 125 138 mAdc 220 265 245 290 220 265 245 290 µAdc Typ Max 100 0.5 Min µAdc IinL All 0.5 Output Voltage Logic 1 VOH 14 (2.) –1.060 –0.890 –0.960 –0.810 –0.890 0.3 –0.700 Vdc Output Voltage Logic 0 VOL 14 (2.) –1.890 –1.675 –1.850 –1.650 –1.825 –1.615 Vdc Threshold Voltage Logic 1 VOHA 14 (2.) –1.080 Threshold Voltage Logic 0 VOLA 14 (2.) –0.980 –0.910 –1.655 –1.630 Vdc –1.595 Switching Times (50Ω Load) Propagation Delay Clock Input t13+14+ t13+14– t13+4+ t13+4– 14 14 4 4 0.8 0.8 2.0 2.0 4.8 4.8 10.9 10.9 1.0 1.0 2.5 2.5 3.3 3.3 7.0 7.0 4.5 4.5 10.5 10.5 1.4 1.4 2.4 2.4 5.0 5.0 11.5 11.5 Carry In to Carry Out t10–4– t10+4+ 4 (3.) 4 1.6 1.6 7.4 7.4 1.6 1.6 5.0 5.0 6.9 6.9 1.9 1.9 7.5 7.5 Data Inputs t12+13+ t12–13+ 14 14 3.5 3.5 3.5 3.5 3.5 3.5 Select Inputs t9+13+ t7+13+ 14 14 6.0 6.0 6.0 6.0 6.0 6.0 Carry In Input t10–13+ t10+13+ 14 14 2.5 1.5 2.5 1.5 3.0 1.5 Data Inputs t13+12+ t13+12– 14 14 0 0 0 0 0 0 Select Inputs t13+9+ t13+7+ 14 14 –1.0 –1.0 –1.0 –1.0 –1.0 –1.0 Carry In Input t13+10– t13+10+ 14 14 0 0 0 0 0 0 fcountup fcountdown 14 14 125 125 125 125 150 150 Setup Time Hold Time Counting Frequency Vdc ns 125 125 MHz Rise Time (20 to 80%) t4+ t14+ 4 14 0.9 0.9 3.3 3.3 1.1 1.1 2.0 2.0 3.3 3.3 1.1 1.1 3.5 3.5 Fall Time (20 to 80%) t4– t14– 4 14 0.9 0.9 3.3 3.3 1.1 1.1 2.0 2.0 3.3 3.3 1.1 1.1 3.5 3.5 ns 1. Individually test each input; apply VILmin to pin under test. VIH appears at clock input (Pin 13). 2. Measure output after clock pulse VIL 3. Before test set all Q outputs to a logic high. 4. To preserve reliable performance, the MC10136 (plastic packaged device only) is to be operated in ambient temperatures above 70°C only when 500lfpm blown air or equivalent heat sinking is provided. MECL Data DL122 — Rev 6 3–29 MOTOROLA MC10136 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE VALUES (Volts) Characteristic @ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE –30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2 Symbol Power Supply Drain Current Input Current Pin Under Test IE 8 IinH 5,6,11,12 7 9,10 13 IinL All VOH 14 (2.) TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VEE (VCC) Gnd 8 1, 16 8 8 8 8 1, 16 1, 16 1, 16 1, 16 Note 1. 8 1, 16 7, 9 8 1, 16 8 1, 16 8 1, 16 VILmin Logic 1 Output Voltage Logic 0 VOL 14 (2.) 7, 9 Threshold Voltage Logic 1 VOHA 14 (2.) 7, 9 Logic 0 VOLA 14 (2.) Switching Times (50Ω Load) Propagation Delay Clock Input VILAmax 5,6,11,12 7 9,10 13 Output Voltage Threshold Voltage VIHAmin 12 12 7, 9 +1.11V 12 8 1, 16 Pulse In Pulse Out –3.2 V +2.0 V 13 13 13 13 14 14 4 4 8 8 8 8 1, 16 1, 16 1, 16 1, 16 13 13 10 10 4 4 8 8 1, 16 1, 16 7, 9 7, 9 12, 13 12, 13 14 14 8 8 1, 16 1, 16 9, 13 7, 13 14 14 8 8 1, 16 1, 16 9 9 10, 13 10, 13 14 14 8 8 1, 16 1, 16 7, 9 7, 9 12, 13 12, 13 14 14 8 8 1, 16 1, 16 9, 13 7, 13 14 14 8 8 1, 16 1, 16 10, 13 10, 13 14 14 8 8 1, 16 1, 16 +0.31V t13+14+ t13+14– t13+4+ t13+4– 14 14 4 4 12 Carry In to Carry Out t10–4– t10+4+ 4 (3.) 4 7 7 Data Inputs t12+13+ t12–13+ 14 14 Select Inputs t9+13+ t7+13+ 14 14 Carry In Inputs t10–13+ t10+13+ 14 14 Data Inputs t13+12+ t13+12– 14 14 Select Inputs t13+9+ t13+7+ 14 14 Carry In Inputs t13+10– t13+10+ 14 14 7 7 fcountup fcountdown 14 14 7 9 13 13 14 14 8 8 1, 16 1, 16 Setup Time Hold Time Counting Frequency 7 7 7 7 9 Rise Time (20 to 80%) t4+ t14+ 4 14 7 7 13 13 4 14 8 8 1, 16 1, 16 Fall Time (20 to 80%) t4– t14– 4 14 7 7 13 13 4 14 8 8 1, 16 1, 16 1. Individually test each input; apply VILmin to pin under test. VIH appears at clock input (Pin 13). 2. Measure output after clock pulse VIL 3. Before test set all Q outputs to a logic high. 4. To preserve reliable performance, the MC10136 (plastic packaged device only) is to be operated in ambient temperatures above 70°C only when 500lfpm blown air or equivalent heat sinking is provided. Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MOTOROLA 3–30 MECL Data DL122 — Rev 6 MC10136 SWITCHING TIME TEST CIRCUIT AND WAVEFORMS @ 25°C VCC1 = VCC2 = +2.0 VDC VIN NOTE: tsetup is the minimum time before the positive transition of the clock pulse (C) that information must be present at the input D or S. thold is the minimum time after the positive transition of the clock pulse (C) that information must remain unchanged at the input D or S. INPUT PULSE T+ = T– = 2.0 ±0.2 NS (20 TO 80%) Clock 25 µF COAX CLOCK INPUT TPin +0.31 V Q Output C tC+Q– 80% 50% 20% tQ+ tQ– COAX 16 CIN Q0 C Q1 D0 D1 Q2 D2 D3 Q3 S1 S2 COUT 50% tC+Q+ 0.1 µF 1 +1.11 V VOUT TPout 8 0.1 µF VEE = –3.2 VDC +1.11 V 50% +0.31 V thold H D or S thold L 50-ohm termination to ground located in each scope channel input. 50% All input and output cables to the scope are equal lengths of 50-ohm coaxial cable. Wire length should be < 1/4 inch from TPin to input pin and TPout to output pin. Unused outputs are connected to a 50-ohm resistor to ground. tsetup L tsetup H Q CARRY IN SET UP AND HOLD TIMES Carry in tset (L) thold (L) tset (N) thold (N) C MECL Data DL122 — Rev 6 3–31 MOTOROLA MC10136 APPLICATIONS INFORMATION The MC10136 may also be used as a programmable To provide more than four bits of counting capability several MC10136 counters may be cascaded. The Carry counter. The configuration of Figure 3 requires no In input overrides the clock when the counter is either in additional gates, although maximum frequency is limited the increment mode or the decrement mode of operation. to about 50 MHz. The divider modulus is equal to the This input allows several devices to be cascaded in a fully program input plus one (M = N + 1), therefore, the counter synchronous multistage counter as illustrated in Figure 1. will divide by a modulus varying from 1 to 16. The carry is advanced between stages as shown with no A second programmable configuration is also illustrated external gating. The Carry In of the first device may be left in Figure 4. A pulse swallowing technique is used to speed open. The system clock is common to all devices. the counter operation up to 110 MHz typically. The divider The various operational modes of the counter make it modulus for this figure is equal to the program input (M = useful for a wide variety of applications. If used with MECL N). The minimum modulus is 2 because of the pulse III devices, prescalers with input toggle frequencies in swallowing technique, and the modulus may vary from 2 excess of 300 MHz are possible. Figure 2 shows such a to 15. This programmable configuration requires an prescaler using the MC10136 and MC1670. Use of the additional gate, such as 1/2MC10109 and a flip-flop such MC10231 in place of the MC1670 permits 200 MHz as 1/2MC10131. operation. FIGURE 1 — 12 BIT SYNCHRONOUS COUNTER LSB FIGURE 2 — 300 MHz PRESCALER MSB Q0 Q1 Q2 Q3 Cin Q0 Q1 Q2 Q3 Cin Cout Cout Q0 Q1 Q2 Q3 Logic High Cin MC10136 S1 C D C C Input Frequency S2 C Q Input Frequency 32 Q System Clock Q3 C MC1670 NOTE: S1 and S2 are set either for increment or decrement operation. FIGURE 3 — 50 MHz PROGRAMMABLE COUNTER FIGURE 4 — 100 MHz PROGRAMMABLE COUNTER Program Input fin Program Input fin C D0 D1 D2 D3 Cin S2 S1 Cout C D0 D1 D2 D3 S2 MC10136 S1 Q0 Q2 Q3 fout D 1/2MC10109 1 fout = fin Program Input + 1 Q fout 1/2MC10131 C Q 2 fmax ≅ 50 MHz Typ. 3 Divide Ratio is from 1 to 16. 1 fout = fin Program Input 2 fmax ≅ 110 MHz Typ. 3 Divide Ratio is from 2 to 15. MOTOROLA 3–32 MECL Data DL122 — Rev 6 MC10136 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE C 0.007 (0.180) M T L–M B Y BRK –N– U N S 0.007 (0.180) M T L–M S S N S D –L– –M– Z W 20 D 1 V 0.010 (0.250) G1 X S T L–M S N S VIEW D–D A 0.007 (0.180) M T L–M S N S R 0.007 (0.180) M T L–M S N S Z C H –T– SEATING PLANE F VIEW S G1 0.010 (0.250) S T L–M S 0.007 (0.180) M T L–M S N S VIEW S S N S NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MECL Data DL122 — Rev 6 N K 0.004 (0.100) J S K1 E G 0.007 (0.180) M T L–M 3–33 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 ––– 0.025 ––– 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 ––– 0.020 2_ 10 _ 0.310 0.330 0.040 ––– MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 ––– 0.64 ––– 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 ––– 0.50 2_ 10 _ 7.88 8.38 1.02 ––– MOTOROLA MC10136 OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A T B M –A– 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ––– 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R 16 S INCHES MIN MAX 0.750 0.785 0.240 0.295 ––– 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MOTOROLA 3–34 *MC10136/D* MC10136/D MECL Data DL122 — Rev 6