SEMICONDUCTOR TECHNICAL DATA The MC10107 is a triple–2 input exclusive OR/NOR gate. PD = 40 mW typ/gate (No Load) tpd = 2.8 ns typ tr, tf = 2.5 ns typ (20%–80%) L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 LOGIC DIAGRAM 4 2 5 3 9 11 7 10 14 12 15 13 FN SUFFIX PLCC CASE 775–02 DIP PIN ASSIGNMENT 3 = (4 • 5) + (4 • 5) 2 = (4 • 5) + (4 • 5) VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 VCC1 1 16 VCC2 AOUT 2 15 CIN AOUT 3 14 CIN AIN 4 13 COUT AIN 5 12 COUT *NC 6 11 BOUT BIN 7 10 BOUT VEE 8 9 BIN *NC = No Connection Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 3/93 Motorola, Inc. 1996 3–30 REV 5 MC10107 ELECTRICAL CHARACTERISTICS Test Limits Characteristic Power Supply Drain Current Input Current Symbol Pin Pi Under Test IE 8 31 IinH 4, 9, 14 5, 7, 15 425 350 IinL * 0.5 –30°C Min +25°C Max Min Typ +85°C Max Unit 28 31 mAdc 265 220 265 220 µAdc Max 0.5 Min µAdc 0.3 Output Voltage Logic 1 VOH 2 2 3 3 –1.060 –1.060 –1.060 –1.060 –0.890 –0.890 –0.890 –0.890 –0.960 –0.960 –0.960 –0.960 –0.810 –0.810 –0.810 –0.810 –0.890 –0.890 –0.890 –0.890 –0.700 –0.700 –0.700 –0.700 Vdc Output Voltage Logic 0 VOL 2 2 3 3 –1.890 –1.890 –1.890 –1.890 –1.675 –1.675 –1.675 –1.675 –1.850 –1.850 –1.850 –1.850 –1.650 –1.650 –1.650 –1.650 –1.825 –1.825 –1.825 –1.825 –1.615 –1.615 –1.615 –1.615 Vdc Threshold Voltage Logic 1 VOHA 2 2 3 3 –1.080 –1.080 –1.080 –1.080 Threshold Voltage Logic 0 VOLA 2 2 3 3 Switching Times –0.980 –0.980 –0.980 –0.980 –1.655 –1.655 –1.655 –1.655 (50Ω Load) Propagation Delay –0.910 –0.910 –0.910 –0.910 –1.630 –1.630 –1.630 –1.630 Min Typ Max Vdc –1.595 –1.595 –1.595 –1.595 Vdc ns t++ t+ – t–+ t– – Inputs 4,9 or 14 to either Output –1.1 1.1 1.1 1.1 3.8 3.8 3.8 3.8 1.1 1.1 1.1 1.1 2.0 2.0 2.0 2.0 3.7 3.7 3.7 3.7 1.1 1.1 1.1 1.1 4.0 4.0 4.0 4.0 t++ t+ – t–+ t– – Inputs 5,7 or 15 to either Output 1.1 1.1 1.1 1.1 3.8 3.8 3.8 3.8 1.1 1.1 1.1 1.1 2.8 2.8 2.8 2.8 3.7 3.7 3.7 3.7 1.1 1.1 1.1 1.1 4.0 4.0 4.0 4.0 Rise Time (20 to 80%) t+ ** 1.1 3.5 1.1 2.5 3.5 1.1 3.8 Fall Time (20 to 80%) t– ** 1.1 3.5 1.1 2.5 3.5 1.1 3.8 * Individually test each input applying VIH or VIL to input under test. ** Any Output. MECL Data DL122 — Rev 6 3–31 MOTOROLA MC10107 ELECTRICAL CHARACTERISTICS (continued) TEST VOLTAGE VALUES (Volts) Characteristic Power Supply Drain Current Input Current Output Voltage Logic 1 @ Test Temperature VIHmax VILmin VIHAmin VILAmax VEE –30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2 Symbol Pin Under Test VIHmax IE 8 IinH 4, 9, 14 5, 7, 15 IinL * VOH 2 2 3 3 4, 5 TEST VOLTAGE APPLIED TO PINS LISTED BELOW VEE (VCC) Gnd 5, 7, 15 8 1, 16 * * 8 8 1, 16 1, 16 8 1, 16 8 8 8 8 1, 16 1, 16 1, 16 1, 16 8 8 8 8 1, 16 1, 16 1, 16 1, 16 8 8 8 8 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 VOL 2 2 3 3 4 5 4, 5 Threshold Voltage Logic 1 VOHA 2 2 3 3 5 Switching Times VOLA 4 4 4 5 2 2 3 3 (50Ω Load) Propagation Delay VILAmax 4 5 Logic 0 Logic 0 VIHAmin * Output Voltage Threshold Voltage VILmin 5 4 5 4 4 8 8 8 8 +1.1V Pulse In Pulse Out –3.2 V +2.0 V t++ t+ – t–+ t– – Inputs 4,9 or 14 to either Output 5, 7, 15 5, 7, 15 5, 7, 15 5, 7, 15 Input 4, 9 or 14 Corresponding XOR/XNOR Outputs 8 8 8 8 1, 16 1, 16 1, 16 1, 16 t++ t+ – t–+ t– – Inputs 5,7 or 15 to either Output 4, 9, 14 4, 9, 14 4, 9, 14 4, 9, 14 Input 5, 7 or 15 Corresponding XOR/XNOR Outputs 8 8 8 8 1, 16 1, 16 1, 16 1, 16 Corresponding XOR/XNOR Outputs 8 1, 16 8 1, 16 Rise Time (20 to 80%) t+ ** 4, 9, 14 Any Input Fall Time (20 to 80%) t– ** 4, 9, 14 Any Input * Individually test each input applying VIH or VIL to input under test. ** Any Output. Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner. MOTOROLA 3–32 MECL Data DL122 — Rev 6 MC10107 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE C 0.007 (0.180) M T L–M B Y BRK –N– U N S 0.007 (0.180) M T L–M S S N S D –L– –M– Z W 20 D 1 V 0.010 (0.250) G1 X S T L–M S N S VIEW D–D A 0.007 (0.180) M T L–M S N S R 0.007 (0.180) M T L–M S N S Z C H –T– SEATING PLANE F VIEW S G1 0.010 (0.250) S T L–M S 0.007 (0.180) M T L–M S N S VIEW S S N S NOTES: 1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MECL Data DL122 — Rev 6 N K 0.004 (0.100) J S K1 E G 0.007 (0.180) M T L–M 3–33 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 ––– 0.025 ––– 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 ––– 0.020 2_ 10 _ 0.310 0.330 0.040 ––– MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 ––– 0.64 ––– 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 ––– 0.50 2_ 10 _ 7.88 8.38 1.02 ––– MOTOROLA MC10107 OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.25 (0.010) 16 PL 0.25 (0.010) M T A T B M –A– 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 ––– 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R 16 S INCHES MIN MAX 0.750 0.785 0.240 0.295 ––– 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ MOTOROLA 3–34 *MC10107/D* MC10107/D MECL Data DL122 — Rev 6