Revised August 1999 74LVT244 •74LVTH244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The LVT244 and LVTH244 are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers and bus oriented transmitters or receivers which provide improved PC board density. ■ Input and output interface capability to systems at 5V VCC The LVTH244 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These octal buffers and line drivers are designed for lowvoltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT244 and LVTH244 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. ■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH244), also available without bushold feature (74LVT244) ■ Live insertion/extraction permitted ■ Power Up/Down high impedance provides glitch-free bus loading ■ Outputs source/sink −32 mA/+64 mA ■ Functionally compatible with the 74 series 244 ■ Latch-up performance exceeds 500 mA Ordering Code: Order Number Package Number 74LVT244WM 74LVT244SJ M20B M20D 74LVT244MSA MSA20 74LVT244MTC MTC20 74LVTH244WM M20B 74LVTH244SJ M20D Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVTH244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LVTH244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC © 1999 Fairchild Semiconductor Corporation DS500154 www.fairchildsemi.com 74LVT244 •74LVTH244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs July 1999 74LVT244 •74LVTH244 Connection Diagram Pin Descriptions Pin Names OE1, OE2 Description 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 Output Truth Tables Inputs Outputs OE1 In (Pins 12, 14, 16, 18) L L L L H H H X Z Inputs Outputs OE2 In L L L L H H H X Z (Pins 3, 5, 7, 9) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance www.fairchildsemi.com 2 Symbol Parameter Value Conditions Units VCC Supply Voltage −0.5 to +4.6 VI DC Input Voltage −0.5 to +7.0 VO DC Output Voltage −0.5 to +7.0 Output in 3-STATE −0.5 to +7.0 Output in HIGH or LOW State (Note 2) V V V IIK DC Input Diode Current −50 VI < GND IOK DC Output Diode Current −50 VO < GND IO DC Output Current 64 VO > VCC Output at HIGH State 128 VO > VCC Output at LOW State V mA mA mA ICC DC Supply Current per Supply Pin ±64 mA IGND DC Ground Current per Ground Pin ±128 mA TSTG Storage Temperature −65 to +150 °C Recommended Operating Conditions Symbol Parameter VCC Supply Voltage VI Input Voltage Min Max 2.7 3.6 V 0 5.5 V IOH HIGH-Level Output Current −32 IOL LOW-Level Output Current 64 TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Units mA −40 85 °C 0 10 ns/V Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 2: IO Absolute Maximum Rating must be observed. 3 www.fairchildsemi.com 74LVT244 •74LVTH244 Absolute Maximum Ratings(Note 1) 74LVT244 •74LVTH244 DC Electrical Characteristics Symbol T A =−40°C to +85°C VCC (V) Parameter Min Typ Max Units −1.2 V Conditions (Note 3) Input Clamp Diode Voltage VIH Input HIGH Voltage 2.7–3.6 VIL Input LOW Voltage 2.7–3.6 VOH Output HIGH Voltage 2.7–3.6 VCC−0.2 V IOH = −100 µA 2.7 2.4 V IOH = −8 mA 3.0 2.0 V IOH = −32 mA VOL II(HOLD) 2.7 II = −18 mA VIK Output LOW Voltage 2.0 0.8 0.2 V IOL = 100 µA 2.7 0.5 V IOL = 24 mA 3.0 0.4 V IOL = 16 mA 3.0 0.5 V IOL = 32 mA 3.0 0.55 V 3.0 3.0 (Note 4) Bushold Input Over-Drive Current to Change State II Input Current (Note 4) IOFF Power Off Leakage Current IPU/PD Power up/down 3-STATE VO ≥ VCC − 0.1V 2.7 Bushold Input Minimum Drive II(OD) VO ≤ 0.1V or V IOL = 64 mA 75 µA VI = 0.8V −75 µA VI = 2.0V 500 µA (Note 5) −500 µA (Note 6) 3.6 10 µA VI = 5.5V Control Pins 3.6 ±1 µA VI = 0V or VCC Data Pins 3.6 −5 µA VI = 0V 1 µA VI = VCC 0 ±100 µA 0V ≤ VI or VO ≤ 5.5V 0–1.5V ±100 µA Output Current VO = 0.5V to 3.0V VI = GND or VCC IOZL 3-STATE Output Leakage Current 3.6 −5 µA VO = 0.5V IOZH 3-STATE Output Leakage Current 3.6 5 µA VO = 3.0V IOZH+ 3-STATE Output Leakage Current 3.6 10 µA VCC < VO ≤ 5.5V ICCH Power Supply Current 3.6 0.19 mA Outputs HIGH ICCL Power Supply Current 3.6 5 mA Outputs LOW ICCZ Power Supply Current 3.6 0.19 mA Outputs Disabled ICCZ+ Power Supply Current 3.6 0.19 mA VCC ≤ VO ≤ 5.5V, ∆ICC Increase in Power Supply Current 3.6 0.2 mA Outputs Disabled One Input at VCC − 0.6V (Note 7) Other Inputs at VCC or GND Note 3: All typical values are at VCC = 3.3V, TA = 25°C. Note 4: Applies to bushold versions only (74LVTH244). Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND. Dynamic Switching Characteristics (Note 8) Symbol Parameter VCC (V) TA = 25°C Min Typ Max Units Conditions CL = 50 pF, RL = 500Ω VOLP Quiet Output Maximum Dynamic VOL 3.3 0.8 V (Note 9) VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.8 V (Note 9) Note 8: Characterized in SOIC package. Guaranteed parameter, but not tested. Note 9: Max number of outputs defined as (n). n−1 data inputs are driven 0V to 3V. Output under test held LOW. www.fairchildsemi.com 4 TA = −40°C to +85°C CL = 50 pF, RL = 500Ω Symbol VCC = 3.3V ± 0.3V Parameter Min Typ VCC = 2.7V Max Min Max 1.1 3.8 1.1 4.0 1.3 3.9 1.3 4.2 1.1 4.5 1.1 5.3 1.4 4.4 1.4 5.0 1.9 4.9 1.9 5.1 1.8 4.4 1.8 4.4 Units (Note 10) tPLH Propagation Delay Data to Output tPHL tPZH Output Enable Time tPZL tPHZ Output Disable Time tPLZ tOSHL Output to Output Skew tOSLH (Note 11) 1.0 ns ns ns 1.0 ns Note 10: All typical values are at VCC = 3.3V, TA = 25°C. Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance (Note 12) Typical Units CIN Symbol Input Capacitance Parameter VCC = 0V, VI = 0V or VCC Conditions 3 pF COUT Output Capacitance VCC = 3.0V, VO = 0V or VCC 6 pF Note 12: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012. 5 www.fairchildsemi.com 74LVT244 •74LVTH244 AC Electrical Characteristics 74LVT244 •74LVTH244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 74LVT244 •74LVTH244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com 74LVT244 •74LVTH244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8