LINER LTC1687

LTC1686/LTC1687
52Mbps Precision Delay
RS485 Fail-Safe Transceivers
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DESCRIPTION
FEATURES
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Precision Propagation Delay Over Temperature:
Receiver/Driver: 18.5ns ±3.5ns
High Data Rate: 52Mbps
Low tPLH/tPHL Skew:
Receiver/Driver: 500ps Typ
–7V to 12V RS485 Input Common Mode Range
Guaranteed Fail-Safe Operation Over the Entire
Common Mode Range
High Input Resistance: ≥ 22k, Even When Unpowered
Short-Circuit Protected
Thermal Shutdown Protected
Driver Maintains High Impedance in Three-State or
with Power Off
Single 5V Supply
Pin Compatible with LTC490/LTC491
45dB CMRR at 26MHz
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APPLICATIONS
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High Speed RS485/RS422 Full Duplex Transceivers
Level Translator
Backplane Transceiver
STS-1/OC-1 Data Transceiver
Signal Repeaters
The LTC®1686/LTC1687 are high speed, precision delay,
full-duplex RS485 transceivers that can operate at data
rates as high as 52Mbps. The devices also meet the
requirements of RS422.
A unique architecture provides very stable propagation
delays and low skew over a wide common mode and
ambient temperature range.
The driver and receiver feature three-state outputs, with
disabled driver outputs maintaining high impedance over
the entire common mode range. A short-circuit feature
detects shorted outputs and substantially reduces driver
output current. A similar feature also protects the receiver
output from short circuits. Thermal shutdown circuitry
protects from excessive power dissipation.
The receiver has a fail-safe feature that guarantees a high
output state when the inputs are shorted or are left floating.
The LTC1686/LTC1687 RS485 transceivers guarantee
receiver fail-safe operation over the entire common mode
range (– 7V to 12V). Receiver input resistance remains
≥ 22k when the device is unpowered or disabled.
The LTC1686/LTC1687 operate from a single 5V supply
and draw only 7mA of supply current.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
10Mbps Data Pulse
400 Feet Category 5 UTP
LTC1686
LTC1686
D
3
DRIVER
DRIVER INPUT
2V/DIV
5
CABLE DELAY
100Ω
100Ω
6
RECEIVER
R
1V/DIV
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
8
R
2
RECEIVER
100Ω
100Ω
7
DRIVER
D
400 FT OF CATEGORY 5 UTP
100ns/DIV
1686/87 TA02
LTC1686/87 • TA01
1
LTC1686/LTC1687
W W
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ABSOLUTE
RATI GS
(Note 1)
Driver Short-Circuit Duration
(VOUT: – 7V to 10V)...................................... Indefinite
Receiver Short-Circuit Duration
(VOUT: 0V to VDD) ........................................ Indefinite
Operating Temperature Range .................... 0°C to 70°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
Supply Voltage (VDD) .............................................. 10V
Control Input Currents .................... – 100mA to 100mA
Control Input Voltages .................. – 0.5V to VDD + 0.5V
Driver Input Voltages .................... – 0.5V to VDD + 0.5V
Driver Output Voltages ................................. + 12V/– 7V
Receiver Input Voltages ................................ + 12V/– 7V
Receiver Output Voltages ............. – 0.5V to VDD + 0.5V
Receiver Input Differential ...................................... 10V
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
VDD 1
R 2
8
R
D 3
TOP VIEW
ORDER PART
NUMBER
7
A
LTC1686CS8
B
6
Z
5
Y
D
GND 4
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART MARKING
TJMAX = 125°C, θJA = 150°C/ W
NC
1
ORDER PART
NUMBER
14 VDD
R
13 NC
R
2
RE
3
12 A
DE
4
11 B
LTC1687CS
10 Z
D
5
GND
6
9
Y
GND
7
8
NC
D
1686
S PACKAGE
14-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 90°C/ W
Consult factory for Industrial and Military grade parts.
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ± 5% unless otherwise noted (Notes 2, 3).
SYMBOL
PARAMETER
CONDITIONS
MIN
VOD1
Differential Driver Output (Unloaded)
IOUT = 0
●
VOD2
Differential Driver Output (With Load)
R = 50Ω (RS422)
R = 27Ω (RS485), Figure 1
●
2.0
1.5
∆VOD
Change in Magnitude of Driver Differential
Output Voltage for Complementary
Output States
R = 27Ω or 50Ω, Figure 1
●
VOC
Driver Common Mode Output Voltage
R = 27Ω or 50Ω, VDD = 5V, Figure 1
●
∆VOC
Change in Magnitude of Driver Common
Mode Output Voltage for Complementary
Output States
R = 27Ω or 50Ω, Figure 1
●
VIH
Input High Voltage
D, DE, RE
●
VIL
Input Low Voltage
D, DE, RE
●
IIN1
Input Current
D, DE, RE
●
–1
IIN2
Input Current (A, B)
VA, VB = 12V, VDD = 0V or 5.25V
VA, VB = – 7V, VDD = 0V or 5.25V
●
●
– 500
●
– 0.3
VTH
Differential Input Threshold Voltage
for Receiver
– 7V ≤ VCM ≤ 12V
∆VTH
Receiver Input Hysteresis
VCM = 0V
VOH
Receiver Output High Voltage
IOUT = – 4mA, VID = 300mV
2
●
TYP
2
MAX
UNITS
VDD
V
VDD
V
V
0.2
V
3
V
0.2
V
2
3.5
V
0.8
V
1
µA
500
µA
µA
0.3
V
25
mV
4.8
V
LTC1686/LTC1687
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ±5% unless otherwise noted (Notes 2, 3).
SYMBOL
PARAMETER
CONDITIONS
VOL
Receiver Output Low Voltage
IOUT = 4mA, VID = – 300mV
●
IOZR
Three-State (High Impedance) Output
Current at Receiver
0.4V ≤ VOUT ≤ 2.4V
●
IOZD
Three-State (High Impedance) Output
Current at Driver
VOUT = – 7V to 12V
●
CLOAD
Receiver and Driver Output Load Capacitance (Note 4)
●
IDD
Supply Current
No Load, Pins D, DE, RE = 0V or VDD
●
IOSD1
Driver Short-Circuit Current, VOUT = HIGH
VOUT = – 7V or 10V (Note 5)
IOSD2
Driver Short-Circuit Current, VOUT = LOW
IOSR
Receiver Short-Circuit Current
RIN
Input Resistance
– 7V ≤ VCM ≤ 12V
●
22
CIN
Input Capacitance
A, B, D, DE, RE Inputs (Note 4)
Open-Circuit Input Voltage
VDD = 5V (Note 4), Figure 5
●
3.2
Fail-Safe
Time
Time to Detect Fail-Safe Condition
CMRR
Receiver Input Common Mode
Rejection Ratio
MIN
TYP
MAX
UNITS
0.4
V
–1
1
µA
– 200
200
µA
500
pF
12
mA
●
20
mA
VOUT = – 7V or 10V (Note 5)
●
20
mA
VOUT = 0V or VDD (Note 5)
●
20
mA
7
3
VCM = 2.5V, f = 26MHz
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SWITCHING CHARACTERISTICS
kΩ
3.3
pF
3.4
V
2
µs
45
dB
VDD = 5V, unless otherwise noted (Notes 2, 3).
SYMBOL
PARAMETER
CONDITIONS
tPLH, tPHL
Driver Input-to-Output Propagation Delay
RDIFF = 54Ω, CL1 = CL2 = 100pF,
Figures 3, 5
tSKEW
Driver Output A-to-Output B Skew
RDIFF = 54Ω, CL1 = CL2 = 100pF,
Figures 3, 5
500
ps
t r , tf
Driver Rise/Fall Time
RDIFF = 54Ω, CL1 = CL2 = 100pF,
Figures 3, 5
3.5
ns
tZH
Driver Enable to Output High
CL = 100pF, S2 Closed, Figures 4, 6
●
25
50
ns
tZL
Driver Enable to Output Low
CL = 100pF, S1 Closed, Figures 4, 6
●
25
50
ns
tLZ
Driver Disable from Low
CL = 15pF, S1 Closed, Figures 4, 6
●
25
50
ns
t HZ
Driver Disable from High
CL = 15pF, S2 Closed, Figures 4, 6
●
25
50
ns
tPLH, tPHL
●
18.5
22
ns
tSQD
Receiver Input-to-Output Propagation Delay CL = 15pF, Figures 3, 7
Receiver Skew tPLH – t PHL
CL = 15pF, Figures 3, 7
tZL
Receiver Enable to Output Low
CL = 15pF, S1 Closed, Figures 2, 8
●
25
50
ns
tZH
Receiver Enable to Output High
CL = 15pF, S2 Closed, Figures 2, 8
●
25
50
ns
tLZ
Receiver Disable from Low
CL = 15pF, S1 Closed, Figures 2, 8
●
25
50
ns
t HZ
Receiver Disable from High
CL = 15pF, S2 Closed, Figures 2, 8
●
25
50
ns
Maximum Receiver Input
Rise/Fall Times
(Note 4)
●
2000
ns
tPKG-PKG
●
MIN
TYP
MAX
15
18.5
22
15
500
UNITS
ns
ps
Package-to-Package Skew
CL = 15pF, Same Temperature (Note 4)
Minimum Input Pulse Width
VDD = 5V ±5% (Note 4)
●
1.5
Maximum Data Rate
VDD = 5V ±5% (Note 4)
●
52
60
Mbps
Maximum Input Frequency
VDD = 5V ±5% (Note 4)
●
26
30
MHz
17
ns
19.2
ns
3
LTC1686/LTC1687
ELECTRICAL CHARACTERISTICS
Note 3: All typicals are given for VDD = 5V, TA = 25°C.
Note 4: Guaranteed by design, but not tested.
Note 5: Short-circuit current does not represent output drive capability.
When the output detects a short-circuit condition, output drive current is
significantly reduced (from hundreds of mA to 20mA max) until the short
is removed.
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into the device pins are positive; all currents out of the
device pins are negative.
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TYPICAL PERFORMANCE CHARACTERISTICS
Receiver Input CMRR
Supply Current vs Data Rate
45.0
44.5
44.0
43.5
43.0
57
SUPPLY CURRENT (mA)
45.5
SUPPLY CURRENT (mA)
50
40
30
20
10
42.5
TA = 25°C
0
42.0
1k
10
100k
FREQUENCY (Hz)
1
1M
10
20
30
DATA RATE (Mbps)
40
Receiver Propagation Delay
vs Load Capacitance
25
TA = 25°C
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
25
20
15
10
5
25
35
55
105
LOAD CAPACITANCE (pF)
205
1686/87 G04
4
54
53
52
BOTH DRIVER AND RECEIVER
ENABLED AND LOADED
25Mbps DATA RATE
50
– 25
50
0
25
50
TEMPERATURE (°C)
75
100
1686/87 G03
Receiver Propagation Delay
vs Input Overdrive
Receiver Propagation Delay
vs Common Mode
30
15
55
1686/87 G02
1686/87 G01
5
56
51
25
TA = 25°C
RECEIVER PROPAGATION DELAY (ns)
COMMON MODE REJECTION RATIO (dB)
58
BOTH DRIVER AND RECEIVER
ENABLED AND LOADED
60 T = 25°C
A
46.0
0
Supply Current vs Temperature
70
46.5
20
15
10
5
TA = 25°C
20
15
10
5
0
0
8 10
4
–7 –4 –2 0
6
2
RECEIVER COMMON MODE (V)
12
1686/87 G05
0.3
0.5 0.7 1.0 1.25 1.5 2.0
RECEIVER INPUT OVERDRIVE (V)
2.5
1686/87 G06
LTC1686/LTC1687
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TYPICAL PERFORMANCE CHARACTERISTICS
Receiver Propagation Delay
vs Temperature
Receiver Maximum Data Rate
vs Input Overdrive
25
Driver Propagation Delay
vs Temperature
70
25
TA = 25°C
15
10
PROPAGATION DELAY (ns)
DATA RATE (Mbps)
PROPAGATION DELAY (ns)
60
20
50
40
30
20
5
50
0
75
25
TEMPERATURE (°C)
100
125
0
0.3
1.5
0.4
0.5 0.6 0.7 1.0
RECEIVER INPUT DIFFERENTIAL (V)
1686/87 G09
0
– 20
2.5
0
20
40
60
TEMPERATURE (°C)
80
100
1686/87 G07
Driver Propagation Delay
vs Capacitive Load
19.0
25
VDD = 5V
INPUT THRESHOLD = 1.5V
TA = 25°C
tHL
TA = 25°C
18.5
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
10
1686/87 G10
Driver Propagation Delay
vs Driver Input Voltage
20
15
5
10
0
–50 –25
20
tLH
15
10
5
18.0
17.5
17.0
16.5
16.0
0
2.5
3.0
4.0
4.5
3.5
DRIVER INPUT VOLTAGE (V)
5.0
5
15
25
50
75
100
LOAD CAPACITANCE (pF)
150
1686/87 G11
1686/87 G08
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PIN FUNCTIONS
LTC1686
VDD (Pin 1): Positive Supply, 5V to ±5%. Bypass with
0.1µF ceramic capacitor.
B (Pin 7): Inverting Receiver Input.
A (Pin 8): Noninverting Receiver Input.
R (Pin 2): Receiver Output. If A ≥ B by 300mV, then R will
be high. If A ≤ B by 300mV, then R will be low.
LTC1687
NC (Pins 1, 8, 13): No Connection.
D (Pin 3): Driver Input. Controls the states of the Y and Z
outputs. Do not float.
R (Pin 2): Receiver Output. If A ≥ B by 300mV, then R will
be high. If A ≤ B by 300mV, then R will be low.
GND (Pin 4): Ground.
RE (Pin 3): Receiver Enable. RE = low enables the receiver.
RE = high forces receiver output into high impedance
state. Do not float.
Y (Pin 5): Noninverting Driver Output.
Z (Pin 6): Inverting Driver Output.
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LTC1686/LTC1687
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PIN FUNCTIONS
DE (Pin 4): Driver Enable. DE = high enables the driver.
DE = low will force the driver output into a high impedance
state. Do not float.
D (Pin 5): Driver Input. Controls the states of the Y and Z
outputs when DE = high. Do not float.
GND (Pins 6, 7): Ground.
Z (Pin 10): Inverting Driver Output.
B (Pin 11): Inverting Receiver Input.
A (Pin 12): Noninverting Receiver Input.
VDD (Pin 14): Positive Supply, 5V to ±5%. Bypass with
0.1µF ceramic capacitor.
Y (Pin 9): Noninverting Driver Output.
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FU CTIO TABLES
(LTC1687)
Receiving
Transmitting
RE
INPUTS
DE
D
LINE
CONDITION
Z
Y
RE
INPUTS
DE
A–B
OUTPUT
R
X
1
1
No Fault
0
1
0
X
≥ 300mV
1
X
1
0
No Fault
1
0
0
X
≤ – 300mV
0
X
0
X
X
Hi- Z
Hi- Z
0
X
Inputs Open
1
X
1
X
Fault
0
X
Inputs Shorted Together
A = B = – 7V to 12V
1
1
X
X
Hi- Z
OUTPUTS
±10mA Current
Source
TEST CIRCUITS
Y
RECEIVER
OUTPUT
1k
VDD
VOD
R
S1
TEST POINT
R
CL
15pF
VOC
1k
S2
1686/87 F02
Z
1686/87 • F01
Figure 2. Driver DC Test Load
Figure 1. Driver DC Test Load
3V
DE
CL1
Y
D
RDIFF
Z
A
S1
R
B
CL2
OUTPUT
UNDER TEST
RE
15pF
VDD
500Ω
S2
CL
1686/87 F04
1686/87 F03
Figure 3. Driver/Receiver Timing Test Circuit
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Figure 4. Driver Timing Test Load #2
LTC1686/LTC1687
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SWITCHI G TI E WAVEFOR S
3V
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
1.5V
D
1.5V
0V
t PLH
1/2 VO
t PHL
Z
VO
Y
tSKEW
1/2 VO
VO
0V
–VO
t SKEW
90%
90%
VDIFF = V(Y) – V(Z)
10%
10%
tr
1686/87 F05
tf
Figure 5. Driver Propagation Delays
3V
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
1.5V
DE
1.5V
0V
5V
t ZL
Y, Z
t LZ
2.5V
OUTPUT NORMALLY LOW
0.5V
2.5V
OUTPUT NORMALLY HIGH
0.5V
VOL
VOH
Y, Z
0V
t HZ
t ZH
1686/87 F06
Figure 6. Driver Enable and Disable Times
VOH
2.5V
R
VOL
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
t PHL
VOD2
A–B
–VOD2
0V
2.5V
OUTPUT
t PLH
INPUT
1686/87 F07
Figure 7. Receiver Propagation Delays
3V
1.5V
RE
f = 1MHz, t r ≤ 3ns, t f ≤ 3ns
1.5V
0V
5V
t ZL
t LZ
R
2.5V
OUTPUT NORMALLY LOW
0.5V
R
2.5V
OUTPUT NORMALLY HIGH
0.5V
0V
t ZH
t HZ
1686/87 F08
Figure 8. Receiver Enable and Disable Times
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LTC1686/LTC1687
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EQUIVALE T I PUT NETWORKS
≥22k
A
≥22k
3.3V
A
≥22k
≥22k
B
B
3.3V
RE = 0 OR 1, VDD = 5V
VDD = 0V
1686/87 F09
Figure 9. Input Thevenin Equivalent
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APPLICATIONS INFORMATION
THEORY OF OPERATION
Unlike typical CMOS transceivers whose propagation
delay can vary by as much as 500% from package to
package and show significant temperature drift, the
LTC1686/LTC1687 employ a novel architecture that produces a tightly controlled and temperature compensated
propagation delay. The differential timing skew is also
minimized between rising and falling output edges of the
receiver output and the complementary driver outputs.
The precision timing features of the LTC1686/LTC1687
reduce overall system timing constraints by providing a
narrow ±3.5ns window during which valid data appears at
the receiver/driver output. The driver and receiver will
have propagation delays that typically match to within 1ns.
In clocked data systems, the low skew minimizes duty
cycle distortion of the clock signal. The LTC1686/LTC1687
can be used at data rates of 52Mbps with less than 5% duty
cycle distortion (depending on cable length). When a clock
signal is used to retime parallel data, the maximum recommended data transmission rate is 26Mbps to avoid timing
errors due to clock distortion.
FAIL-SAFE FEATURES
The LTC1686/LTC1687 have a fail-safe feature that guarantees the receiver output to be in a logic HIGH state when
the inputs are either shorted or left open (note that when
inputs are left open, large external leakage currents might
override the fail-safe circuitry). In order to maintain good
8
high frequency performance, it is necessary to slow down
the transient response of the fail-safe feature. When a line
fault is detected, the output will go HIGH typically in 2µs.
Note that the LTC1686/LTC1687 guarantee receiver failsafe performance over the entire (– 7V to 12V) common
mode range!
When the inputs are accidentally shorted (by cutting
through a cable, for example), the short circuit fail-safe
feature will guarantee a high output logic level. Note also
that if the line driver is removed and the ground terminated
resistors are left in place, the receiver will see this as a
“short” and output a logic HIGH. Both of these fail-safe
features will keep the receiver from outputting false data
pulses under line fault conditions.
Thermal shutdown and short-circuit protection prevent
latchup damage to the LTC1686/LTC1687 during fault
conditions.
OUTPUT SHORT-CIRCUIT PROTECTION
The LTC1686/LTC1687 employ voltage sensing shortcircuit protection at the output terminals of both the driver
and receiver. For a given input polarity, this circuitry
determines what the correct output level should be. If the
output level is different from the expected, it shuts off the
big output devices. For example, if the driver input is >2V,
it expects the “A” output to be >3.25V and the “B” output
to be <1.75V. If the “A” output is subsequently shorted to
a voltage below VDD/2, this circuitry shuts off the big
output devices and turns on a smaller device in its place
LTC1686/LTC1687
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APPLICATIONS INFORMATION
(the converse applies for the “B” output). The outputs then
appear as ±10mA current sources. Note that under normal
operation, the output drivers can sink/source >50mA. A
time-out period of about 50ns is used in order to maintain
normal high frequency operation, even under heavy capacitive loads.
should be pulsed low for at least 200ns after the short has
been removed. Since the LTC1686 driver is always
enabled, the LTC1686 should only be used with single
resistor termination, as shown in Figure 10.
If the cable is shorted at a large distance from the device
outputs, it is possible for the short to go unnoticed at the
driver outputs due to parasitic cable resistance. Additionally, when the cable is shorted, it no longer appears as a
simple transmission line impedance, and the parasitic L’s
and C’s might give rise to ringing and even oscillation. All
these conditions disappear once the device comes out of
short-circuit mode.
Data rates up to 52Mbps can be transmitted over 100 feet
of category 5 twisted pair. Figure 10 shows the LTC1687
receiving differential data from another LTC1687 transceiver. Figure 11a shows a 26MHz (52Mbps) square wave
propagated over 100 feet of category 5 UTP. Figure 11b
shows a more stringent case of propagating a 20ns pulse
over 100 feet of category 5 UTP. Figure 12 shows a 2MHz
(4Mbps) square wave propagated over 1000 feet of
category 5 unshielded twisted pair. Note that the LTC1686/
LTC1687 can still perform reliably at this distance and
speed. Very inexpensive unshielded telephone grade
twisted pair is shown in Figure 13. Despite the noticeable
loss at the receiver input, the LTC1686/LTC1687 can still
transfer at 30Mbps over 100 feet of telephone grade UTP.
Note that under all these conditions, the LTC1686/LTC1687
can pass through a single data pulse equal to the inverse
of the data rate (e.g., 20ns for 50Mbps data rate).
For cables with the typical RS485 termination (no DC bias
on the cable, such as Figure 10), the LTC1686/LTC1687
will automatically come out of short-circuit mode once the
physical short has been removed.
Cable Termination
The recommended cable termination for the LTC1686/
LTC1687 is a single resistor across the two wires at each
end of the twisted-pair line (see Figure 10). The LTC1687
can also be used with cable terminations with a DC bias
(such as Fast-20 and Fast-40 differential SCSI terminators). When using a biased termination with the LTC1687,
however, the DE pin must be held low for at least 200ns
after the part has been powered up. This ensures proper
start-up into the DC load of the biased termination. Furthermore, when the LTC1687 output is shorted, the DE pin
HIGH SPEED TWISTED-PAIR TRANSMISSION
TRANSMISSION OVER LONG DISTANCES
1Mbps Over 4000 Feet Category 5 UTP
The LTC1685/LTC1686/LTC1687 family of high speed
transceivers is capable of 1Mbps transmission over 4000
feet of category 5 UTP. High quality cable provides lower
DE
DE
4
9
D
5
DRIVER
100Ω
100Ω
10
LTC1687
RECEIVER
R
LTC1687
12
R
2
RECEIVER
3
100Ω
100Ω
11
DRIVER
D
CATEGORY 5 UTP
RE
RE
LTC1686/87 • F10
Figure 10
9
LTC1686/LTC1687
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APPLICATIONS INFORMATION
2V/DIV
DRIVER INPUT
2V/DIV
DIFFERENTIAL
RECEIVER
INPUT
2V/DIV
RECEIVER
OUTPUT
DRIVER
INPUT
2V/DIV
2V/DIV
RECEIVER
OUTPUT
10ns/DIV
20ns/DIV
1686/87 F13
1686/87 F11a
Figure 11a. 100 Feet of Category 5 UTP: 50Mbps
Figure 13. 100 Feet of Telephone Grade UTP: 30Mbps
DRIVER
INPUT
2V/DIV
2V/DIV
RECEIVER
INPUT
1V/DIV
RECEIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
5V/DIV
RECEIVER
OUTPUT
2V/DIV
CABLE DELAY
20ns/DIV
1µs/DIV
1685 F11b
1685 F14a
Figure 11b. 100 Feet of Category 5 UTP: 20ns Pulse
2V/DIV
DRIVER
INPUT
2V/DIV
RECEIVER
OUTPUT
Figure 14a. 4000 Feet of Category 5 UTP 1µs Pulse
2V/DIV
DRIVER
INPUT
5V/DIV
RECEIVER
OUTPUT
1µs/DIV
100ns/DIV
1685 F14b
1686/87 F12
Figure 12. 1000 Feet of Category 5 UTP: 4Mbps
DC and AC attenuation over long distances. Figure 14a
shows a 1µs pulse propagated down 4000 feet of category
5 UTP. Notice the significant attenuation at the receiver
input and the clean pulse at the receiver output. The DC
attenuation is due to the parasitic resistance of the cable.
Figure 14b shows a 1Mbps square wave over the same
4000 feet of cable.
10
DRIVER
INPUT
CABLE DELAY
Figure 14b. 4000 Feet of Category 5 UTP 1Mbps Square Wave
1.6Mbps Over 8000 Feet (1.5 Miles)
Category 5 UTP Using Repeaters
The LTC1686/LTC1687 can be used as repeaters to extend
the effective length of a high speed twisted-pair line. Figure
15a shows a three repeater configuration using 2000 feet
segments of category 5 UTP. Figure 15b shows the
LTC1686/LTC1687
U
U
W
U
APPLICATIONS INFORMATION
LTC1687
LTC1687
2000 FT
D1
2000 FT
LTC1687
R2
D
LTC1687
R3
2000 FT
D
R4
D
R5
REPEATER
REPEATER
REPEATER
2000 FT
LTC1687
R
1686/87 F15a
Figure 15a. 1.6Mbps, 8000 Feet (1.5 Miles) Using Three Repeaters
2V/DIV
DRIVER 1
INPUT
DELAY OF 8000 FT
OF CABLE
DRIVER 1
INPUT
2V/DIV
RECEIVER 2
INPUT
RECEIVER 3
INPUT
RECEIVER 4
INPUT
1V/DIV
5V/DIV
RECEIVER 5
OUTPUT
2V/DIV
DRIVER 1
INPUT
1V/DIV
1V/DIV
RECEIVER 5
OUTPUT
5V/DIV
RECEIVER 5
OUTPUT
5V/DIV
2µs/DIV
2µs/DIV
1686/87 F15b
1686/87 F16
Figure 15b. 1.6Mbps Pulse and Square Wave Signals
Over 8000 Feet Category 5 UTP Using Three Repeaters
Figure 16. Intermediate Signals of a 1µs Pulse
propagation of a 600ns pulse through the network of
Figure 15A. The bottom two traces show a 1.6Mbps
square wave. Notice that the duty cycle does not noticeably degrade. For the case of the single pulse, however,
there is a slight degradation of the pulse width.
goes above or below the rails. It is advisable to terminate
the PC traces when approaching maximum speeds. Since
the LTC1686/LTC1687 are not intended to drive parallel
terminated cables with characteristic impedances much
less than that of twisted pair, both ends of the PC trace
must be series terminated with the characteristic impedance of the trace. For best results, the signal should be
routed differentially. The true and complement outputs of
the LTC1686/LTC1687 should be routed on adjacent layers of the PC board. The two traces should be routed very
symmetrically, minimizing and equalizing parasitics to
nearby signal and power/ground layers. For single-ended
transmission, route the series terminated single-ended
trace over an adjacent ground plane. Then set the (bypassed) negative input of the receiver to roughly 2.5V.
Note that single-ended operation might not reach maximum speeds.
By slowing down the data rate slightly to 1Mbps, one can
obtain minimal pulse width degradation as the signal
traverses through the repeater network. Figure 16 shows
that the output pulse (bottom trace) is nearly the same
width to the input pulse (top trace). The middle three
traces of Figure 16 show the signal at the end of each of the
first three 2000 feet sections of category 5 UTP. Notice
how the LTC1687 repeaters are able to regenerate the
signal with little loss. This implies that we can cascade
more repeater networks and potentially achieve 1Mbps
operation at total distances of over 10,000 feet! A higher
data rate can be achieved if the repeaters are spaced closer
together.
LAYOUT CONSIDERATIONS
HIGH SPEED BACKPLANE TRANSMISSION
The LTC1686/LTC1687 can also be used in backplane
point-to-point transceiver applications, where the user
wants to assure operation even when the common mode
A ground plane is recommended when using high frequency devices like the LTC1686/LTC1687. A 0.1µF ceramic bypass capacitor less than 0.25 inch away from the
VDD pin is also recommended.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1686/LTC1687
U
U
W
U
APPLICATIONS INFORMATION
Long traces bounded by a VDD and/or GND planes can add
substantial parasitic capacitance. Parasitic capacitances
on the receiver/driver outputs can also unduly slow down
both the propagation delay and the rise/fall times.
U
PACKAGE DESCRIPTION
The receiver inputs are high bandwidth and high impedance. If they are left floating, any capacitive coupling from
any other signal can cause a glitch at the receiver output.
Thus, if the receiver is not being used, it is advisable to
always ground at least one of the two receiver input pins.
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
TYP
7
8
5
6
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
SO8 0996
1
3
2
4
S Package
14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 – 0.344*
(8.560 – 8.738)
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
14
13
12
11
10
9
8
0° – 8° TYP
0.050
(1.270)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157**
(3.810 – 3.988)
S14 0695
1
2
3
4
5
6
7
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC490
Low Power RS485 Full-Duplex Transceiver
ICC = 300µA (Typ), SO-8 Package
LTC491
Low Power RS485 Full-Duplex Transceiver
ICC = 300µA (Typ), 14-Lead SO Package
LTC1518
High Speed Quad RS485 Receiver
52Mbps, Pin Compatible with LTC488
LTC1519
High Speed Quad RS485 Receiver
52Mbps, Pin Compatible with LTC489
LTC1520
High Speed Quad Differential Receiver
52Mbps, ±100mV Threshold, Rail-to-Rail Common Mode
LTC1685
High Speed RS485 Transceiver
52Mbps, Pin Compatible with LTC485
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900
FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com
16867f LT/TP 1197 4K • PRINTED IN THE USA
 LINEAR TECHNOLOGY CORPORATION 1997