19-3172; Rev 0; 2/04 ±15kV ESD-Protected USB Transceiver in UCSP Features The MAX3346E bidirectional transceiver converts logiclevel signals to USB signals, and USB signals to logiclevel signals. The MAX3346E includes the 1.5kΩ USB pullup resistor internally, and supports both full-speed (12Mbps) and low-speed (1.5Mbps) USB operation. The device has built-in ±15kV ESD protection circuitry to guard the USB I/O pins, D+ and D-. The MAX3346E operates with VL voltages as low as 1.65V, ensuring compatibility with low-voltage ASICs. The device features a logic-selectable suspend mode that lowers current draw to less than 40µA. The MAX3346E has an enumerate function that allows devices to logically disconnect while plugged in. The MAX3346E is fully compliant with USB specification 1.1, and the full-speed and low-speed operation under USB specification 2.0. The MAX3346E is available in the miniature 4 x 4 chipscale package (UCSPTM), as well as the small 14-pin TSSOP, and is rated for the -40°C to +85°C extended temperature range. ♦ ±15kV ESD Protection on D+ and D♦ Internal Linear Regulator Allows Direct Powering from the USB Cable ♦ Internal 1.5kΩ Pullup Resistor for Low/Full-Speed Operation ♦ Supports Low-Speed and Full-Speed USB Communications ♦ Complies with USB Specification Revision 1.1 and 2.0 (Low Speed and Full Speed) ♦ Three-State Outputs ♦ Enumerate Input—Allows USB Connection through Software ♦ No Power-Supply Sequencing Required ♦ Operates with VL of 1.65V to 3.6V, Ensuring Compatibility with Low-Voltage ASICs ♦ Available in Miniature Chip-Scale Package Applications Ordering Information Cell Phones PART TEMP RANGE PIN-PACKAGE PC Peripherals MAX3346EEUD -40°C to +85°C 14 TSSOP Data Cradles MAX3346EEBE-T -40°C to +85°C 4 x 4 UCSP PDAs MP3 Players UCSP is trademark of Maxim Integrated Products, Inc. Pin Configurations BOTTOM VIEW TOP VIEW RCV 1 14 VL VP 2 13 VTRM MODE 3 12 D+ VM 4 1 MAX3346E OE 5 3 4 MAX3346E D VP RCV VL VTRM VM MODE D+ OE SUSP D- ENUM SPEED C 11 D10 GND ENUM 6 9 VCC SUSP 7 8 SPEED TSSOP 2 B A VCC GND UCSP ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX3346E General Description MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) Supply Voltage (VCC) ...............................................-0.3V to +6V Output of Internal Regulator (VTRM) ..........-0.3V to (VCC + 0.3V) Input Voltage (D+, D-) ..............................................-0.3V to +6V System Supply Voltage (VL) .....................................-0.3V to +6V RCV, SUSP, VM, VP, MODE, OE, SPEED, ENUM ....................................-0.3V to (VL + 0.3V) Short-Circuit Current (D+, D-) to VCC or GND (Note 1) ..........................................Continuous Maximum Continuous Current (all other pins) ..................±15mA Continuous Power Dissipation (TA = +70°C) 4 x 4 UCSP (derate 7.4mW/°C above +70°C).....589mW [B16-2] 14-Pin TSSOP (derate 9.1mW/°C above +70°C) ..727mW [U14-1] Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Bump Temperature (soldering) Reflow............................+235°C Note 1: External 23.7Ω resistors connected to D+ and D-. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to +3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 2) PARAMETER SYMBOL SUPPLY INPUTS (VCC, VTRM, VL) Regulated Supply Voltage VVTRM CONDITIONS Internal regulator VL Input Range VCC Input Range Operating VCC Supply Current Operating VL Supply Current IVCC IVL MIN TYP 3.0 3.3 MAX UNITS 3.6 V 1.65 3.60 V 4.0 5.5 V 8 mA 6 mA Full-speed transmitting/receiving at 12Mbps, CL = 50pF on D+ and DFull-speed transmitting/receiving at 12Mbps Full-speed idle: VD+ > 2.7V, VD- < 0.3V 340 450 SE0: VD+ < 0.3V, VD- < 0.3V 390 500 Full-Speed Idle and SE0 Supply Current IVCC(IDLE) Static VL Supply Current IVL(STATIC) Full-speed idle, SE0, or suspend mode 5 µA Suspend Supply Current IVCC(SUSP) SUSP = OE = high 40 µA IVCC(DIS) VL = GND or open 20 µA VL = GND or open, VD_ = 0 or +5.5V 5 µA VCC = GND or open, OE = low, SUSP = high 20 µA 20 µA Disable-Mode Supply Current D+/D- Disable-Mode Load Current ID_(DIS) Sharing-Mode VL Supply Current IVL(SHARING) D+/D- Sharing-Mode Load Current ID_(SHARING) VCC = GND or open, VD_ = 0 or +5.5V µA LINEAR REGULATOR External Capacitor 2 COUT Compensation of linear regulator 1 _______________________________________________________________________________________ µF ±15kV ESD-Protected USB Transceiver in UCSP (VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to +3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ESD PROTECTION (D+, D-) Human Body Model ±15 kV IEC 1000-4-2 Air-Gap Discharge ±10 kV IEC 1000-4-2 Contact Discharge ±8 kV LOGIC-SIDE I/O VIH VP, VM, SUSP, SPEED, OE, MODE, ENUM Input Low Voltage VIL VP, VM, SUSP, SPEED, OE, MODE, ENUM Output High Voltage VOH ISOURCE = +2mA, RCV, VP, VM Output Low Voltage VOL ISINK = -2mA, RCV, VP, VM 0.4 V VP, VM, SUSP, ENUM, OE, MODE = 0 or VL ±1 µA 0.3 V 3.6 V Input High Voltage Input Leakage Current (2/3) x VL V 0.4 VL - 0.4 V V USB-SIDE I/O Output-Voltage Low VOLD RL = 1.5kΩ from D+ or D- to 3.6V Output-Voltage High VOHD RL = 15kΩ from D+ and D- to GND Input Impedance ZIN Single-Ended Input-Voltage High VIH Single-Ended Input-Voltage Low VIL VD_ = 0 or +3.6V, ENUM = 0, three-state driver 2.8 1 2.0 Internal Resistor Input Common-Mode Voltage V 0.8 D+, D- Receiver Hysteresis Driver Output Impedance MΩ 200 ROUT 4.6 RPULLUP 1.410 1.5 0.8 Differential Input Sensitivity V mV 16.0 Ω 1.540 kΩ 2.5 200 V mV TIMING CHARACTERISTICS (VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to +3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SPEED INDEPENDENT TIMING CHARACTERISTICS OE to VP/VM Three-State Delay Disable Time tPVZ Figures 1a and 4a 20 ns OE to VP/VM Delay Enable Time tPZV Figures 1a and 4a 25 ns D+/D- to RCV Propagation Delay tPLH CL = 25pF, Figures 4b and 5 18 ns D+/D- to RCV Propagation Delay tPHL CL = 25pF, Figures 4b and 5 18 ns _______________________________________________________________________________________ 3 MAX3346E ELECTRICAL CHARACTERISTICS (continued) MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP TIMING CHARACTERISTICS (continued) (VCC = +4V to +5.5V, GND = 0, VTRM = +3.0V to 3.6V, VL = +1.65V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V, VL = +2.5V, TA = +25°C.) (Note 2) PARAMETER D+/D- to VP/VM Propagation Delay SYMBOL CONDITIONS MIN TYP MAX tPLH CL = 25pF, Figures 4b and 5 18 tPHL CL = 25pF, Figures 4b and 5 18 UNITS ns FULL-SPEED TIMING CHARACTERISTICS OE to Transmit Delay Enable Time tPZD (Figures 1b, 4d) 20 ns OE to Driver Three-State Delay Disable Time tPDZ (Figures1b, 4d) 20 ns VP/VM to D+/D- Propagation Delay (MODE = 1) VP to D+/D- Propagation Delay (MODE = 0) tPLH (Figures 3, 4c) 18 tPHL (Figures 3, 4c) 18 tPHL0 CL = 50pF (Figures 2, 4c) 20 tPLH0 CL = 50pF (Figures 2, 4c) 20 ns ns D+, D- Rise Time tR CL = 50pF, 10% to 90% of |VOH - VOL| 4 20 ns D+, D- Fall Time tF CL = 50pF, 90% to 10% of |VOH - VOL| 4 20 ns Rise- and Fall-Time Matching (Note 3) tR/tF CL = 50pF 90 110 % Output-Signal Crossover Voltage (Note 3) VCRS CL = 50pF 1.3 2.0 V LOW-SPEED TIMING CHARACTERISTICS VP/VM to D+/D- Propagation Delay (MODE = 1) tPLH Figures 3 and 4c, CL = 50pF to 600pF 30 250 tPHL Figures 3 and 4c, CL = 50pF to 600pF 30 250 VP to D+/D- Propagation Delay (MODE = 0) tPHL0 Figures 2 and 4c, CL = 50pF to 600pF 30 250 tPLH0 Figures 2 and 4c, CL = 50pF to 600pF 30 250 ns ns D+/D- Rise Time tR CL = 50pF to 600pF 75 300 ns D+/D- Fall Time tF CL = 50pF to 600pF 75 300 ns Rise- and Fall-Time Matching tR/tF CL = 50pF to 600pF 80 125 % Output-Signal Crossover Voltage VCRS CL = 50pF to 600pF 1.3 2.0 V Note 2: Parameters are 100% production tested at +25°C, limits over temperature are guaranteed by design. Note 3: Guaranteed by design, not production tested. 4 _______________________________________________________________________________________ ±15kV ESD-Protected USB Transceiver in UCSP 12 11 TA = +25°C 10 9 TA = +85°C 14 TA = -40°C 8 1.8 13 1.6 12 1.4 TA = +25°C 11 1.0 9 0.8 TA = -40°C 2.1 2.4 2.7 3.0 3.3 3.6 TA = +85°C 0.4 4.00 4.25 VL (V) 4.50 4.75 5.00 5.25 4.00 5.50 4.25 4.50 4.75 5.00 5.25 5.50 VCC (V) VCC (V) SKEW VS. VCC (MODE 0, LOW SPEED) OE, VP, VM TIMING MAX3346E toc05 1.0 MAX3346E toc04 0.9 0.8 0.7 A TA = +85°C 0.6 0 TA = +25°C 0.5 B 0.4 0 0.3 TA = -40°C 0.2 C 0 0.1 (FIGURE 4a) 0 4.00 4.25 4.50 4.75 5.00 5.25 200ns/div 5.50 VCC (V) A: VP, 2V/div B: VM, 2V/div C: OE, 5V/div VTRM vs. VCC OE, VP, VM TIMING MAX3346E toc06 MAX3346E toc07 3.5 3.4 A 0 VTRM (V) 1.8 TA = +25°C 0.6 7 1.5 TA = -40°C 1.2 10 8 7 2.0 SKEW (ns) 13 SKEW (ns) PROPAGATION DELAY (ns) 14 15 MAX3346E toc02 TA = +85°C PROPAGATION DELAY (ns) MAX3346E toc01 15 SKEW vs. VCC (MODE 0, FULL SPEED) SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VCC MAX3346E toc03 SINGLE-ENDED RECEIVER PROPAGATION DELAY vs. VL B 0 C 3.3 3.2 3.1 0 (FIGURE 4a) 200ns/div A: VP, 2V/div B: VM, 2V/div C: OE, 5V/div IVTRM = 15mA 3.0 4.00 4.25 4.50 4.75 5.00 5.25 5.50 VCC (V) _______________________________________________________________________________________ 5 MAX3346E Typical Operating Characteristics (VCC = +5V, VL =+3.3V, TA = +25°C, unless otherwise noted.) MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP Typical Operating Characteristics (continued) (VCC = +5V, VL = +3.3V, TA = +25°C, unless otherwise noted.) RISE- AND FALL-TIME MATCHING (LOW SPEED) SUSPEND RESPONSE RISE- AND FALL-TIME MATCHING (FULL SPEED) MAX3346E toc09 MAX3346E toc08 MAX3346E toc10 f = 750kHz f = 6MHz A 0 D+ D+ D- D- 0 B 0 0 100ns/div 100ns/div 20ns/div A: SUSP, 2V/div B: RCV, 2V/div Pin Description PIN 6 NAME INPUT/ OUTPUT D2 RCV Output Receiver Output. Single-ended CMOS output. RCV responds to the differential input on D+ and D- (see Table 3). D1 VP Input/ Output System-Side Data Input/Output. Drive OE high to make VP a receiver output. Drive OE low to make VP a driver input (see Table 3). TSSOP UCSP 1 2 FUNCTION Mode Control Input. Selects single-ended (mode zero) or differential (mode one) input for the system side when converting logic-level signals to USB-level signals. If MODE is forced high, mode one is selected. If MODE is forced low, mode zero is selected (see Table 3). 3 C2 MODE Input 4 C1 VM Input/ Output 5 B1 OE Input Output Enable. Drive OE high to enable the receiver. Drive OE low to enable the driver input. 6 A1 ENUM Input Enumerate Input. Drive ENUM low to disconnect the internal 1.5kΩ resistor, and enumerate the USB. With ENUM high, the internal 1.5kΩ resistor is connected to either D+ or D-, depending on the state of SPEED. System-Side Data Input/Output. Drive OE high to make VM a receiver output. Drive OE low to make VM a driver input (see Table 3). _______________________________________________________________________________________ ±15kV ESD-Protected USB Transceiver in UCSP PIN TSSOP UCSP 7 B2 NAME INPUT/ OUTPUT SUSP Input Suspend Input. Drive SUSP low for normal operation. Force SUSP high for lowpower state. In low-power state RCV is low, D+/D- are high impedance if OE is floating, and VP/VM are active outputs. FUNCTION 8 A2 SPEED Input USB Transmission Speed Select Input. If SPEED is forced high, full speed (12Mbps) is selected and the internal 1.5kΩ pullup resistor is connected to D+. If SPEED is forced low, low speed (1.5Mbps) is selected and the internal 1.5kΩ pullup resistor is connected to D-. 9 A3 VCC Power USB-Side Power-Supply Input. Connect VCC to the incoming USB power supply. Bypass VCC to GND with a 1µF ceramic capacitor. 10 A4 GND Power Ground USB Differential Data Input/Output. Connect to the USB’s D- signal through a 24.3Ω ±1% resistor. 11 B4 D- Input/ Output 12 C4 D+ Input/ Output USB Differential Data Input/Output. Connect to the USB’s D+ signal through a 24.3Ω ±1% resistor. 13 D4 VTRM Power Regulated Output Voltage. 3.3V output derived from the VCC input. Bypass VTRM to GND with a 1µF (or more) low-ESR capacitor, such as ceramic or plastic film types. 14 D3 VL Power System-Side Power-Supply Input. Connect to the system’s logic-level power supply, 1.65V to 3.6V. Bypass to GND with a 0.1µF capacitor. — B3, C3 — — Not populated. The solder sphere is omitted from these locations (see the Package Information). Detailed Description The MAX3346E is a bidirectional transceiver that converts single-ended or differential logic-level signals to differential USB signals, and converts differential USB signals to single-ended or differential logic-level signals. The MAX3346E includes an internal 1.5kΩ pullup resistor that can be connected to either D+ or D- for full-speed or low-speed operation (see the Functional Diagram). The MAX3346E can be energized without concern about power-supply sequencing. Additionally, the USB I/O, D+ and D-, are ESD protected to ±15kV. The MAX3346E can get its USB-side power, V CC , directly from the USB connection, and can operate with system-side power, VL, down to 1.65V and still meet the USB physical layer specifications. The MAX3346E supports both full-speed (12Mbps) and low-speed (1.5Mbps), USB specification 1.1 operation. The MAX3346E has an enumerate feature that works when power is on. Driving ENUM low disconnects the internal 1.5kΩ pullup resistor from both D+ and D-, reenumerating the USB. This is useful if changes in communication protocol are required while power is applied, and while the USB cable is connected. _______________________________________________________________________________________ 7 MAX3346E Pin Description (continued) MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP Device Control OE Applications Information Power-Supply Configurations Normal Operating Mode Connect VL and VCC to system power supplies (Table 1). Connect VL to a +1.65V to +3.6V supply. Connect V CC to a +4.0V to +5.5V supply. Alternatively, the MAX3346E can derive power from a single Li+ battery. Connect the battery to V CC . VTRM remains above +3.0V for VCC as low as +3.1V. Additionally, the MAX3346E can derive power from a 3.3V ±10% voltage regulator. Connect VCC and VTRM to an external +3.3V voltage regulator. Disable Mode Connect VCC to a system power supply and leave VL unconnected or connect to GND. D+ and D- enter a tristate mode and VCC consumes less than 20µA of supply current. D+ and D- withstand external signals up to +5.5V in disable mode (Table 2). Sharing Mode Connect VL to a system power supply and leave VCC (or VCC and VVTRM) unconnected or connect to GND. D+ and D- enter a tri-state mode, allowing other circuitry to share the USB D+ and D- lines, and VL consumes less than 20µA of supply current. D+ and D- withstand external signals up to +5.5V in sharing mode (Table 2). OE controls the direction of communication through the device. With OE low, the MAX3346E transfers data from the system side to the USB side. With OE high, the MAX3346E transfers data from the USB side to the system side. ENUM The MAX3346E allows software control of USB enumeration. USB specification 1.1 requires a 1.5kΩ pullup resistor to D+ or D- to set the transmission speed (see the SPEED section). Enumerating the USB requires removing the 1.5kΩ resistor from the circuit, and is accomplished with the MAX3346E by driving ENUM low. With ENUM high, the voltage at SPEED determines how the internal resistor is connected (see the Functional Diagram). MODE MODE is a control input that selects whether differential or single-ended logic signals are recognized by the system side of the MAX3346E (Table 3). If MODE is forced high, differential input is selected. With differential input selected, outputs D+ and D- follow the differential inputs at VP and VM. If VP and VM are both forced low, an SE0 condition is forced on the USB. Drive MODE and VM low for single-ended input mode. With single-ended input selected, the differential signal on D+ and D- is controlled by VP. If VM is high when MODE is low, D- and D+ are both low, forcing an SE0 condition. Table 1. Power-Supply Configurations VCC (V) VTRM (V) VL (V) +4.0 to +5.5 +3.3 Output +1.65 to +3.6 Normal mode CONFIGURATION NOTES — +3.1 to +4.5 +3.3 Output +1.65 to +3.6 Battery supply — +3.0 to +3.6 +3.0 to +3.6 Input +1.65 to +3.6 Voltage regulator supply GND or floating Output +1.65 to +3.6 Sharing mode Table 2 — +3.0 to +5.5 Output GND or floating Disable mode Table 2 Table 2. Disable-Mode and Sharing-Mode Configurations INPUTS/OUTPUTS DISABLE MODE SHARING MODE VCC/VTRM • +5V input/+3.3V output • +3.3V input/+3.3V output • +3.7V input/+3.3V output Floating or connected to GND VL Floating or connected to GND +1.65V to +3.6V input D+ and D- High impedance High impedance SPEED, SUSP, OE, ENUM High impedance High impedance 8 _______________________________________________________________________________________ ±15kV ESD-Protected USB Transceiver in UCSP VL VL VL/2 OE VL/2 VPO 0V 0V tPHLO tPLHO tPZV tPVZ VTRM D+ 0V D- VOH - 0.3V VP/VM VOL + 0.3V Figure 2. Mode 0 Timing Figure 1a. Enable and Disable Timing, Receiver VP VL VL OE VL/2 VL/2 0V 0V tPZD tPDZ tPHL1 VOHD - 0.3V D+/D- VL/2 VL/2 VM 0V VOLD + 0.3V Figure 1b. Enable and Disable Timing, Transmitter SUSP SUSP, or suspend, is a control input. When SUSP is forced high the MAX3346E enters a low-power state. In this state, the quiescent supply current into VCC is less than 40µA. In this mode, RCV is forced low, and D+ and D- are high-impedance inputs (Table 3d). In suspend mode, data can only be transmitted with full-speed slope control. SPEED SPEED is a control input that selects between low-speed (1.5Mbps) and full-speed (12Mbps) USB transmission. Internally, it selects whether the 1.5kΩ pullup resistor is connected to D+ (full-speed) or D- (low-speed) (Functional Diagram). Force SPEED high to select full speed, or force SPEED low to select low speed. VTRM VTRM is the 3.3V output of the internal linear voltage regulator. The regulator is used to power the internal portions of the USB side of the MAX3346E. The VTRM tPLH1 VL tPLH1 tPHL1 VTRM D+ 0V D- Figure 3. Mode 1 Timing regulator’s supply input is VCC. Connect a 1.0µF (or greater) ceramic or plastic capacitor from VTRM to GND, as close to VTRM as possible. Do not use VTRM to provide power to external circuitry. D+ and DD+ and D- are the transceiver I/O connections, and are ESD protected to ±15kV using the Human Body Model, making the MAX3346E ideal for applications where a robust transmitter is required. VCC Bypass VCC to GND with a 1µF capacitor. Place the 1µF capacitor as close as possible to the MAX3346E. _______________________________________________________________________________________ 9 MAX3346E Timing Diagrams MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP TEST POINT MAX3346E MAX3346E TEST POINT 200Ω VM or VP or RCV VP or VM + 25pF - GND or VCC (b) LOAD FOR VP, VM AND RCV. (a) LOAD FOR ENABLE AND DISABLE TIME, VP/VM. MAX3346E 3.3V D+ or D- 25pF TEST POINT 23.7Ω MAX3346E TEST POINT 200Ω 23.7Ω D+ or D- 1.5kΩ CL 15kΩ (c) LOAD FOR D+/D-. + 50pF - (d) LOAD FOR ENABLE AND DISABLE TIME, D+/D-. Figure 4. Test Circuits D+ 3V D- 0V tPHL tPLH VL RCV VL/2 0V tPHL tPLH VL VP VL/2 0V tPLH VM tPHL VL VL/2 0V D+/D- RISE/FALL TIMES ≤ 8ns, VL = 1.65V, 2.5V, 3.3V Figure 5. D+/D- to RCV, VP, VM Propagation Delays 10 ______________________________________________________________________________________ GND or VCC ±15kV ESD-Protected USB Transceiver in UCSP MAX3346E Table 3a. Truth Table, Transmit (MODE = 0) OE = 0 (TRANSMIT) INPUT OUTPUT RESULT VP VM D+ D- RCV 0 0 0 1 0 0 1 0 0 RCV* SE0 1 0 1 0 1 Logic 1 1 1 0 0 X SE0 Logic 0 *RCV denotes the signal level on output RCV just before SE0 state occurs. This level is stable during the SE0 period. Table 3b. Truth Table, Transmit (MODE = 1) OE = 0 (TRANSMIT) INPUT OUTPUT RESULT VP VM D+ D- RCV 0 0 0 0 RCV* SE0 0 1 0 1 0 Logic 0 1 0 1 0 1 Logic 1 1 1 1 1 X Undefined *RCV denotes the signal level on output RCV just before SE0 state occurs. This level is stable during the SE0 period. Table 3c. Truth Table, Receive OE = 1 (RECEIVE) INPUT OUTPUT RESULT D+ D- VP VM RCV 0 0 0 0 RCV* SE0 0 1 0 1 0 Logic 0 1 0 1 0 1 Logic 1 1 1 1 1 X Undefined *RCV denotes the signal level on output RCV just before SE0 state occurs. This level is stable during the SE0 period. Table 3d. Function Select SUSP ENUMERATE OE D+/D- RCV VP/VM 0 0 0 Driving Active High-Z Normal driving 0 0 1 High-Z Active Active Normal receiving, RPULLUP disconnected 0 1 0 Driving Active High-Z Normal driving 0 1 1 High-Z Active Active Normal receiving, RPULLUP connected 1 0 0 or 1 High-Z 0 Active Suspend mode, RPULLUP disconnected 1 1 0 or 1 High-Z 0 Active Suspend mode, RPULLUP connected FUNCTION ______________________________________________________________________________________ 11 MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP External Components External Resistors Two external resistors are required for USB connection, each of them from 23.7Ω ±1% to 27.4Ω ±1%, 1/2W (or greater). Place one resistor in series between D+ of the MAX3346E and D+ of the USB connector. Place the other resistor in series between D- of the MAX3346E and D- of the USB connector. The Typical Operating Circuit shows these connections. External Capacitors Four external capacitors are recommended for proper operation. Use a 0.1µF ceramic for decoupling VL, a 1µF ceramic capacitor for decoupling VCC, and a 1.0µF (or greater) ceramic or plastic filter capacitor on VTRM. Return all capacitors to GND. Receiving Data from the USB Data received from the USB are output to VP/VM and RCV in either of two ways, differentially or single ended. To receive data from the USB, force OE high, and force SUSP low. Differential data arriving at D+/D- appears as differential logic signals at VP/VM, and as a singleended logic signal at RCV. If both D+ and D- are low, then VP and VM are low, signaling an SE0 condition on the bus; RCV retains the last state before SE0 (see Table 3). Transmitting Data to the USB The MAX3346E outputs data to the USB differentially on D+ and D-. The logic driving the signals may be either differential or single ended. For sending differential logic, force MODE high, force OE and SUSP low, and apply data to VP and VM. If sending single-ended logic, force MODE, SUSP, OE, and VM low, and apply data to VP. With VP low, D+ is low and D- high, resulting in a logic 0 state. With VP high, D+ is high and Dlow, resulting in a logic 1 state (see Table 3). ESD protection To protect the MAX3346E against ESD, D+ and D- have extra protection against static electricity to protect the device up to ±15kV. The ESD structures withstand high ESD in all states; normal operation, suspend, and powered down. For the 15kV ESD structures to work correctly, a 1µF or greater capacitor must be connected from VTRM to GND. ESD protection can be tested in various ways; the D+ and D- input/output pins are characterized for protection to the following limits: 1) ±15kV using the Human Body Model. 2) ±8kV using the Contact Discharge method specified in IEC 1000-4-2. 3) ±10kV using the IEC 1000-4-2 Air-Gap method. ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Human Body Model Figure 6a shows the Human Body Model, and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor. RC 1MΩ CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 100pF RD 1500Ω DISCHARGE RESISTANCE DEVICE UNDER TEST STORAGE CAPACITOR Figure 6a. Human Body ESD Test Models IP 100% 90% Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) AMPERES 36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM Figure 6b. Human Body Model Current Waveform 12 ______________________________________________________________________________________ ±15kV ESD-Protected USB Transceiver in UCSP The Air-Gap Discharge test involves approaching the device with a charged probe. The Contact Discharge method connects the probe to the device before the probe is energized. Machine Model The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protection during manufacturing, not just USB inputs and outputs. Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports. 13 RC 50MΩ to 100MΩ CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE Cs 150pF RD 330Ω DISCHARGE RESISTANCE STORAGE CAPACITOR DEVICE UNDER TEST Figure 7a. IEC 1000-4-2 ESD Test Model UCSP Applications Information For the latest application details on UCSP construction, dimensions, tape carrier information, printed circuit board techniques, bump-pad layout, and recommended reflow temperature profile as well as the latest information on reliability testing results, go to the Maxim website at www.maxim-ic.com/ucsp for the Application Note, “UCSP—A Wafer-Level Chip-Scale Package.” ___________________________________________________________________________________________________ ______________________________________________________________________________________ 13 MAX3346E IEC 1000-4-2 The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX3346E helps to design equipment that meets Level 2 of IEC 1000-42, without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC 1000-4-2 is a higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 7a shows the IEC 1000-4-2 model. ±15kV ESD-Protected USB Transceiver in UCSP MAX3346E Typical Operating Circuit SYSTEM POWER 1.0µF CERAMIC 0.1µF CERAMIC ASIC USB CABLE PC VCC USB POWER 23.7Ω ±1% VL D+ VP MAX3346E D+ 23.7Ω ±1% VM D- RCV D- ENUM GND OE SUSP GND 15kΩ SPEED MODE VTRM 1.0µF CERAMIC 14 ______________________________________________________________________________________ 15kΩ ±15kV ESD-Protected USB Transceiver in UCSP VCC LINEAR REGULATOR MAX3346E VTRM VL 1.5kΩ SPEED INTERNAL POWER OE D+ ENUM MODE DSUSP LEVEL SHIFTER AND CONTROL LOGIC RCV VP VM GND Chip Information TRANSISTOR COUNT: 2162 PROCESS: BiCMOS ______________________________________________________________________________________ 15 MAX3346E Functional Diagram Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) TSSOP4.40mm.EPS MAX3346E ±15kV ESD-Protected USB Transceiver in UCSP 16 ______________________________________________________________________________________ ±15kV ESD-Protected USB Transceiver in UCSP 16L,UCSP.EPS PACKAGE OUTLINE, 4x4 UCSP 21-0101 H 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX3346E Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)