a Four-Channel, Four-Quadrant Analog Multiplier MLT04 FEATURES Four Independent Channels Voltage IN, Voltage OUT No External Parts Required 8 MHz Bandwidth Four-Quadrant Multiplication Voltage Output; W = (X × Y)/2.5 V 0.2% Typical Linearity Error on X or Y Inputs Excellent Temperature Stability: 0.005% ±2.5 V Analog Input Range Operates from ±5 V Supplies Low Power Dissipation: 150 mW typ Spice Model Available FUNCTIONAL BLOCK DIAGRAM 18-Lead Epoxy DIP (P Suffix) 18-Lead Wide Body SOIC (S Suffix) APPLICATIONS Geometry Correction in High-Resolution CRT Displays Waveform Modulation & Generation Voltage Controlled Amplifiers Automatic Gain Control Modulation and Demodulation W2 1 18 2 17 GND4 X1 3 16 X4 15 Y4 4 Y1 V GENERAL DESCRIPTION The MLT04 is a complete, four-channel, voltage output analog multiplier packaged in an 18-pin DIP or SOIC-18. These complete multipliers are ideal for general purpose applications such as voltage controlled amplifiers, variable active filters, “zipper” noise free audio level adjustment, and automatic gain control. Other applications include cost-effective multiple-channel power calculations (I × V), polynomial correction generation, and low frequency modulation. The MLT04 multiplier is ideally suited for generating complex, high-order waveforms especially suitable for geometry correction in high-resolution CRT display systems. W4 W1 GND1 5 CC MLT-04 917 8 7 6 5 4 3 2 1 10 11 12 13 14 15 16 8 MLT04 14 V EE 13 Y2 6 X2 7 12 X3 GND2 8 11 GND3 9 10 W3 W = (X Y3 • Y)/2.5V Fabricated in a complementary bipolar process, the MLT04 includes four 4-quadrant multiplying cells which have been lasertrimmed for accuracy. A precision internal bandgap reference normalizes signal computation to a 0.4 scale factor. Drift over temperature is under 0.005%/°C. Spot noise voltage of 0.3 µV/√Hz results in a THD + Noise performance of 0.02% (LPF = 22 kHz) for the lower distortion Y channel. The four 8 MHz channels consume a total of 150 mW of quiescent power. The MLT04 is available in 18-pin plastic DIP, and SOIC-18 surface mount packages. All parts are offered in the extended industrial temperature range (–40°C to +85°C). 100 40 V CC = +5V Av (X OR Y) 8.9MHz –3dB 0 Ø (X OR Y) –20 –90 X & Y MEASUREMENTS SUPERIMPOSED: X = 100mV RMS, Y = 2.5V DC Y = 100mV RMS, X = 2.5V DC THD + NOISE – % 90 0 –40 VCC = +5V V = –5V 10 Ø – Phase Degrees Av GAIN – dB 20 V EE = –5V T A = +25°C EE TA = +25°C 1 LPF = 500kHz THDX: X = 2.5VP, Y = +2.5V DC 0.1 THDY: Y = 2.5VP, X = +2.5V DC 0.01 1k 10k 100k 1M FREQUENCY – Hz 10M 100M Figure 1. Gain & Phase vs. Frequency Response 10 100 1k 10k FREQUENCY – Hz 100k 1M Figure 2. THD + Noise vs. Frequency REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 MLT04–SPECIFICATIONS (V CC = +5 V, VEE = –5 V, VIN = ±2.5 VP, RL = 2 kΩ, TA = +25°C unless otherwise noted.) Parameter Symbol Conditions Min Typ Max Units MULTIPLIER PERFORMANCE 1 Total Error2 X Total Error2 Y Linearity Error2 X Linearity Error2 Y Total Error Drift Total Error Drift Scale Factor3 Output Offset Voltage Output Offset Drift Offset Voltage, X Offset Voltage, Y EX EY LEX LEY TCEX TCEY K ZOS TCZOS XOS YOS –2.5 V < X < +2.5 V, Y = +2.5 V –2.5 V < Y < +2.5 V, X = +2.5 V –2.5 V < X < +2.5 V, Y = +2.5 V –2.5 V < Y < +2.5 V, X = +2.5 V X = –2.5 V, Y = 2.5 V, TA = –40°C to +85°C Y = –2.5 V, X = 2.5 V, TA = –40°C to +85°C X = ± 2.5 V, Y = ± 2.5 V, TA = –40°C to +85°C X = 0 V, Y = 0 V, TA= –40°C to +85°C X = 0 V, Y = 0 V, TA= –40°C to +85°C X = 0 V, Y = ± 2.5 V, TA = –40°C to +85°C Y = 0 V, X = ± 2.5 V, TA = –40°C to +85°C –5 –5 –1 –1 ±2 ±2 ± 0.2 ± 0.2 0.005 0.005 0.40 ± 10 50 ± 10.5 ± 10.5 5 5 +1 +1 % FS % FS % FS % FS %/°C %/°C 1/V mV µV/°C mV mV DYNAMIC PERFORMANCE Small Signal Bandwidth Slew Rate Settling Time AC Feedthrough Crosstalk @ 100 kHz BW SR tS FTAC CTAC VOUT = 0.1 V rms VOUT = ± 2.5 V VOUT = ∆2.5 V to 1% Error Band X = 0 V, Y = 1 V rms @ f = 100 kHz X = Y = 1 V rms Applied to Adjacent Channel EN EN eN THDX THDY ROUT VPK ISC f = 10 Hz to 50 kHz Noise BW = 1.9 MHz f = 1 kHz f = 1 kHz, LPF = 22 kHz, Y = 2.5 V f = 1 kHz, LPF = 22 kHz, X = 2.5 V VCC = +5 V, VEE = –5 V ± 3.0 INPUTS Analog Input Range Bias Current Resistance Capacitance IVR IB RIN CIN GND = 0 V X=Y=0V –2.5 SQUARE PERFORMANCE Total Square Error ESQ X=Y=1 5 POWER SUPPLIES Positive Current Negative Current Power Dissipation Supply Sensitivity Supply Voltage Range ICC IEE PDISS PSSR VRANGE VCC = 5.25 V, VEE = –5.25 V VCC = 5.25 V, VEE = –5.25 V Calculated = 5 V × ICC + 5 V × IEE X = Y = 0 V, VCC = ∆5% or VEE = ∆5% For VCC & VEE 15 15 150 OUTPUTS Audio Band Noise Wide Band Noise Spot Noise Voltage Total Harmonic Distortion Open Loop Output Resistance Voltage Swing Short Circuit Current 0.38 –50 –50 –50 30 50 50 8 53 1 –65 –90 MHz V/µs µs dB dB 76 380 0.3 0.1 0.02 40 ± 3.3 30 µV rms µV rms µV/√Hz % % Ω VP mA 2.3 1 3 ± 4.75 0.42 50 +2.5 10 V µA MΩ pF % FS 20 20 200 10 ± 5.25 mA mA mW mV/V V NOTES 1 Specifications apply to all four multipliers. 2 Error is measured as a percent of the ± 2.5 V full scale, i.e., 1% FS = 25 mV. 3 Scale Factor K is an internally set constant in the multiplier transfer equation W = K × X × Y. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS* Supply Voltages VCC, VEE to GND Inputs XI, YI Outputs WI Operating Temperature Range Maximum Junction Temperature (T J max) Storage Temperature Lead Temperature (Soldering, 10 sec) Package Power Dissipation Thermal Resistance θJA PDIP-18 (N-18) SOIC-18 (SOL-18) ORDERING INFORMATION* ±7 V VCC, VEE VCC, VEE –40°C to +85°C +150°C –65°C to +150°C +300°C (TJ max–TA)/θJA Model Temperature Range Package Description Package Option MLT04GP MLT04GS MLT04GS-REEL MLT04GBC –40°C to +85°C –40°C to +85°C –40°C to +85°C +25°C 18-Pin P-DIP N-18 18-Lead SOIC SOL-18 18-Lead SOIC SOL-18 Die *For die specifications contact your local Analog sales office. The MLT04 contains 211 transistors. 74°C/W 89°C/W *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification are not implied. –2– REV. B MLT04 FUNCTIONAL DESCRIPTION The MLT04 is a low cost quad, 4-quadrant analog multiplier with single-ended voltage inputs and voltage outputs. The functional block diagram for each of the multipliers is illustrated in Figure 3. Due to packaging constraints, access to internal nodes for externally adjusting scale factor, output offset voltage, or additional summing signals is not provided. ANALOG MULTIPLIER ERROR SOURCES Multiplier errors consist primarily of input and output offsets, scale factor errors, and nonlinearity in the multiplying core. An expression for the output of a real analog multiplier is given by: V O = ( K + ∆K ){(VX + X OS )(V Y + Y OS ) + ZOS + f ( X , Y )} where: K ∆K VX XOS VY YOS ZOS ƒ(X, Y) +VS MLT04 X1, X2, X3, X4 0.4 G1, G2, G3, G4 W1, W2, W3, W4 = = = = = = = = Multiplier Scale Factor Scale Factor Error X-Input Signal X-Input Offset Voltage Y-Input Signal Y-Input Offset Voltage Multiplier Output Offset Voltage Nonlinearity Y1, Y2, Y3, Y4 Executing the algebra to simplify the above expression yields expressions for all the errors in an analog multiplier: –VS Figure 3. Functional Block Diagram of Each MLT04 Multiplier Each of the MLT04’s analog multipliers is based on a Gilbert cell multiplier configuration, a 1.23 V bandgap reference, and a unityconnected output amplifier. Multiplier scale factor is determined through a differential pair/trimmable resistor network external to the core. An equivalent circuit for each of the multipliers is shown in Figure 4. Term Description Dependence on Input KVXVY True Product Goes to Zero As Either or Both Inputs Go to Zero ∆KVYVY Scale-Factor Error Goes to Zero at VX, VY = 0 VXYOS Linear “X” Feedthrough Due to Y-Input Offset Proportional to VX VYXOS Linear “Y” Feedthrough Due to X-Input Offset Proportional to VY XOSYOS Output Offset Due to X-, Y-Input Offsets Independent of VX, VY ZOS Output Offset Independent of VX, VY ƒ(X, Y) Nonlinearity Depends on Both V X, VY. Contains Terms Dependent on VX, VY, Their Powers and Cross Products VCC W OUT INTERNAL BIAS XIN 22k 22k 22k SCALE FACTOR GND YIN 200µA 200µA 200µA 200µA 200µA 200µA VEE As shown in the table, the primary static errors in an analog multiplier are input offset voltages, output offset voltage, scale factor, and nonlinearity. Of the four sources of error, only two are externally trimmable in the MLT04: the X- and Y-input offset voltages. Output offset voltage in the MLT04 is factory-trimmed to ± 50 mV, and the scale factor is internally adjusted to ± 2.5% of full scale. Input offset voltage errors can be eliminated by using the optional trim circuit of Figure 6. This scheme then reduces the net error to output offset, scale-factor (gain) error, and an irreducible nonlinearity component in the multiplying core. Figure 4. Equivalent Circuit for the MLT04 Details of each multiplier’s output-stage amplifier are shown in Figure 5. The output stages idles at 200 µA, and the resistors in series with the emitters of the output stage are 25 Ω. The output stage can drive load capacitances up to 500 pF without oscillation. For loads greater than 500 pF, the outputs of the MLT04 should be isolated from the load capacitance with a 100 Ω resistor. VCC +VS 50kΩ 50kΩ 25Ω I ±100mV FOR XOS, YOS TRIM CONNECT TO SUM NODE OF AN EXT OP AMP W OUT –VS 25Ω Figure 6. Optional Offset Voltage Trim Configuration VEE Figure 5. Equivalent Circuit for MLT04 Output Stages REV. B –3– MLT04 Feedthrough In the ideal case, the output of the multiplier should be zero if either input is zero. In reality, some portion of the nonzero input will “feedthrough” the multiplier and appear at the output. This is caused by the product of the nonzero input and the offset voltage of the “zero” input. Introducing an offset equal to and opposite of the “zero” input offset voltage will null the linear component of the feedthrough. Residual feedthrough at the output of the multiplier is then irreducible core nonlinearity. VERTICAL – 5mV/DIV 100 Typical X- and Y-input feedthrough curves for the MLT04 are shown in Figures 7 and 8, respectively. These curves illustrate MLT04 feedthrough after “zero” input offset voltage trim. Residual X-input feedthrough measures 0.08% of full scale, whereas residual Y-input feedthrough is almost immeasurable. 90 10 0% Figure 9. X-Input Nonlinearity @ Y = +2.5 V X-INPUT: ±2.5V @ 10Hz YOS NULLED TA = +25°C 100 10 0% 90 10 0% HORIZONTAL – 0.5V/DIV Figure 10. X-Input Nonlinearity @ Y = –2.5 V Y-INPUT: ±2.5V @ 10Hz XOS NULLED TA = +25°C 100 VERTICAL – 5mV/DIV VERTICAL – 5mV/DIV 90 X-INPUT: ±2.5V @ 10Hz Y-INPUT: –2.5V YOS NULLED T = +25°C A HORIZONTAL – 0.5V/DIV Figure 7. X-Input Feedthrough with YOS Nulled 100 X-INPUT: ±2.5V @ 10Hz Y-INPUT: +2.5V YOS NULLED T = +25°C A HORIZONTAL – 0.5V/DIV VERTICAL – 5mV/DIV VERTICAL – 5mV/DIV 100 90 10 0% 90 Y-INPUT: ±2.5V @ 10Hz X-INPUT: +2.5V XOS NULLED TA = +25°C 10 0% HORIZONTAL – 0.5V/DIV HORIZONTAL – 0.5V/DIV Figure 11. Y-Input Nonlinearity @ X = +2.5 V Figure 8. Y-Input Feedthrough with XOS Nulled Nonlinearity Multiplier core nonlinearity is the irreducible component of error. It is the difference between actual performance and “best-straightline” theoretical output, for all pairs of input values. It is expressed as a percentage of full scale with all other dc errors nulled. Typical X- and Y-input nonlinearities for the MLT04 are shown in Figures 9 through 12. Worst-case X-input nonlinearity measured less than 0.2%, and Y-input nonlinearity measured better than 0.06%. For modulator/demodulator or mixer applications it is, therefore, recommended that the carrier be connected to the X-input while the signal is applied to the Y-input. VERTICAL – 5mV/DIV 100 90 Y-INPUT: ±2.5V @ 10Hz X-INPUT: –2.5V XOS NULLED T = +25°C A 10 0% HORIZONTAL – 0.5V/DIV Figure 12. Y-Input Nonlinearity @ X = –2.5 V –4– REV. B Typical Performance Characteristics – MLT04 12 180 TA = +25°C V = ±5V NBW = 10Hz –50kHz TA = +25°C 90 90 3 GAIN –dB OUTPUT NOISE VOLTAGE – 100µV/DIV 6 100 135 S VX = 100mV VY = +2.5V 45 GAIN 0 0 –3 –45 PHASE –6 –90 PHASE = 68.3° @ 7.142 MHz –9 10 0% –12 10k –135 –180 10M 100k 1M FREQUENCY – Hz TIME = 10ms/DIV Figure 13. Broadband Noise PHASE – Degrees 9 Figure 16. X-Input Gain and Phase vs. Frequency 12 180 9 V S = ±5V V X = +2.5V 135 6 V Y = 100mV 90 3 90 45 GAIN 0 0 –3 –45 PHASE –6 10 –90 PHASE = 68.1° @ 8.064 MHz –9 0% –12 10k Figure 17. Y-Input Gain and Phase vs. Frequency 8 10000 6 VS = ±5V TA = +25°C CL= 560pF CL= 220pF Hz 2 1000 AV GAIN – dB NOISE DENSITY – nV/ CL= 320pF 4 100 0 –2 NO CL CL= 100pF –4 –6 VS = ±5V RL = 2kΩ TA = +25°C –8 –10 –12 0 10 100 1k 10k FREQUENCY – Hz 100k 1k 1M Figure 15. Noise Density vs. Frequency REV. B –135 –180 10M 100k 1M FREQUENCY – Hz TIME = 10ms/DIV Figure 14. Broadband Noise PHASE – Degrees NBW = 1.9MHz TA = +25°C 100 GAIN –dB OUTPUT NOISE VOLTAGE – 625µV/DIV T A = +25°C 10k 100k 1M FREQUENCY – Hz 10M 100M Figure 18. Amplitude Response vs. Capacitive Load –5– MLT04 – Typical Performance Characteristics 0 VS = ±5V FEEDTHROUGH – dB –20 VERTICAL – 50mV/DIV TA = +25°C VX = 0V VY = 1Vpk –40 –60 100 TA = +25°C 90 10 0% VY = 0V VX = 1Vpk –80 TIME – 100ns/DIV Figure 22. Y-Input Small-Signal Transient Response, CL = 30 pF –100 1k 10k 100k 1M 3M FREQUENCY – Hz VERTICAL – 50mV/DIV Figure 19. Feedthrough vs. Frequency 0 TA = 25°C VS = ±5V VX = ±2.5Vpk –20 VY = +2.5VDC CROSSTALK – dB ΩX-INPUT = +2.5V RL = 10kΩ 100 90 ΩX-INPUT = +2.5V RL = 10kΩ TA = +25°C 10 0% –40 –60 TIME – 100ns/DIV Figure 23. Y-Input Small-Signal Transient Response, CL = 100 pF –80 –100 –120 10k 100k FREQUENCY – Hz 1M 100 10M VERTICAL – 1V/DIV 1k Figure 20. Crosstalk vs. Frequency 10 0% 2.0 1.0 Y = 100mV RMS X = 2.5VDC 0.5 ΩX-INPUT: +2.5V RL = 10kΩ TA = +25°C ΩVS = ±5V RL = 2kΩ TA = +25°C 1.5 TIME = 100ns/DIV Figure 24. Y-Input Large-Signal Transient Response, CL = 30 pF 0 –0.5 X = 100mV RMS Y = 2.5VDC –1.0 –1.5 100 VERTICAL – 1V/DIV AV GAIN – dB 90 –2.0 –2.5 –3.0 1k 10k 100k 1M 10M 100M FREQUENCY – Hz 90 10 0% ΩX-INPUT: +2.5V RL = 10kΩ TA = +25°C Figure 21. Gain Flatness vs. Frequency TIME = 100ns/DIV Figure 25. Y-Input Large-Signal Transient Response, CL = 100 pF –6– REV. B MLT04 1 9 80 V = 100mV Y –3dB-BANDWIDTH – MHz THD + NOISE – % X-INPUT Y = +2.5VDC 0.1 ΩVS = ±5V RL = 2kΩ T A = +25° C fO = 1kHz FLPF = 22kHz 0.01 8 75 –3dB BW 7 70 PHASE @ –3dB BW 6 65 PHASE @ –3dB BW – Degrees VS = ±5V VX = +2.5V Y-INPUT X = +2.5VDC 0.001 0.1 1 5 –75 10 –50 –25 INPUT SIGNAL LEVEL – Volts P-P Figure 26. THD + Noise vs. Input Signal Level LINEARTY ERROR – % MAXIMUM OUTPUT SWING – Volts p-p Y Vs = ±5V X 0.1 0 –0.1 –0.2 60 125 6 1% DISTORTION 5 4 3 ΩTA = +25°C RL = 2kΩ VS = ±5V 2 0 –50 –25 0 25 50 75 100 125 1k TEMPERATURE – °C 10k 100k 1M Figure 30. Maximum Output Swing vs. Frequency 80 9 4.5 V = ±5V S V = 100mV 4.0 X V = +2.5V –3dB BW 70 7 PHASE @ –3dB BW 65 6 POSITIVE SWING 3.5 OUTPUT SWING – Volts 75 8 PHASE @ –3dB BW – Degrees Y 3.0 2.5 2.0 NEGATIVE SWING 1.5 1.0 VS = ±5V TA = +25°C 0.5 –50 –25 0 25 50 10M FREQUENCY – Hz Figure 27. Linearity Error vs. Temperature 75 100 60 125 0 10 100 1k 10k ΩLOAD RESISTANCE – Ω TEMPERATURE – °C Figure 28. X-Input Gain Bandwidth vs. Temperature REV. B 100 7 1 5 –75 75 8 ≤V = +2.5V, –2.5V ≤ V ≤ +2.5V X Y V = +2.5V, –2.5V ≤ V ≤ +2.5V 0.2 –3dB-BANDWIDTH – MHz 25 50 TEMPERATURE – °C Figure 29. Y-Input Gain Bandwidth vs. Temperature 0.3 –0.3 –75 0 Figure 31. Maximum Output Swing vs. Resistive Load –7– MLT04 0.407 300 TA = +25°C V = ±5V VS = ±5V NO LOAD S 250 X = ±2.5V 200 YOS @ X = ±2.5V 0.406 SCALE FACTOR – 1/V UNITS SS = 1000 MULTIPLIERS XOS @ Y = ±2.5V 150 100 0.405 0.404 0.403 50 0 –12.5 –10 –7.5 –5 –2.5 0 2.5 5 OFFSET VOLTAGE – mV 7.5 10 0.402 –75 12.5 –25 0 25 50 75 100 125 TEMPERATURE – °C Figure 35. Scale Factor vs. Temperature Figure 32. Offset Voltage Distribution 400 6 T = +25°C VS = ±5V A SS = 1000 MULTIPLIERS 350 4 VS = ±5V VX = VY = 0V 300 XOS, Y = ±2.5V 2 250 UNITS VOS – mV –50 0 200 150 –2 YOS, X = ±2.5V 100 –4 50 –6 –75 0 –50 –25 0 25 50 TEMPERATURE – °C 75 100 –15 125 –12 –9 –6 –3 0 3 6 9 12 15 OUTPUT OFFSET VOLTAGE – mV Figure 36. Output Offset Voltage (ZOS) Distribution Figure 33. Offset Voltage vs. Temperature 400 10 SS = 1000 MULTIPLIERS TA = +25°C 350 V = ±5V s OUTPUT OFFSET VOLTAGE – mV VS = ±5V 300 UNITS 250 200 150 100 50 0 0.395 0.3975 0.400 0.4025 0.405 0.4075 0.410 0.4125 5 0 –5 –10 –75 0.415 SCALE FACTOR – 1/V Figure 34. Scale Factor Distribution –50 –25 0 25 50 TEMPERATURE – °C 75 100 125 Figure 37. Output Offset Voltage (ZOS) vs. Temperature –8– REV.B MLT04 17 15 12 OUTPUT VOLTAGE OFFSET – mV SUPPLY CURRENT – mA VS = ±5V NO LOAD VX = VY = 0 16 15 14 σX +3σ 9 6 3 0 X –3 –6 –9 σX –3σ –12 13 –75 –15 –50 –25 0 25 50 75 100 0 125 200 Figure 38. Supply Current vs. Temperature 600 800 1000 Figure 41. Output Voltage Offset (ZOS) Distribution Accelerated by Burn-in 0.424 100 TA = +25°C 0.420 VS = ±5V 80 0.416 SCALE FACTOR – 1/V POWER SUPPLY REJECTION – dB 400 HOURS OF OPERATION AT +125°C TEMPERATURE – °C +PSRR 60 –PSRR 40 σX +3σ 0.412 0.408 X 0.404 0.400 0.396 σX –3σ 0.392 20 0.388 0.384 0 100 1k 10k FREQUENCY – Hz 100k 0 1M σX +3σ LINEARITY ERROR – % 0.75 0.50 0.25 X –0.25 –0.50 –0.75 σX –3σ –1.0 –1.25 0 200 400 600 800 1000 HOURS OF OPERATION AT +125°C Figure 40. Linearity Error (LE) Distribution Accelerated by Burn-in REV. B 600 800 1000 Figure 42. Scale Factor (K) Distribution Accelerated by Burn-in 1.25 0 400 HOURS OF OPERATION AT +125°C Figure 39. Power Supply Rejection vs. Frequency 1.0 200 –9– MLT04 APPLICATIONS The MLT04 is well suited for such applications as modulation/ demodulation, automatic gain control, power measurement, analog computation, voltage-controlled amplifiers, frequency doublers, and geometry correction in CRT displays. Multiplier Connections Figure 43 llustrates the basic connections for multiplication. Each of the four independent multipliers has single-ended voltage inputs (X, Y) and a low impedance voltage output (W). Also, each multiplier has its own dedicated ground connection (GND) which is connected to the circuit’s analog common. For best performance, circuit layout should be compact with short component leads and well-bypassed supply voltage feeds. In applications where fewer than four multipliers are used, all unused analog inputs must be returned to the analog common. The equation shows a dc term at the output which will vary strongly with the amplitude of the input, V IN. The output dc offset can be eliminated by capacitively coupling the MLT04’s output with a high-pass filter. For optimal spectral performance, the filter’s cutoff frequency should be chosen to eliminate the input fundamental frequency. A source of error in this configuration is the offset voltages of the X and Y inputs. The input offset voltages produce cross products with the input signal to distort the output waveform. To circumvent this problem, Figure 45 illustrates the use of inverting amplifiers configured with an OP285 to provide a means by which the X- and Y-input offsets can be trimmed. ΩP1 50kΩ +5V –5V XOS TRIM ΩR5 500kΩ 1 W1 2 GND1 X1 3 X1 X4 16 X4 Y1 4 Y1 Y4 15 Y4 5 1 10 11 12 13 14 15 16 98 8 7 6 5 4 3 2 VCC 17 W1 W4 18 R1 10k W4 R2 10k 2 GND4 17 A1 3 +5V 0.1µF MLT04 –5V 6 Y2 Y3 13 Y3 X2 7 X2 X3 12 X3 8 9 GND2 A1, A2 = 1/2 OP285 5 VEE 14 Y2 W2 VIN GND3 W2 W1–4 = 0.4 (X1–4 ΩR6 500kΩ –5V W3 • Y1–4) 2 0.4 + A2 0.1µF + 7 4 1 W1 C1 100pF VO ΩRL 10kΩ + 6 R3 10k 11 W3 10 + 1/4 MLT04 3 1 R4 10k YOS TRIM ΩP2 50kΩ +5V Figure 45. Frequency Doubler with Input Offset Voltage Trims Figure 43. Basic Multiplier Connections Squaring and Frequency Doubling As shown in Figure 44, squaring of an input signal, V IN, is achieved by connecting the X-and Y-inputs in parallel to produce an output of VIN2/2.5 V. The input may have either polarity, but the output will be positive. +5V Feedback Divider Connections The most commonly used analog divider circuit is the “inverted multiplier” configuration. As illustrated in Figure 46, an “inverted multiplier” analog divider can be configured with a multiplier operating in the feedback loop of an operational amplifier. The general form of the transfer function for this circuit configuration is given by: 0.1µF VIN X Y 1/4 MLT04 + GND R2 VIN VO = −2.5 V × × R1 VX W 0.4 W = 0.4 VIN2 + 0.1µF –5V Figure 44. Connections for Squaring Here, the multiplier operates as a voltage-controlled potentiometer that adjusts the loop gain of the op amp relative to a control signal, VX. As the control signal to the multiplier decreases, the output of the multiplier decreases as well. This has the effect of reducing negative feedback which, in turn, decreases the amplifier’s loop gain. The result is higher closed-loop gain and reduced circuit bandwidth. As VX is increased, the output of the multiplier increases which generates more negative feedback — closed-loop gain drops and circuit bandwidth increases. An example of an “inverted multiplier” analog divider frequency response is shown in Figure 47. When the input is a sine wave given by V IN sin ωt, the squaring circuit behaves as a frequency doubler because of the trigonometric identity: (VIN sin ωt )2 V 2 1 = IN (1 − cos 2 ωt ) 2.5V 2.5V 2 –10– REV. B MLT04 1/4 MLT04 + 3 X1 1/4 MLT04 + W1 1 0.4 2 R2 10k + VX D1 1N4148 GND1 1 R2 10k Y1 X1 2 0.4 Y1 4 4 R1 10k R1 10k VIN V 2 3 OP113 6 VO + VO = –2.5V • 3 VIN VO = VX Figure 46. “Inverted-Multiplier” Configuration for Analog Division V O + –2.5V • VIN Voltage-Controlled Low-Pass Filter The circuit in Figure 49 illustrates how to construct a voltagecontrolled low-pass filter with an analog multiplier. The advantage with this approach over conventional active-filter configurations is that the overall characteristic cut-off frequency, ωO, will be directly proportional to a multiplying input voltage. This permits the construction of filters in which the capacitors are adjustable (directly or inversely) by a control voltage. Hence, the frequency scale of a filter can be manipulated by means of a single voltage without affecting any other parameters. The general form of the circuit’s transfer function is given by: 90 80 2 IN OP113 6 AVOL OP113 70 60 GAIN – dB W1 3 50 VX = 0.025V 40 30 VO VIN 10 VX = 2.5V 0 100 1k 10k 100k FREQUENCY – Hz 1M 10M In this circuit, the ratio of R2 to R1 sets the passband gain, and the break frequency of the filter, ωLP, is given by: Figure 47. Signal-Dependent Feedback Makes Variables Out of Amplifier Bandwidth and Stability R1 VX ωLP = R1 + R2 2.5RC Although this technique works well with almost any operational amplifier, there is one caveat: for best circuit stability, the unitygain crossover frequency of the operational amplifier should be equal to or less than the MLT04’s 8 MHz bandwidth. X1 + Connection for Square Rooting Another application of the “inverted multiplier” configuration is the square-root function. As shown in Figure 48, both inputs of the MLT04 are wired together and are used as the output of the circuit. Because the circuit configuration exhibits the following generalized transfer function: 1/4 MLT04 + VX W1 2 C 80pF R 10k 1 0.4 2 A1 + R1 10k 4 3 R2 10k Y1 1 + A1 = 1/2 OP285 VIN VO the input signal voltage is limited to the range –2.5 V ≤ VIN < 0. To prevent circuit latchup due to positive feedback or input signal polarity reversal, a 1N4148-type junction diode is used in series with the output of the multiplier. Figure 48. Connections for Square Rooting 3 GND1 R2 VO = −2.5 × ×VIN R1 REV. B R2 1 = − R1 R2 + R1 2.5RC + 1 s R1 VX VX = 0.25V 20 VIN fLP = VX π10πRC 1 =– 1+S 5RC VX ; fLP = MAX @ VX = 2.5V Figure 49. A Voltage-Controlled Low-Pass Filter For example, if R1 = R2 = 10 kΩ , R = 10 kΩ , and C = 80 pF, –11– VO MLT04 then the output of the circuit has a pole at frequencies from 1 kHz to 100 kHz for VX ranging from 25 mV to 2.5 V. The performance of this low-pass filter is illustrated in Figure 20. OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 30 18 10 1 9 0.280 (7.11) 0.240 (6.10) PIN 1 20 0.925 (23.49) 0.845 (21.47) GAIN – dB 10 0.130 (3.30) MIN 0.160 (4.06) 0.115 (2.93) V = 0.025V – 10 X 0.25V 0.325 (8.25) 0.300 (7.62) 0.015 (0.38) MIN 0.210 (5.33) MAX 0 C1845–18–10/93 18-Lead Epoxy DIP (P Suffix) 2.5V 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) BSC 0.070 (1.77) 0.045 (1.15) SEATING PLANE 15° 0° 0.015 (0.38) 0.008 (0.20) – 20 – 30 10 100 1k 10k 100k FREQUENCY – Hz 1M 10M 18-Lead Wide-Body SOL (S Suffix) Figure 50. Low-Pass Cutoff Frequency vs. Control Voltage, VX 10 18 With this approach, it is possible to construct parametric biquad filters whose parameters (center frequency, passband gain, and Q) can be adjusted with dc control voltages. 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) PIN 1 9 1 0.1043 (2.65) 0.0926 (2.35) 0.4625 (11.75) 0.4469 (11.35) 0.0500 (1.27) BSC 0.0192 (0.49) 0.0138 (0.35) 0.0125 (0.32) 0.0091 (0.23) 8° 0° 0.0500 (1.27) 0.0157 (0.40) PRINTED IN U.S.A. 0.0118 (0.30) 0.0040 (0.10) 0.0291 (0.74) x 45° 0.0098 (0.25) –12– REV. B

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