19-0622; Rev 0; 8/06 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits The MAX16041/MAX16042/MAX16043 are dual-/triple-/ quad-voltage monitors and sequencers that are offered in a small thin QFN package. These devices offer enormous design flexibility as they allow fixed and adjustable thresholds to be selected through logic inputs and provide sequence timing through small external capacitors. These versatile devices are ideal for use in a wide variety of multivoltage applications. As the voltage at each monitored input exceeds its respective threshold, its corresponding output goes high after a propagation delay or a capacitor-set time delay. When a voltage falls below its threshold, its respective output goes low after a propagation delay. Each detector circuit also includes its own enable input, allowing the power-good outputs to be shut off independently. The independent output for each detector has an open-drain configuration capable of supporting voltages up to 28V, thereby allowing them to interface to shutdown and enable inputs of various DC-DC regulators. Each detector can operate independently as four separate supervisory circuits or can be daisy-chained to provide controlled power-supply sequencing. The MAX16041/MAX16042/MAX16043 also include a push-pull reset function that deasserts only after all of the independently monitored voltages exceed their threshold. The reset timeout is internally fixed or can be adjusted externally. These devices are offered in a 4mm x 4mm TQFN package and are fully specified from -40°C to +125°C. Features o 2.2V to 28V Operating Voltage Range o Fixed Thresholds for 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V Systems o 1.5% Accurate Adjustable Threshold Monitors Voltages Down to 0.5V o 2.7% Accurate Fixed Thresholds Over Temperature o Fixed (140ms min)/Capacitor-Adjustable Delay Timing o Independent Open-Drain Outputs/Push-Pull RESET Output o Enable Inputs for Each Monitored Voltage o 9 Logic-Selectable Threshold Options o Manual Reset and Tolerance Select (5%/10%) Inputs o Small, 4mm x 4mm TQFN Package o Fully Specified from -40°C to +125°C Ordering Information PART* TEMP RANGE -40°C to +125°C 16 TQFN T1644-4 MAX16042TP+ -40°C to +125°C 20 TQFN T2044-3 MAX16043TG+ -40°C to +125°C 24 TQFN T2444-4 +Denotes lead-free package. *For tape and reel, add a “T” after the “+.” All tape and reel orders are available in 2.5k increments. Pin Configurations MAX16041 2 2 (Open-drain) Push-pull MAX16042 3 3 (Open-drain) Push-pull MAX16043 4 4 (Open-drain) Push-pull OUT3 OUT4 TH0 13 12 TH1 CRESET 20 11 EN4 CDLY4 21 10 EN3 9 EN2 CDLY2 23 8 EN1 CDLY1 24 7 GND MAX16043 CDLY3 22 + 1 2 3 4 5 6 TOL RESET OUTPUT 14 IN4 INDEPENDENT OUTPUTS 15 IN3 MONITORED VOLTAGES 16 IN2 PART 17 IN1 Selector Guide 18 MR 19 VCC Networking/Telecommunication Equipment OUT2 Servers/Workstations OUT1 TOP VIEW RESET Multivoltage Systems Storage Systems PKG CODE MAX16041TE+ Applications DC-DC Supplies PINPACKAGE TQFN (4mm x 4mm) Pin Configurations continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX16041/MAX16042/MAX16043 General Description MAX16041/MAX16042/MAX16043 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) VCC .........................................................................-0.3V to +30V EN1–EN4 ....................................................-0.3V to (VCC + 0.3V) OUT1–OUT4 ...........................................................-0.3V to +30V RESET.........................................................-0.3V to (VCC + 0.3V) IN1–IN4.......................................................-0.3V to (VCC + 0.3V) MR, TOL, TH1, TH0 ....................................-0.3V to (VCC + 0.3V) CDLY1–CDLY4 .........................................................-0.3V to +6V CRESET ......................................................-0.3V to (VCC + 0.3V) Input/Output Current (all pins)..........................................±20mA Continuous Power Dissipation (TA = +70°C) 16-Pin TQFN (derate 25mW/°C above +70°C) ...........2000mW 20-Pin TQFN (derate 25.6mW/°C above +70°C) ........2051mW 24-Pin TQFN (derate 27.8mW/°C above +70°C) ........2222mW Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 2.2V to 28V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 28.0 V 2.0 V SUPPLY Operating Voltage Range Undervoltage Lockout Undervoltage-Lockout Hysteresis VCC Supply Current VCC (Note 2) 2.2 UVLO (Note 2) 1.8 UVLOHYST VCC falling ICC All OUT_ and RESET at logic-high (IN_ current excluded) 1.9 50 mV VCC = 3.3V 40 75 VCC = 12V 47 75 VCC = 28V 52 80 3.052 3.135 µA INPUTS (IN_) 3.3V threshold, TOL = GND IN_ Thresholds (IN_ Falling) Adjustable Threshold (IN_ Falling) IN_ Hysteresis (IN_ Rising) VTH VTH 2 3.3V threshold, TOL = VCC 2.805 2.888 2.970 2.5V threshold, TOL = GND 2.250 2.313 2.375 2.5V threshold, TOL = VCC 2.125 2.187 2.250 1.8V threshold, TOL = GND 1.620 1.665 1.710 1.8V threshold, TOL = VCC 1.530 1.575 1.620 1.5V threshold, TOL = GND 1.350 1.387 1.425 1.5V threshold, TOL = VCC 1.275 1.312 1.350 1.2V threshold, TOL = GND 1.080 1.110 1.140 1.2V threshold, TOL = VCC 1.020 1.050 1.080 TOL = GND 0.492 0.5 0.508 TOL = VCC 0.463 0.472 0.481 0.5 % Fixed threshold 500 918 kΩ Adjustable threshold only (VIN_ = 1V) -100 VHYST IN_ Input Resistance IN_ Input Current 2.970 IL _______________________________________________________________________________________ +100 V V nA Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits MAX16041/MAX16042/MAX16043 ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.2V to 28V, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.465 0.5 0.535 V nA CRESET AND CDLY_ CRESET Threshold VTH-RESET CRESET rising, VCC = 3.3V CRESET Charge Current ICH-RESET VCC = 3.3V 380 500 620 CDLY_ Threshold VTH-CDLY CDLY_ rising, VCC = 3.3V 0.95 1 1.05 V CDLY_ Charge Current ICH-CDLY VCC = 3.3V 200 250 300 nA 0.4 V DIGITAL LOGIC INPUTS (EN_, MR, TOL, TH1, TH0) Input Low Voltage VIL Input High Voltage VIH 1.4 TH1, TH0 Logic-Input Floating V 0.6 TOL, TH1, TH0 Logic-Input Current VTOL, VTH1, VTH0 = GND or VCC EN_ Input Leakage Current VEN_ = VCC or GND -100 MR Internal Pullup Current VCC = 3.3V 250 -1 535 V +1 µA +100 nA 820 nA OUTPUTS (OUT_, RESET) Output Low Voltage (Open-Drain or Push-Pull) VCC ≥ 1.2V, ISINK = 90µA VOL Output High Voltage (Push-Pull) VOH Output Leakage Current (Open-Drain) ILKG Reset Timeout Period tRP 0.3 VCC ≥ 2.25V, ISINK = 0.5mA 0.3 VCC ≥ 4.5V, ISINK = 1mA 0.35 VCC ≥ 3V, ISOURCE = 500µA 0.8 x VCC VCC ≥ 4.5V, ISOURCE = 800µA 0.8 x VCC V Output not asserted low, VOUT = 28V CRESET = VCC, VCC = 3.3V 1 140 CRESET open V 190 0.030 260 µA ms TIMING IN_ to OUT_ Propagation Delay IN_ to RESET Propagation Delay tDELAY+ IN_ rising, CDLY_ open 35 tDELAY- IN_ falling, CDLY_ open 20 tRST-DELAY CRESET open, IN_ falling MR Minimum Input Pulse Width (Note 3) EN_ or MR Glitch Rejection EN_ to OUT_ Delay MR to RESET Delay 35 2 µs µs µs 280 tOFF From device enabled to device disabled 3 tON From device disabled to device enabled (CDLY_ open) 30 MR falling 3 ns µs µs Note 1: Devices are production tested at TA = +25°C. Limits over temperature are guaranteed by design. Note 2: Operating below the UVLO causes all outputs to go low. The outputs are guaranteed to be in the correct state for VCC down to 1.2V. Note 3: To guarantee an assertion, the minimum input pulse width must be greater than 2µs. _______________________________________________________________________________________ 3 Typical Operating Characteristics (VCC = 3.3V, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT (µA) 50 45 40 50 45 VCC = 12V 40 35 35 30 30 ADJUSTABLE THRESHOLD TEMPERATURE (°C) NORMALIZED ADJUSTABLE THRESHOLD vs. TEMPERATURE OUT_ DELAY vs. CCDLY_ RESET TIMEOUT PERIOD vs. CCRESET 22 26 30 5000 4500 4000 OUT_ DELAY (ms) TOL = VCC TOL = GND 3500 3000 2500 2000 1500 1000 500 3.3V THRESHOLD 0 1200 1100 1000 900 MAX16041 toc06 18 MAX16041 toc05 14 RESET TIMEOUT PERIOD (ms) -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 10 800 700 600 500 400 300 200 100 0 0 100 200 300 400 500 600 700 800 900 1000 0 100 200 300 400 500 600 700 800 900 1000 TEMPERATURE (°C) CCDLY_ (nF) CCRESET (nF) FIXED RESET TIMEOUT PERIOD vs. TEMPERATURE OUT_ LOW VOLTAGE vs. SINK CURRENT RESET OUTPUT LOW VOLTAGE vs. SINK CURRENT 187 VOUT_ (V) 186 185 184 0.6 0.4 183 0.2 182 MAX16041 toc09 0.8 1.0 0.9 RESET OUTPUT LOW VOLTAGE (V) 188 1.0 MAX16041 toc08 CRESET = VCC MAX16041 toc07 190 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 181 0 0 180 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 4 TOL = GND -40 -25 -10 5 20 35 50 65 80 95 110 125 6 -40 -25 -10 5 20 35 50 65 80 95 110 125 189 TOL = VCC SUPPLY VOLTAGE (V) 2 1.003 1.002 1.001 1.000 0.999 0.998 0.997 0.996 0.995 0.994 0.993 0.992 0.991 0.990 VCC = 3.3V 1.003 1.002 1.001 1.000 0.999 0.998 0.997 0.996 0.995 0.994 0.993 0.992 0.991 0.990 MAX16041 toc03 55 MAX16041 toc04 SUPPLY CURRENT (µA) 55 MAX16041 VCC = 28V NORMALIZED THRESHOLD MAX16041 NORMALIZED THRESHOLD 60 MAX16041 toc01 60 NORMALIZED ADJUSTABLE THRESHOLD vs. TEMPERATURE MAX16041 toc02 SUPPLY CURRENT vs. SUPPLY VOLTAGE FIXED RESET TIMEOUT PERIOD (ms) MAX16041/MAX16042/MAX16043 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits 0 1 2 3 4 5 SINK CURRENT (mA) 6 7 0 1 2 3 4 5 SINK CURRENT (mA) _______________________________________________________________________________________ 6 7 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits RESET OUTPUT HIGH VOLTAGE vs. SOURCE CURRENT 3.0 ENABLE TURN-ON ENABLE TURN-OFF MAX16041 toc12 MAX16041 toc11 MAX16041 toc10 CRESET = VCC CDLY_ = OPEN CRESET = VCC CDLY_ = OPEN 2.5 EN_ 5V/div EN_ 5V/div OUT_ 5V/div OUT_ 5V/div RESET 5V/div RESET 5V/div 2.0 1.5 1.0 0.5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 40ms/div 4µs/div SOURCE CURRENT (mA) MR FALLING vs. RESET RESET TIMEOUT DELAY MAX16041 toc14 MAX16041 toc13 CRESET = VCC CDLY_ = OPEN CRESET = VCC CDLY_ = OPEN IN_ 5V/div MR 5V/div OUT_ 5V/div RESET 5V/div RESET 5V/div 100ms/div 4µs/div MR RISING vs. RESET MAXIMUM TRANSIENT DURATION vs. THRESHOLD OVERDRIVE MAX16041 toc15 100 CRESET = VCC CDLY_ = OPEN MR 5V/div RESET 5V/div OUTPUT ASSERTED ABOVE THIS LINE 90 80 MAX16041 toc16 0 MAXIMUM TRANSIENT DURATION (µs) RESET OUTPUT HIGH VOLTAGE (V) 3.5 70 60 50 40 30 20 10 0 40ms/div 1 10 100 1000 THRESHOLD OVERDRIVE (mV) _______________________________________________________________________________________ 5 MAX16041/MAX16042/MAX16043 Typical Operating Characteristics (continued) (VCC = 3.3V, TA = +25°C, unless otherwise noted.) Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits MAX16041/MAX16042/MAX16043 Pin Description PIN 6 NAME FUNCTION MAX16041 MAX16042 MAX16043 1 1 1 VCC Supply Voltage Input. Connect a 2.2V to 28V supply voltage to power the device. All outputs are low when VCC is below the UVLO. For noisy systems, bypass VCC to GND with a 0.1µF capacitor. 2 2 2 IN1 Monitored Input 1. When the voltage at IN1 exceeds its threshold, OUT1 goes high after the capacitor-adjustable delay period. When the voltage at IN1 falls below its threshold, OUT1 goes low after a propagation delay. 3 3 3 IN2 Monitored Input 2. When the voltage at IN2 exceeds its threshold, OUT2 goes high after the capacitor-adjustable delay period. When the voltage at IN2 falls below its threshold, OUT2 goes low after a propagation delay. — 4 4 IN3 Monitored Input 3. When the voltage at IN3 exceeds its threshold, OUT3 goes high after the capacitor-adjustable delay period. When the voltage at IN3 falls below its threshold, OUT3 goes low after a propagation delay. — — 5 IN4 Monitored Input 4. When the voltage at IN4 exceeds its threshold, OUT4 goes high after the capacitor-adjustable delay period. When the voltage at IN4 falls below its threshold, OUT4 goes low after a propagation delay. 4 5 6 TOL Threshold Tolerance Input. Connect TOL to GND to select thresholds 5% below nominal. Connect TOL to VCC to select thresholds 10% below nominal. 5 6 7 GND Ground 6 7 8 EN1 Active-High Logic-Enable Input 1. Driving EN1 low causes OUT1 to go low regardless of the input voltage. Drive EN1 high to enable the monitoring comparator. 7 8 9 EN2 Active-High Logic-Enable Input 2. Driving EN2 low causes OUT2 to go low regardless of the input voltage. Drive EN2 high to enable the monitoring comparator. — 9 10 EN3 Active-High Logic-Enable Input 3. Driving EN3 low causes OUT3 to go low regardless of the input voltage. Drive EN3 high to enable the monitoring comparator. — — 11 EN4 Active-High Logic-Enable Input 4. Driving EN4 low causes OUT4 to go low regardless of the input voltage. Drive EN4 high to enable the monitoring comparator. 8 10 12 TH1 Threshold Select Input 1. Connect TH1 to VCC or GND, or leave it open to select the input-voltage threshold option in conjunction with TH0 (see Table 2). 9 11 13 TH0 Threshold Select Input 0. Connect TH0 to VCC or GND, or leave it open to select the input-voltage threshold option in conjunction with TH1 (see Table 2). — — 14 OUT4 Output 4. When the voltage at IN4 is below its threshold or EN4 goes low, OUT4 goes low. — 12 15 OUT3 Output 3. When the voltage at IN3 is below its threshold or EN3 goes low, OUT3 goes low. 10 13 16 OUT2 Output 2. When the voltage at IN2 is below its threshold or EN2 goes low, OUT2 goes low. _______________________________________________________________________________________ Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits PIN MAX16041 MAX16042 MAX16043 11 14 17 NAME FUNCTION OUT1 Output 1. When the voltage at IN1 is below its threshold or EN1 goes low, OUT1 goes low. RESET Active-Low Reset Output. RESET asserts low when any of the monitored voltages (IN_) falls below its respective threshold, any EN_ goes low, or MR is asserted. RESET remains asserted for the reset timeout period after all of the monitored voltages exceed their respective threshold, all EN_ are high, all OUT_ are high, and MR is deasserted. 12 15 18 13 16 19 14 17 20 — — 21 — 18 22 CDLY3 15 19 23 CDLY2 16 20 24 CDLY1 — — — EP Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period after MR is deasserted (as long as all OUT_ are high). Capacitor-Adjustable Reset Delay Input. Connect an external capacitor from CRESET to GND to set the reset timeout period or connect to VCC for the CRESET default 140ms minimum reset timeout period. Leave CRESET open for internal propagation delay. Capacitor-Adjustable Delay Input 4. Connect an external capacitor from CDLY4 CDLY4 to GND to set the IN4 to OUT4 (and EN4 to OUT4) delay period. Leave CDLY4 open for internal propagation delay. MR Capacitor-Adjustable Delay Input 3. Connect an external capacitor from CDLY3 to GND to set the IN3 to OUT3 (and EN3 to OUT3) delay period. Leave CDLY3 open for internal propagation delay. Capacitor-Adjustable Delay Input 2. Connect an external capacitor from CDLY2 to GND to set the IN2 to OUT2 (and EN2 to OUT2) delay period. Leave CDLY2 open for internal propagation delay. Capacitor-Adjustable Delay Input 1. Connect an external capacitor from CDLY1 to GND to set the IN1 to OUT1 (and EN1 to OUT1) delay period. Leave CDLY1 open for internal propagation delay. Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane. Detailed Description The MAX16041/MAX16042/MAX16043 are low-voltage, accurate, dual-/triple-/quad-voltage microprocessor (µP) supervisors in a small TQFN package. These devices provide supervisory and sequencing functions for complex multivoltage systems. The MAX16041 monitors two voltages, the MAX16042 monitors three voltages, and the MAX16043 monitors four voltages. The MAX16041/MAX16042/MAX16043 offer independent outputs and enable functions for each monitored voltage. This configuration allows the device to operate as four separate supervisory circuits or be daisy-chained together to allow controlled sequencing of power supplies during power-up initialization. When all of the monitored voltages exceed their respective thresholds, an independent reset output deasserts to allow the system processor to operate. These devices offer enormous flexibility as there are nine threshold options that are selected through two threshold-select logic inputs. Each monitor circuit also offers an independent enable input to allow both digital and analog control of each monitor output. A tolerance select input allows these devices to be used in systems requiring 5% or 10% power-supply tolerances. In addition, the time delays and reset timeout can be adjusted using small capacitors. There is also a fixed 140ms minimum reset timeout feature. _______________________________________________________________________________________ 7 MAX16041/MAX16042/MAX16043 Pin Description (continued) MAX16041/MAX16042/MAX16043 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits TH0 IN1 TH1 EN4 EN3 EN2 EN1 DELAY THRESHOLD SELECT LOGIC 250nA LOGIC DRIVER OUT1 DRIVER OUT2 DRIVER OUT3 DRIVER OUT4 DRIVER RESET 1V IN2 MAX16043 DELAY IN3 DELAY IN4 DELAY GND RESET DELAY LOGIC TOL REFERENCE VCC CDLY1 CDLY2 CDLY3 CDLY4 CRESET MR Figure 1. MAX16043 Simplified Functional Diagram 8 _______________________________________________________________________________________ Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits MAX16041/MAX16042/MAX16043 VCC VUVLO IN_ VTH VTH t < tON EN_ OUT_ tDELAY- tON tON tDELAY+ tOFF tRST_DELAY tRP tRP tRP RESET Figure 2. Timing Diagram (CDLY_ Open) Applications Information shown in Figure 3 and use the following equation to calculate the threshold voltage: Tolerance The MAX16041/MAX16042/MAX16043 feature a pinselectable threshold tolerance. Connect TOL to GND to select the thresholds 5% below the nominal value. Connect TOL to VCC to select the threshold tolerance 10% below the nominal voltage. Do not leave TOL unconnected. Adjustable Input These devices offer several monitoring options with both fixed and/or adjustable reset thresholds (see Table 2). For the adjustable threshold inputs, the threshold voltage (VTH) at each adjustable IN_ input is typically 0.5V (TOL = GND) or 0.472V (TOL = VCC). To monitor a voltage VINTH, connect a resistive divider network to the circuit as R1 ⎞ ⎛ VINTH = VTH × ⎜1 + ⎟ ⎝ R2 ⎠ Choosing the proper external resistors is a balance between accuracy and power use. The input to the voltage monitor is a high-impedance input with a small 100nA leakage current. This leakage current contributes to the overall error of the threshold voltage where the output is asserted. This induced error is proportional to the value of the resistors used to set the threshold. With lower value resistors, this error is reduced, but the amount of power consumed in the resistors increases. _______________________________________________________________________________________ 9 MAX16041/MAX16042/MAX16043 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits OUT_ Output VINTH R1 The MAX16041/MAX16042/MAX16043 feature open-drain outputs. An OUT_ goes low when its respective IN_ input voltage drops below its specified threshold or when its EN_ goes low (see Table 1). OUT_ goes high when EN_ is high and VIN_ is above its threshold after a time delay. Open-drain outputs require an external pullup resistor to any voltage from 0 to 28V. MAX16041 MAX16042 MAX16043 IN_ R2 Table 1. Output State* EN_ VTH VINTH -1 R1 = R2 x VTH ( ) Figure 3. Setting the Adjustable Input The following equation is provided to help estimate the value of the resistors based on the amount of acceptable error: e × VINTH R1 = A IL where eA is the fraction of the maximum acceptable absolute resistive divider error attributable to the input leakage current (use 0.01 for ±1%), VINTH is the voltage at which the output (OUT_) should assert, and IL is the worst-case IN_ leakage current (see the Electrical Characteristics). Calculate R2 as follows: VTH × R1 R2 = VINTH − VTH Unused Inputs Connect any unused IN_ and EN_ inputs to VCC. 10 IN_ OUT_ Low VIN_ < VTH Low High VIN_ < VTH Low Low VIN_ > VTH Low High VIN_ > VTH OUT_ = high impedance *When VCC falls below the UVLO, all outputs go low regardless of the state of EN_ and VIN_. The outputs are guaranteed to be in the correct state for VCC down to 1.2V. Table 2. Input-Voltage Threshold Selector TH1/TH0 LOGIC IN1 (ALL IN2 (ALL IN3 IN4 VERSIONS) VERSIONS) (MAX16042) (MAX16043) (V) (V) (V) (V) Low/Low 3.3 2.5 1.8 1.5 Low/High 3.3 1.8 Adj Adj Adj Low/Open 3.3 1.5 Adj High/Low 3.3 1.2 1.8 2.5 High/High 2.5 1.8 Adj Adj High/Open 3.3 Adj 2.5 Adj Open/Low 3.3 Adj Adj Adj Open/High 2.5 Adj Adj Adj Open/Open Adj Adj Adj Adj RESET Output RESET asserts low when any of the monitored voltages (IN_) falls below its respective threshold, any EN_ goes low, or MR is asserted. RESET remains asserted for the reset timeout period after all of the monitored voltages exceed their respective thresholds, all EN_ are high, all OUT_ are high, and MR is deasserted. All devices have a push-pull, active-low reset output. ______________________________________________________________________________________ Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits All of these parts offer an internally fixed reset timeout (140ms min) by connecting CRESET to VCC. The reset timeout can also be adjusted by connecting a capacitor from CRESET to GND. When the voltage at CRESET reaches 0.5V, RESET goes high. When RESET goes high, CRESET is immediately held low. Calculate the reset timeout period as follows: V tRP = TH−RESET × CCRESET + 30 × 10 −6 ICH−RESET where VTH-RESET is 0.5V, ICH-RESET is 0.5µA, tRP is in seconds, and CCRESET is in Farads. To ensure timing accuracy and proper operation, minimize leakage at CCRESET. Adjustable Delay (CDLY_) When VIN rises above VTH with EN_ high, the internal 250nA current source begins charging an external capacitor connected from CDLY_ to GND. When the voltage at CDLY_ reaches 1V, OUT_ goes high. When OUT_ goes high, CDLY_ is immediately held low. Adjust the delay (tDELAY) from when VIN rises above VTH (with EN_ high) to OUT_ going high according to the equation: V tDELAY = TH− CDLY × CCDLY + 35 × 10 −6 ICH− CDLY where VTH-CDLY is 1V, ICH-CDLY is 0.25µA, CCDLY is in Farads, and tDELAY is in seconds. To ensure timing accuracy and proper operation, minimize leakage at CDLY. Manual-Reset Input (MR) Many µP-based products require manual-reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic-low on MR asserts RESET low. RESET remains asserted while MR is low and during the reset timeout period (140ms fixed or capacitor adjustable) after MR returns high. The MR input has a 500nA internal pullup, so it can be left unconnected, if not used. MR can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual-reset function. External debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. Pullup Resistor Values The exact value of the pullup resistors for the opendrain outputs is not critical, but some consideration should be made to ensure the proper logic levels when the device is sinking current. For example, if VCC = 2.25V and the pullup voltage is 28V, keep the sink current less than 0.5mA as shown in the Electrical Characteristics. As a result, the pullup resistor should be greater than 56kΩ. For a 12V pullup, the resistor should be larger than 24kΩ. Note that the ability to sink current is dependent on the VCC supply voltage. Power-Supply Bypassing The device operates with a VCC supply voltage from 2.2V to 28V. When VCC falls below the UVLO threshold, all the outputs go low and stay low until VCC falls below 1.2V. For noisy systems or fast rising transients on VCC, connect a 0.1µF ceramic capacitor from VCC to GND as close to the device as possible to provide better noise and transient immunity. Ensuring Valid Reset Output with VCC Down to 0V When VCC falls below 1.2V, the ability for the output to sink current decreases. To ensure a valid output as VCC falls to 0V, connect a 100kΩ resistor from RESET to GND. Typical Application Circuits Figures 4 and 5 show typical applications for the MAX16041/MAX16042/MAX16043. In high-power applications, using an n-channel device reduces the loss across the MOSFETs as it offers a lower drain-to-source on-resistance. However, an n-channel MOSFET requires a sufficient VGS voltage to fully enhance it for a low R DS_ON. The application in Figure 4 shows the MAX16042 configured in a multiple-output sequencing application. Figure 5 shows the MAX16043 in a powersupply sequencing application using n-channel MOSFETs. ______________________________________________________________________________________ 11 MAX16041/MAX16042/MAX16043 Adjustable Reset Timeout Period (CRESET) MAX16041/MAX16042/MAX16043 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits 3.3V +1.8V +2.5V IN DC-DC IN OUT DC-DC +1.5V OUT IN EN EN IN1 EN1 OUT1 DC-DC OUT EN IN2 EN2 OUT2 EN3 VCC IN3 OUT3 TH0 TH1 MAX16042 MR SYSTEM RESET RESET CDLY1 CDLY3 CDLY2 GND CRESET TOL Figure 4. Sequencing Multiple-Voltage System 12V BUS 1.5V 1.8V TO LOADS 2.5V 3.3V VCC IN1 OUT1 IN2 OUT2 IN3 IN4 OUT3 OUT4 EN1 EN2 MAX16043 EN3 RESET EN4 CDLY1 CDLY2 CDLY3 CDLY4 CRESET GND TOL TH0 TH1 MR Figure 5. Multiple-Voltage Sequencing Using n-Channel FETs 12 ______________________________________________________________________________________ SYSTEM RESET Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits RESET OUT1 OUT2 TH0 RESET OUT1 OUT2 OUT3 TH0 TOP VIEW 12 11 10 9 15 14 13 12 11 7 EN2 6 EN1 5 GND CRESET 17 9 EN3 8 EN2 CDLY2 19 7 EN1 CDLY1 20 6 GND 3 4 TOL + MAX16042 1 VCC 2 IN2 VCC 1 IN1 CDLY1 16 + TH1 CDLY3 18 MAX16041 CDLY2 15 10 TQFN (4mm x 4mm) 2 3 4 5 TOL CRESET 14 MR 16 IN3 TH1 IN2 8 IN1 MR 13 TQFN (4mm x 4mm) Chip Information PROCESS: BICMOS ______________________________________________________________________________________ 13 MAX16041/MAX16042/MAX16043 Pin Configurations (continued) Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 24L QFN THIN.EPS MAX16041/MAX16042/MAX16043 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 14 ______________________________________________________________________________________ E 1 2 Dual-/Triple-/Quad-Voltage, CapacitorAdjustable, Sequencing/Supervisory Circuits PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 E 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. MAX16041/MAX16042/MAX16043 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)