INTEGRATED CIRCUITS 74ALVT16500 2.5V/3.3V 18-bit universal bus transceiver (3-State) Product specification Replaces data of 1997 May 12 IC23 Data Handbook 1998 Feb 13 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) FEATURES 74ALVT16500 DESCRIPTION • 18-bit bidirectional bus interface • 5V I/O Compatible • 3-State buffers • Output capability: +64mA/-32mA • TTL input and output switching levels • Input and output interface capability to systems at 5V supply • Bus-hold data inputs eliminate the need for external pull-up The 74ALVT16500 is a high-performance BiCMOS product designed for VCC operation at 2.5V and 3.3V with I/O compatibility up to 5V. This device is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is High. When LEAB is Low, the A data is latched if CPAB is held at a High or Low logic level. If LEAB is Low, the A-bus data is stored in the latch/flip-flop on the High-to-Low transition of CPAB. When OEAB is High, the outputs are active. When OEAB is Low, the outputs are in the high-impedance state. resistors to hold unused inputs • Live insertion/extraction permitted • Power-up reset • Power-up 3-State • No bus current loading when output is tied to 5V bus • Negative edge-triggered clock inputs • Latch-up protection exceeds 500mA per JEDEC JC40.2 Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active High, and OEBA is active Low). Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. and 200V per Machine Model QUICK REFERENCE DATA SYMBOL TYPICAL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER UNIT 2.5V 3.3V 1.9 2.4 1.5 1.8 ns 4 4 pF tPLH tPHL Propagation delay An to Bn or Bn to An CL = 50pF CIN Input capacitance DIR, OE VI = 0V or VCC CI/O I/O pin capacitance Outputs disabled; VI/O = 0V or VCC 8 8 pF ICCZ Total supply current Outputs disabled 40 60 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 56-Pin Plastic SSOP Type III –40°C to +85°C 74ALVT16500 DL AV16500 DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVT16500 DGG AV16500 DGG SOT364-1 PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION 1 OEAB A-to-B Output enable input B-to-A Output enable input (active low) 27 OEBA 2, 28 LEAB/LEBA A-to-B/B-to-A Latch enable input 55,30 CPAB/CPBA A-to-B/B-to-A Clock input (active falling edge) 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21, 23, 24, 26 A0-A17 Data inputs/outputs (A side) 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33, 31 B0-B17 Data inputs/outputs (B side) 4, 11, 18, 25, 29, 32, 39, 46, 53, 56 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage 1998 Feb 13 2 853-1980 18959 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) OEAB 1 56 GND LEAB 2 55 CPAB A0 3 54 B0 GND 4 53 GND A1 5 52 B1 A2 6 51 B2 VCC 7 50 VCC A3 8 49 B3 A4 9 48 B4 A5 10 47 B5 GND 11 46 GND A6 12 45 B6 5 52 A7 13 44 B7 6 51 A8 14 43 B8 8 49 A9 15 42 B9 9 48 A10 16 41 B10 10 47 A11 17 40 B11 12 45 GND 18 39 GND 13 44 A12 19 38 B12 14 43 A13 20 37 B13 15 42 A14 21 36 B14 16 41 VCC 22 35 VCC 17 40 A15 23 34 B15 19 38 A16 24 33 B16 20 37 GND 25 32 GND 21 36 A17 26 31 B17 23 34 OEBA 27 30 CPBA 24 33 LEBA 28 29 GND 26 31 1 2 OEAB CPAB LEAB LEBA OEBA CPBA 1 28 3 5 B2 A2 6 49 B3 A3 8 48 B4 A4 9 47 B5 A5 10 45 B6 A6 12 44 B7 A7 13 43 B8 A8 14 42 B9 A9 15 41 B10 A10 16 40 B11 A11 17 38 B12 A12 19 37 B13 A13 20 36 B14 A14 21 34 B15 A15 23 33 B16 A16 24 31 B17 A17 26 51 3D 1 1 4 1 6D 54 SW00036 3 B1 5C6 C6 G5 A1 B0 52 EN4 30 A0 54 2C3 C3 G2 27 LOGIC SYMBOL 30 28 27 55 2 EN1 55 SW00035 SW00034 1998 Feb 13 74ALVT16500 3 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 FUNCTION TABLE INPUTS Internal OUTPUTS OEAB LEAB CPAB An Registers Bn L H X X X Z L ↓ X h H Z L ↓ X I L Z L L H or L X NC Z L L ↓ h H Z L L ↓ I L Z H H X H H H H H X L L L H ↓ X h H H H ↓ X I L L H L ↓ h H H H L ↓ I L L H L H or L X H H H L H or L X L L OPERATING MODE Disabled Disabled Latch data Disabled, Disabled, Hold data Disabled Clock data Disabled, Transparent Latch data & display Clock data & display Hold data & display NOTE: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA, and CPBA. H = High voltage level h = High voltage level one set-up time prior to the Enable or Clock transition L = Low voltage level I = Low voltage level one set-up time prior to the Enable or Clock transition NC= No Change X = Don’t care Z = High Impedance ”off” state ↓ = High-to-Low Enable or Clock transition 1998 Feb 13 4 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 LOGIC DIAGRAM OEAB LEBA CPBA CPAB LEAB OEBA 1 28 30 55 2 27 C1 C1 ID ID 54 AO B0 3 1 of 18 channels C1 C1 ID ID To 17 other channels SW00037 1998 Feb 13 5 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC IIK RATING UNIT –0.5 to +4.6 V –50 mA –0.5 to +7.0 V VO < 0 –50 mA Output in Off or High state –0.5 to +7.0 V Output in Low state 128 Output in High state –64 DC supply voltage DC input diode current VI < 0 voltage3 VI DC input IOK DC output diode current VOUT CONDITIONS DC output voltage3 IOUT O DC output current mA Tstg Storage temperature range –65 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC 2.5V RANGE LIMITS PARAMETER DC supply voltage 3.3V RANGE LIMITS UNIT MIN MAX MIN MAX 2.3 2.7 3.0 3.6 V 0 5.5 0 5.5 V VI Input voltage VIH High-level input voltage VIL Input voltage 0.7 0.8 V IOH High-level output current –8 –32 mA Low-level output current 8 32 Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 24 64 ∆t/∆v Input transition rise or fall rate; Outputs enabled 10 10 ns/V Tamb Operating free-air temperature range +85 °C IOL 1998 Feb 13 1.7 –40 6 2.0 +85 –40 V mA Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 DC ELECTRICAL CHARACTERISTICS (3.3V 0.3V RANGE) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VOH High-level out output ut voltage VOL VRST VCC = 3.0V; IIK = –18mA VCC = 3.0 to 3.6V; IOH = –100µA VCC = 3.0V; IOH = –32mA Low–level out output ut voltage Power-up output low voltage7 Input In ut leakage current IHOLD IEX IPU/PD Off current Bus Hold current Data inputs6 VCC–0.2 VCC 2.0 2.3 V 0.2 VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.4 0.55 V VCC = 3.6V; IO = 1mA; VI = VCC or GND 0.55 Control pins VCC = 0 or 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC V Data pins ins4 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V 0.1 ±1 0.1 10 0.5 1 0.1 -5 0.1 ±100 75 130 VCC = 3V; VI = 2.0V –75 –140 VCC = 0V to 3.6V; VCC = 3.6V ±500 V µA µA µA VO = 5.5V; VCC = 3.0V 10 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC OE/OE = Don’t care 1 ±100 µA 0.06 0.1 4 5 0.06 0.1 0.04 0.4 VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 Quiescent supply current ICCZ ∆ICC –1.2 UNIT Current into an output in the High state when VO > VCC ICCH ICCL –0.85 0.07 VCC = 3.6V; VI = 0V IOFF MAX VCC = 3.0V; IOL = 100µA VCC = 3.6V; VI = VCC or GND II TYP1 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = Additional supply current per input pin2 VCC = 3V to 3.6V; One input at VCC–0.6V, Other inputs at VCC or GND 05 mA mA NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. 6. This is the bus hold overdrive current required to force the input to the opposite logic state. 7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 1998 Feb 13 7 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 AC CHARACTERISTICS (3.3V 0.3V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 3.3V ±0.3V WAVEFORM TYP1 MIN UNIT MAX fMAX Maximum clock frequency 1 150 MHz tPLH tPHL Propagation delay An to Bn or Bn to An 2 1.0 1.0 1.5 1.8 2.3 2.7 ns tPLH tPHL Propagation delay Clock Low or High LEAB to Bn or LEBA to An 3 1.5 1.5 2.3 3.3 3.6 4.8 ns tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 1.5 1.5 2.5 3.1 4.0 4.6 ns tPZH tPZL Output enable time to High and Low level 5 6 1.5 1.5 2.3 1.4 3.3 2.3 ns tPHZ tPLZ Output disable time from High and Low Level 5 6 1.5 1.5 2.8 2.3 4.3 3.6 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENTS (3.3V 0.3V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V MIN TYP1 UNIT ts(H) ts(L) Setup time, High or Low An to CPAB or Bn to CPBA 4 1.9 2.0 1.0 1.0 ns th(H) th(L) Hold time, High or Low An to CPAB or Bn to CPBA 4 0 0 –0.9 –0.9 ns ts(H) ts(L) Setup time, High or Low An to LEAB or Bn to LEBA 4 0.0 0.3 –1.0 –0.3 ns th(H) th(L) Hold time, High or Low An to LEAB or Bn to LEBA 4 1.2 1.2 0.4 0.4 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 1.0 1.0 ns tw(H) LEAB or LEBA pulse width, High 3 1.0 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 1998 Feb 13 8 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 DC ELECTRICAL CHARACTERISTICS (2.5V 0.2V RANGE) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIK Input clamp voltage VOH High-level out output ut voltage VOL VRST VCC = 2.3V; IIK = –18mA VCC = 2.3 to 3.6V; IOH = –100µA Power-up output low voltage7 Input In ut leakage current –0.85 –1.2 0.07 0.2 0.3 0.5 VCC = 2.3V; IOL = 8mA 0.4 VCC = 2.7V; IO = 1mA; VI = VCC or GND 0.55 Control pins VCC = 0 or 2.7V; VI = 5.5V Data pins ins4 VCC = 2.7V; VI = 0 V V VCC = 2.3V; IOL = 24mA VCC = 2.7V; VI = VCC UNIT 1.8 VCC = 2.3V; IOL = 100µA VCC = 2.7V; VI = VCC or GND II MAX VCC–0.2 VCC = 2.3V; IOH = –8mA Low-level output voltage TYP1 0.1 ±1 0.1 10 0.1 1 V V µA 0.1 -5 Off current VCC = 0V; VI or VO = 0 to 4.5V 0.1 100 Bus Hold current VCC = 2.3V; VI = 0.7V 90 Data inputs6 VCC = 2.3V; VI = 1.7V –10 Current into an output in the High state when VO > VCC VO = 5.5V; VCC = 2.3V 10 125 µA Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC OE/OE = Don’t care 1 100 µA IOZH 3-State output High current VCC = 2.7V; VO = 2.3V; VI = VIL or VIH 0.5 5 µA IOZL 3-State output Low current VCC = 2.7V; VO = 0.5V; VI = VIL or VIH 0.5 –5 µA VCC = 2.7V; Outputs High, VI = GND or VCC, IO = 0 0.04 0.1 VCC = 2.7V; Outputs Low, VI = GND or VCC, IO = 0 2.3 4.5 VCC = 2.7V; Outputs Disabled; VI = GND or VCC, IO = 05 0.04 0.1 VCC = 2.3V to 2.7V; One input at VCC–0.6V, Other inputs at VCC or GND 0.04 0.4 IOFF IHOLD IEX IPU/PD ICCH ICCL Quiescent supply current ICCZ ∆ICC Additional supply current per input pin2 µA µA mA mA NOTES: 1. All typical values are at VCC = 2.5V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 2.5V ± 0.3V a transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. 6. Not guaranteed. 7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 1998 Feb 13 9 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 AC CHARACTERISTICS (2.5V 0.2V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 2.5V ±0.2V WAVEFORM TYP1 MIN UNIT MAX fMAX Maximum clock frequency 1 150 MHz tPLH tPHL Propagation delay An to Bn or Bn to An 2 1.0 1.0 1.9 2.4 3.1 3.5 ns tPLH tPHL Propagation delay Clock Low or High LEAB to Bn or LEBA to An 3 1.5 2.0 2.9 4.3 4.6 6.7 ns tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 2.0 2.0 3.4 4.2 5.3 6.3 ns tPZH tPZL Output enable time to High and Low level 5 6 1.5 1.0 2.6 1.6 4.1 2.5 ns tPHZ tPLZ Output disable time from High and Low Level 5 6 1.5 1.0 2.7 2.1 4.1 3.2 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC SETUP REQUIREMENTS (2.5V 0.2V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.5V ±0.2V MIN TYP1 UNIT ts(H) ts(L) Setup time, High or Low An to CPAB or Bn to CPBA 4 2.3 3.4 0.8 1.4 ns th(H) th(L) Hold time, High or Low An to CPAB or Bn to CPBA 4 0 0 –1.2 –0.9 ns ts(H) ts(L) Setup time, High or Low An to LEAB or Bn to LEBA 4 0 1.0 –0.7 0 ns th(H) th(L) Hold time, High or Low An to LEAB or Bn to LEBA 4 1.0 1.4 0.1 0.7 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 1.5 1.5 ns tw(H) LEAB or LEBA pulse width, High 3 1.5 ns NOTE: 1. All typical values are at VCC = 2.5V and Tamb = 25°C. 1998 Feb 13 10 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 AC WAVEFORMS NOTES: 1. VM = 1.5V at VCC w 3.0V, VM = VCC/2 at VCC v 2.7V 2. VX = VOL + 0.3V at VCC w 3.0V, VX = VOL + 0.15V at VCC v 2.7V 3. VY = VOH – 0.3V at VCC w 3.0V, VY = VOH – 0.15V at VCC v 2.7V 1/fMAX CPBA or CPAB VM VM ÉÉÉ ÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉ ÉÉÉ 3.0V or VCC, whichever is less An or Bn 3.0V or VCC, whichever is less VM VM VM VM 0V 0V tW(L) tPHL tS(H) tW(H) tPLH CPAB or CPBA or LEAB or LEBA VOH An or Bn VM VM th(H) th(L) tS(L) 3.0V or VCC, whichever is less VM VM 0V VOL SW00178 SW00175 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency An or Bn VM Waveform 4. Data Setup and Hold Times OEBA 3.0V or VCC, whichever is less VM VM VM OEAB 3.0V or VCC, whichever is less 0V 0V tPLH tPZH tPHL tPHZ VOH VOH VM An or Bn VY VM An or Bn VM 0V VOL SW00176 SW00226 Waveform 2. Propagation Delay, Transparent Mode LEAB or LEBA VM VM Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level 3.0V or VCC, whichever is less VM OEBA VM 0V tW(H) VM 3.0V or VCC, whichever is less OEAB tPLH 0V tPHL VOH tPZL An or Bn VM tPLZ VM 3.0V or VCC An or Bn VOL SW00177 VM VX VOL Waveform 3. Propagation Delay, Enable to Output, and Enable Pulse Width SW00227 Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1998 Feb 13 11 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 TEST CIRCUIT AND WAVEFORMS 6.0V or VCC x 2 VCC Open VOUT VIN PULSE GENERATOR tW 90% RL GND VM NEGATIVE PULSE 10% 0V tTHL (tF) CL VIN VM 10% D.U.T. RT 90% tTLH (tR) tTLH (tR) RL 90% POSITIVE PULSE Test Circuit for 3-State Outputs tTHL (tF) VIN 90% VM VM 10% 10% tW 0V SWITCH POSITION TEST SWITCH tPLZ/tPZL 6V or VCC x 2 tPLH/tPHL Open tPHZ/tPZH GND INPUT PULSE REQUIREMENTS DEFINITIONS FAMILY Amplitude RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance: See AC CHARACTERISTICS for value. 74ALVT16 Rep. Rate 3.0V or VCC whichever v10MHz is less tW 500ns tR tF v2.5ns v2.5ns RT = Termination resistance should be equal to ZOUT of pulse generators. SW00025 1998 Feb 13 12 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm 1998 Feb 13 13 74ALVT16500 SOT371-1 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm 1998 Feb 13 14 74ALVT16500 SOT364-1 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) NOTES 1998 Feb 13 15 74ALVT16500 Philips Semiconductors Product specification 2.5V/3.3V 18-bit universal bus transceiver (3-State) 74ALVT16500 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 16 Date of release: 05-96 9397-750-03566