19-1271; Rev 0; 8/97 12-Bit, 100Msps ECL DAC ____________________________Features ♦ 12-Bit, 100Msps DAC The MAX5012 is an ECL-compatible device. It features a fast 13ns settling time and low 15pV-s glitch impulse energy, which results in excellent spurious-free dynamic range characteristics. The MAX5012 is available in a 28-pin plastic DIP or PLCC package in the -40°C to +85°C extended-industrial temperature range. ♦ 40MHz Multiplying Bandwidth ________________________Applications Fast-Frequency-Hopping Spread-Spectrum Radios Direct-Sequence Spread-Spectrum Radios Digital RF/IF Modulation Microwave and Satellite Modems ♦ ECL-Compatible Inputs ♦ Low Power: 600mW ♦ 1/2LSB DNL ♦ Extended-Industrial Temperature Range ♦ Superior Performance over AD9712: Improved Settling Time: 13ns Improved Glitch Energy: 15pV-s Master/Slave Latches ______________Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX5012AEPI MAX5012BEPI MAX5012AEQI -40°C to +85°C -40°C to +85°C -40°C to +85°C 28 Plastic DIP 28 Plastic DIP 28 PLCC MAX5012BEQI -40°C to +85°C 28 PLCC Test and Measurement Instrumentation Pin Configurations appear at end of data sheet. _________________________________________________________Functional Diagram MAX5012 ________________________________________________________________ Maxim Integrated Products For the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 408-737-7600 ext. 3468. 1 MAX5012 _______________General Description The MAX5012 is a 12-bit, 100Msps digital-to-analog converter (DAC) designed for digital modulation, direct digital synthesis, high-resolution imaging, and arbitrarywaveform-generation applications. This device is pinfor-pin compatible with the AD9712 with significantly improved settling time and glitch-energy performance. MAX5012 12-Bit, 100Msps ECL DAC ABSOLUTE MAXIMUM RATINGS Supply Voltages Negative Supply Voltage (VEE) .............................................-7V A/D Ground Voltage Differential..........................................0.5V Input Voltages Digital Input Voltage (D1–D12, Latch Enable) ............0V to VEE Control Amp Input Voltage Range...............................0V to -4V Reference Input Voltage Range (VREF) ..................-3.7V to VEE Output Currents Internal-Reference Output Current .................................500µA Control-Amplifier Output Current..................................±2.5mA Continuous Power Dissipation Plastic DIP (derate 14.29mW/°C above +70°C) .............1.14W PLCC (derate 10.53mW/°C above +70°C) ...................842mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10sec) .............................+300°C Storage Temperature Range .................................-65 to +150°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VEE = -5.2V, RSET = 7.5kΩ, CONTROL AMP IN = REF OUT, VOUT = 0V, TA = TMIN - TMAX, unless otherwise noted.) PARAMETER CONDITIONS TEST LEVEL MIN MAX5012A TYP MAX MIN MAX5012B TYP MAX UNITS DC PERFORMANCE Performance Resolution 12 I Differential Nonlinearity Max at full temperature Best fit ±0.5 VI I ±0.75 Max at full temperature VI Output Capacitance TA = +25°C V 10 I 1.0 Gain-Error Tempco Zero-Scale Offset Error TA = +25°C VI Full temperature V 150 TA = +25°C I 0.5 ±1.0 ±1.0 10 5.0 1.0 5.0 150 0.5 5.0 % F.S. ppm/°C 2.5 5.0 0.01 LSB pF 8.0 2.5 LSB ±1.5 ±2.0 8.0 VI Bits ±1.25 ±2.0 ±1.75 Full temperature Full temperature ±1.0 ±1.5 Integral Nonlinearity Gain Error (Note 1) 12 ±0.75 Offset Drift Coefficient Full temperature V Output Compliance Voltage TA = +25°C IV -1.2 Equivalent Output Resistance TA = +25°C IV 0.8 Conversion Rate TA = +25°C IV 100 Settling Time (tST) (Note 2) TA = +25°C V 13 13 ns Output Propagation Delay (tD) (Note 3) TA = +25°C V 1 1 ns Glitch Energy (Note 4) TA = +25°C V 15 15 pV-s Full-Scale Output Current (Note 5) TA = +25°C V 20.48 20.48 mA Spurious-Free Dynamic Range TA = +25°C 70 70 68 68 68 68 68 68 2 2 1.0 0.01 µA 2.0 -1.2 1.2 0.8 1.0 µA/°C 2.0 V 1.2 kΩ DYNAMIC PERFORMANCE Dynamic Performance 1.23MHz; 10Msps 5.055MHz; 20Msps 2MHz span 10.1MHz; 50Msps 16MHz; 40Msps Rise/Fall Time 2 V 10MHz span RL = 50Ω V 100 Msps _______________________________________________________________________________________ dBc dBc ns 12-Bit, 100Msps ECL DAC (VEE = -5.2V, RSET = 7.5kΩ, CONTROL AMP IN = REF OUT, VOUT = 0V, TA = TMIN - TMAX, unless otherwise noted.) PARAMETERS CONDITIONS TEST LEVEL MIN IV -5.46 MAX5012A TYP MAX MIN MAX5012B TYP MAX UNITS POWER-SUPPLY REQUIREMENTS Negative Supply Voltage Negative Supply Current (-5.2V) TA = +25°C I Full temperature -4.94 115 140 VI Nominal Power Dissipation Power-Supply Rejection Ratio -5.2 ±5% of VEE, external reference, TA = +25°C -5.46 -5.2 -4.94 V 115 140 mA mA 148 V 600 I 30 148 600 100 30 mW 100 µA/V VOLTAGE INPUT AND CONTROL Reference Input Impedance TA = +25°C V 3 3 kΩ Reference Multiplying Bandwidth TA = +25°C V 40 40 MHz Internal Reference Voltage VI Internal Reference Voltage Drift -1.15 -1.20 -1.25 -1.15 -1.20 -1.25 V V 50 50 Amplifier Input Impedance TA = +25°C V 3 3 ppm/°C MΩ Amplifier Input Bandwidth TA = +25°C V 1 1 MHz Logic 1 Voltage Full temperature VI -1.0 -0.8 -1.0 -0.8 V Logic 0 Voltage Full temperature VI -1.7 -1.5 -1.7 -1.5 Logic 1 Current Full temperature VI Logic 0 Current Full temperature VI Input Capacitance TA = +25°C V TA = +25°C IV 3 Full temperature IV 3.5 TA = +25°C IV 0.5 Full temperature IV 0.5 TA = +25°C IV 5.0 DIGITAL INPUTS Input Setup Time (tS) Input Hold Time (tH) Latch Pulse Width (tPWL, tPWH) Note 1: Note 2: Note 3: Note 4: 20 10 3 2 3 0.5 5.0 10 µA pF 2 ns ns 0 0.5 4.0 µA 3 3.5 0 V 20 ns ns 4.0 ns Gain is measured as a ratio of the full-scale current to ISET. The ratio is nominally 128. Measured as voltage at mid-scale transition to ±0.024%; RL = 50Ω. Measured from the rising edge of Latch Enable to where the output signal has left a 1LSB error band. Glitch is measured as the largest single transient. Note 5: Calculated using IFS = 128 x Control Amp In RSET TEST LEVEL CODES All electrical characteristics are subject to the following conditions: All parameters having min/max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality Assurance inspection. Any black section in the data column indicates that the specification is not tested at the specified condition. TEST LEVEL I II III IV V VI TEST PROCEDURE 100% production tested at the specified temperature. 100% production tested at TA = +25°C, and sample tested at the specified temperatures. QA sample tested only at the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for information purposes only. 100% production tested at TA = +25°C. Parameter is guaranteed over specified temperature range. _______________________________________________________________________________________ 3 MAX5012 ELECTRICAL CHARACTERISTICS (continued) MAX5012 12-Bit, 100Msps ECL DAC ______________________________________________________________Pin Description PIN NAME 1–10 D2–D11 11 D12 (LSB) Digital Input Bit 12 (LSB) 12, 21 Digital VEE Digital Negative Supply (-5.2V) 13 Analog Return Analog Return Ground 14 IOUT Analog Current Output 15, 25 Analog VEE 16 I OUT Complementary Analog Current Output 17 Ref In Voltage Reference Input 18 Control Amp Out 19 Control Amp In 20 Ref Out 22 Ref GND 23 N.C. No Connection. Not internally connected. 24 RSET* Connection for External Resistance Reference. RSET is used with the internal amplifier (nominally 7.5kΩ). 26 Latch Enable _ 27 DGND 28 D1 (MSB) FUNCTION Digital Input Bits 2–11 Analog Negative Supply (-5.2V) Internal Control Amplifier Output. Control Amp Out is normally connected to Ref In. Internal Control Amplifier Input. Control Amp In is normally connected to Ref Out (if not connected to external reference). Internal Voltage Reference Output. Ref Out is normally connected to Control Amp In. Ground Return for Internal Voltage Reference and Amplifier Latch Control Line Digital Ground Return Digital Input Bit 1 (MSB) *Full-Scale Current Out = 128 (Control Amp In/RSET) Figure 1. Timing Diagram 4 _______________________________________________________________________________________ 12-Bit, 100Msps ECL DAC MAX5012 MAX5012 Figure 2. Typical Interface Circuit _______________________________________________________________________________________ 5 12-Bit, 100Msps ECL DAC MAX5012 __________________________________________________________Pin Configurations TOP VIEW 25 D6 24 RSet D7 6 23 N/C D8 7 5 25 Analog VEE D7 6 24 RSet D8 7 23 N/C D6 PDIP MAX5012 22 Ref GND D9 8 21 Digital VEE D10 9 20 D11 10 19 Ref Out 9 21 Control Amp In D11 10 20 Ref Out (LSB) D12 11 19 Control Amp In 18 Ref In Control Amp Out 15 17 IOut Analog VEE 16 16 IOut Analog VEE 13 15 Analog Return IOut Ref In 14 17 Analog Return 12 13 Digital VEE Digital VEE Control Amp Out MAX5012 12 6 8 18 DIP Ref GND Digital VEE D9 11 14 PLCC 22 D10 (LSB) D12 IOut 26 4 5 Latch Enable D5 27 Latch Enable Analog VEE DGND 26 1 3 28 D4 D2 DGND (MSB) D1 27 D3 2 2 D3 3 D1 (MSB) D4 28 4 1 D5 D2 PLCC _______________________________________________________________________________________ 12-Bit, 100Msps ECL DAC 28L PLCC C Pin 1 Pin 28 H Pin 1 B O TTO M VIEW G TO P VIEW I F E A B D INCHES SYMBOL MIN MILLIMETERS MAX MIN MAX A B 0.450 0.485 0.456 0.495 11.43 12.32 11.58 12.57 C D 45° 0.165 0.175 45° 4.19 4.45 E F G 0.022 typ 0.18 typ .56 typ 4.57 typ 0.25 0.00 0.00 H I 0.05 typ 0.039 1.27 typ 0.99 0.00 10.92 0.010 0.430 _______________________________________________________________________________________ 7 MAX5012 ________________________________________________________Package Information MAX5012 12-Bit, 100Msps ECL DAC ___________________________________________Package Information (continued) 28L Plastic DIP K 28 I 1 J H G A B F C D SYMBOL INCHES MIN MAX A B C D E F G H I J K E MILLIMETERS MIN MAX 0.200 0.120 0.170 0.135 0.020 0.100 0.067 0.013 0.180 0.622 0.555 1.460 0.085 5.08 3.05 4.32 3.43 0.51 2.54 1.70 0.33 4.57 15.80 14.10 37.08 2.16 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.