19-4696; Rev 0; 7/09 Octal-Channel Ultrasound Front-End Features The MAX2077 octal-channel ultrasound front-end is a fully integrated, bipolar, high-density, octal-channel ultrasound receiver optimized for low-cost, high-channel count, high-performance portable and cart-based ultrasound systems. The easy-to-use IC allows the user to achieve high-end 2D and PW imaging capability using substantially less space and power. The highly compact imaging receiver lineup, including a low-noise amplifier (LNA), variable-gain amplifier (VGA), and antialias filter (AAF), achieves an ultra-low 2.4dB noise figure at RS = RIN = 200Ω at a very low 64.8mW perchannel power dissipation. The full imaging receiver channel has been optimized for second-harmonic imaging with -64dBFS second-harmonic distortion performance with a 1VP-P 5MHz output signal and broadband SNR of > 68dB* at 20dB gain. The bipolar front-end has also been optimized for excellent lowvelocity PW and color-flow Doppler sensitivity with an exceptional near-carrier SNR of 140dBc/Hz at 1kHz offset from a 5MHz 1VP-P output clutter signal. The MAX2077 octal-channel ultrasound front-end is available in a small 8mm x 8mm, 56-pin thin QFN or 10mm x 10mm, 68-pin thin QFN package with an exposed pad and is specified over a 0°C to +70°C temperature range. To add CW Doppler capability, replace the MAX2077 with the MAX2078. o 8 Full Channels of LNA, VGA, and AAF in a Small, 8mm x 8mm, 56-Pin or 10mm x 10mm, 68-Pin TQFN Package o Ultra-Low Full-Channel Noise Figure of 2.4dB at RIN = RS = 200Ω o Low Output-Referred Noise of 23nV/√Hz at 5MHz, 20dB Gain, Yielding a Broadband SNR of 68dB* for Excellent Second-Harmonic Imaging o High Near-Carrier SNR of 140dBc/Hz at 1kHz Offset from a 5MHz, 1VP-P Output Signal, and 20dB of Gain for Excellent Low-Velocity PW and Color-Flow Doppler Sensitivity in a High-Clutter Environment o Ultra-Low Power 64.8mW per Full-Channel (LNA, VGA, and AAF) Normal Imaging Mode o Selectable Active Input-Impedance Matching of 50Ω, 100Ω, 200Ω, and 1kΩ o Wide Input-Voltage Range of 330mVP-P in High LNA Gain Mode and 550mVP-P in Low LNA Gain Mode o Integrated Selectable 3-Pole 9MHz, 10MHz, 15MHz, and 18MHz Butterworth AAF o Fast-Recovery, Low-Power Modes (< 2µs) o Pin Compatible with the MAX2078 Ultrasound Front-End with CW Doppler (MAX2077 68-Pin Package Variant) Applications Ordering Information Medical Ultrasound Imaging Sonar PART MAX2077CTN+ Pin Configurations and Typical Application Circuits appear at end of data sheet. TEMP RANGE 0°C to +70°C PIN-PACKAGE 56 Thin QFN-EP** MAX2077CTK+ † 0°C to +70°C 68 Thin QFN-EP** +Denotes a lead(Pb)-free/RoHS-compliant package. **EP = Exposed pad. †Future product—contact factory for availability. *When coupled with the MAX1437B ADC. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX2077 General Description MAX2077 Octal-Channel Ultrasound Front-End ABSOLUTE MAXIMUM RATINGS VCC_ to GND .........................................................-0.3V to +5.5V VCC2 - VCC1 ......................................................................> -0.3V ZF_, IN_, AG to GND ..................................-0.3V to (VCC + 0.3V) INC_ ..............................................................................20mA DC VREF to GND.............................................................-0.3V to +3V IN_ to AG ...............................................................-0.6V to +0.6V OUT_, DIN, DOUT, VG_, NP, CS, CLK, PD to GND ..........................................-0.3V to (VCC1 + 0.3V) VCC_, VREF analog and digital control signals must be applied in this order Input Differential Voltage ................................2.0VP-P differential Continuous Power Dissipation (TA = +70°C) 56-Pin TQFN (derate 47.6mW/°C above +70°C) ..............3.8W 68-Pin TQFN (derate 40.0mW/°C above +70°C) ..............4.0W Operating Temperature Range (Note 1).................0°C to +70°C Junction Temperature ......................................................+150°C θJC (Notes 2, 3) (56-Pin TQFN) ..........................................1°C/W θJC (Notes 2, 3) (68-Pin TQFN) .......................................0.3°C/W θJA (Notes 3, 4) (56-Pin TQFN) ........................................21°C/W θJA (Notes 3, 4) (68-Pin TQFN) ........................................20°C/W Storage Temperature Range .............................-40°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: TC is the temperature on the exposed pad of the package. TA is the ambient temperature of the device and PCB. Note 2: Junction temperature TJ = TC + (θJC x VCC x ICC). This formula can only be used if the component is soldered down to a printed circuit board pad containing multiple ground vias to remove the heat. The junction temperature must not exceed 150°C. Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Note 4: Junction temperature TJ = TA + (θJA x VCC x ICC), assuming there is no heat removal from the exposed pad. The junction temperature must not exceed 150°C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0°C to +70°C, VGND = 0V, NP = 0, PD = 0, no RF signals applied. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, unless otherwise noted.) (Note 5) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 3.3V Supply Voltage VCC1 3.13 3.3 3.47 V 4.75V/5V Supply Voltage VCC2 4.5 4.75 5.25 V External Reference Voltage Range VREF 2.525 V CMOS Input High Voltage VIH Applies to CMOS control inputs CMOS Input Low Voltage VIL Applies to CMOS control inputs 0.8 V 10 μA CMOS Input Leakage Current (Note 6) 2.475 2.5 V I IN 0V to 3.3V Data Output High Voltage DOUT_HI 10M load VCC1 V Data Output Low Voltage DOUT_LO 10M load 0 V 4.75V/5V Supply Standby Current I_NP_5V_TOT NP = 1, all channels 3.9 6 mA 3V Supply Standby Current I_NP_3V_TOT NP = 1, all channels 1.7 3 mA 4.75V/5V Power-Down Current I_PD_5V_TOT PD = 1, all channels (Note 7) 0.4 10 μA 3V Power-Down Current I_PD_3V_TOT PD = 1, all channels (Note 7) 0.3 10 μA 3V Supply Current per Channel I_3V_NM Total I divided by 8, VG+ - VG1 = -2V 11 18 mA 4.75V/5V Supply Current per Channel I_5V_NM Total I divided by 8 6.0 8.3 mA 64.8 105 mW DC Power per Channel Differential Analog Control Voltage Range 2 P_NM VGAIN_RANG VG+ - VG- ±3 _______________________________________________________________________________________ V Octal-Channel Ultrasound Front-End (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0°C to +70°C, VGND = 0V, NP = 0, PD = 0, no RF signals applied. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, unless otherwise noted.) (Note 5) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Common-Mode Voltage for Difference Analog Control VGAIN_COMM (VG+ + VG-)/2 1.65 ±5% Source/Sink Current for Gain Control Pins I_ACONTROL Per pin ±1.6 ±4 μA 9.7 13 μA Reference Current IREF Output Common-Mode Level All channels VCMO V 1.73 V AC ELECTRICAL CHARACTERISTICS (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0°C to +70°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, unless otherwise noted.) (Note 5) PARAMETER CONDITIONS D1/D0 = 0/0, RIN = 50, fRF = 2MHz Input Impedance MIN TYP MAX 47.5 50 60 D1/D0 = 0/1, RIN = 100, fRF = 2MHz D1/D0 = 1/0, RIN = 200, fRF = 2MHz 90 100 115 185 200 220 D1/D0 = 1/1, RIN = 1000, fRF = 2MHz 600 830 1000 RS = RIN = 50, LNA gain = 18.5dB, VG+ - VG- = +3V Noise Figure UNITS 4.5 RS = RIN =100, LNA gain = 18.5dB, VG+ - VG- = +3V 3.4 RS = RIN = 200, LNA gain = 18.5dB, VG+ - VG- = +3V RS = RIN = 1000, LNA gain = 18.5dB, VG+ - VG- = +3V 2.4 dB 2.2 Low-Gain Noise Figure D3/D2/D1/D0 = 0/0/0/1, LNA gain = 12.5dB, RS = RIN = 200, VG+ - VG- = +3V 3.9 Input-Referred Noise Voltage D3/D2/D1/D0 = 1/1/1/0 0.9 nV/Hz Input-Referred Noise Current D3/D2/D1/D0 = 1/1/1/0 2.1 pA/Hz dB Maximum Gain, High Gain Setting VG+ - VG- = +3V 41 42.4 45 dB Minimum Gain, High Gain Setting VG+ - VG- = -3V 9 10.1 12 dB Maximum Gain, Low Gain Setting D3/D2/D1/D0 = 0/0/0/1, RIN = 200, LNA gain = 12.5dB, VG+ - VG- = +3V 35 37.6 39 dB Minimum Gain, Low Gain Setting D3/D2/D1/D0 = 0/0/0/1, RIN = 200, LNA gain = 12.5dB, VG+ - VG- = -3V 3 5.4 8 dB Anti-Aliasing Filter 3dB Corner Frequency Gain Range D5/D4 = 0/0, fC = 9MHz D5/D4 = 0/1, fC = 10MHz 9 10 D5/D4 = 1/0, fC = 15MHz 15 D5/D4 = 1/1, fC = 18MHz VG+ - VG- = -3V to +3V 18 33 MHz dB _______________________________________________________________________________________ 3 MAX2077 DC ELECTRICAL CHARACTERISTICS (continued) MAX2077 Octal-Channel Ultrasound Front-End AC ELECTRICAL CHARACTERISTICS (continued) (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0°C to +70°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, unless otherwise noted.) (Note 5) PARAMETER Absolute Gain Error Input Gain Compression CONDITIONS MIN TYP VG+ - VG- = -2V ±0.4 VG+ - VG- = 0V ±0.4 VG+ - VG- = +2V ±0.4 VG+ - VG- = -3V (VGA minimum gain), gain ratio with 330mVP-P/50mVP-P input tones 1.4 LNA low gain = 12.5dB, VG+ - VG- = -3V (VGA minimum gain), gain ratio with 600mVP-P/50mVP-P 0.8 Gain step up (VIN = 5mV P-P, gain changed from 10dB to 44dB, settling time is measured within 1dB final value) 1.4 MAX UNITS dB dB μs VGA Gain Response Time Gain step down (VIN = 5mVP-P, gain changed from 44dB to 10dB, settling time is measured within 1dB final value) 1.6 VGA Output Offset Under Pulsed Overload Overdrive is ±10mA in clamping diodes, gain at 30dB, 16 pulses at 5MHz, repetition rate 20kHz; offset is measured at output when RF duty cycle is off 180 mV Small-Signal Output Noise 20dB of gain, VG+ - VG- = -0.85V, no input signal 23 nV/Hz Large-Signal Output Noise 20dB of gain, VG+ - VG- = -0.85V, fRF = 5MHz, fNOISE = fRF + 1kHz, V OUT = 1V P-P differential 35 nV/Hz Second Harmonic (HD2) VIN = 50mV P-P, fRF = 2MHz, V OUT = 1VP-P -67 VIN = 50mV P-P, fRF = 5MHz, V OUT = 1VP-P -64.2 dBc High-Gain IM3 Distortion D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), VIN = 50mV P-P, fRF1 = 5MHz, fRF2 = 5.01MHz, VOUT = 1VP-P (Note 8) -52 -61 dBc Low-Gain IM3 Distortion D3/D2/D1/D0 = 0/0/0/1 (RIN = 200, LNA gain = 12.5dB), VIN = 100mVP-P, fRF1 = 5MHz, fRF2 = 5.01MHz, VOUT = 1VP-P (Note 8) -50 -60 dBc Standby Mode Power-Up Response Time Gain set for 26dB, fRF = 5MHz, VOUT = 1VP-P, settled within 1dB from transition on NP pin 2.1 μs Standby Mode Power-Down Response Time To reach DC current target ±10% 2.0 μs Power-Up Response Time Gain set for 28dB, fRF = 5MHz, VOUT = 1VP-P, settled within 1dB from transition on PD 2.7 ms Power-Down Response Time Gain set for 28dB, fRF = 5MHz, DC power reaches 6mW/channel, from transition on PD 5 ns -58 dBc -71 dBc ±1.2 Degrees Adjacent Channel Crosstalk Nonadjacent Channel Crosstalk VOUT = 1VP-P differential, fRF = 10MHz, 28dB of gain VOUT = 1VP-P differential, fRF = 10MHz, 28dB of gain Phase Matching Between Channels Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 10MHz 4 _______________________________________________________________________________________ Octal-Channel Ultrasound Front-End (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0°C to +70°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, unless otherwise noted.) (Note 5) PARAMETER CONDITIONS MIN TYP MAX UNITS 3V Supply Modulation Ratio Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 5MHz, fMOD = 1kHz, VMOD = 50mV P-P, ratio of output sideband at 5.001MHz, 1VP-P -73 dBc 4.75V/5V Supply Modulation Ratio Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 5MHz, fMOD = 1kHz, VMOD = 50mV P-P, ratio of output sideband at 5.001MHz, 1VP-P -82 dBc Gain Control Lines CommonMode Rejection Ratio Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 5MHz, fMOD(CM) = 1kHz, VMOD(CM) = 50mVP-P, ratio of output sideband at 5.001MHz to 1VP-P -74 dBc Overdrive Phase Delay VG+ - VG- = -3V, delay between VIN = 300mV P-P and VIN = 30mV P-P differential 5 ns Output Impedance Differential 100 AC ELECTRICAL CHARACTERISTICS—SERIAL PERIPHERAL INTERFACE (DOUT loaded with 60pF and 10MΩ, 2ns rise and fall edges on CLK.) PARAMETER SYMBOL CONDITIONS MIN TYP Clock Speed MAX UNITS 10 MHz Mininimum Data-to-Clock Setup Time tCS 5 ns Mininimum Data-to-Clock Hold Time tCH 0 ns Mininimum Clock-to-CS Setup Time t ES 5 ns CS Positive Mininimum Pulse Width t EW 1 ns Mininimum Clock Pulse Width tCW 2 ns Note 5: Note 6: Note 7: Note 8: Minimum and maximum limits at TA = +25°C and +70°C are guaranteed by design, characterization, and/or production test. Noise performance of the device is dependent on the noise contribution from VREF. Use a low-noise supply for VREF. The reference input noise is given for 8 channels, knowing that the reference-noise contributions are correlated in all 8 channels. If more channels are used, the reference noise must be reduced to get the best noise performance. Not applicable to the MAX2077CTK. See the Ultrasound-Specific IMD3 Specification section. _______________________________________________________________________________________ 5 MAX2077 AC ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF, unless otherwise noted.) GAIN vs. DIFFERENTIAL ANALOG CONTROL VOLTAGE 15 -2 -1 0 1 400 200Ω 100Ω 50Ω 400 300 200 200 3 2 500 1kΩ 600 0 -3 MAX2077 toc03 800 100 0 0 5 10 15 20 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 DIFFERENTIAL ANALOG CONTROL VOLTAGE (V) FREQUENCY (MHz) GAIN ERROR (dB) OUTPUT-REFERRED NOISE vs. GAIN INPUT-REFERRED NOISE vs. GAIN SECOND-HARMONIC DISTORTION vs. GAIN 120 90 60 30 -30 5 MAX2077 toc06 150 6 VOUT = 1VP-P -40 fRF = 10MHz -50 4 HD2 (dBc) MAX2077 toc04 180 MAX2077 toc05 5 GAIN ERROR HISTOGRAM 600 FREQUENCY 25 1000 MAX2077 toc02 MAX2077 toc01 35 INPUT-REFERRED NOISE (nV/√Hz) GAIN (dB) 45 COMPLEX INPUT IMPEDANCE MAGNITUDE (I) COMPLEX INPUT IMPEDANCE MAGNITUDE vs. FREQUENCY 55 OUTPUT-REFERRED NOISE (nV/√Hz) MAX2077 Octal-Channel Ultrasound Front-End 3 -60 -70 fRF = 5MHz 2 -80 fRF = 2MHz 0 8 17 26 GAIN (dB) 6 35 44 1 -90 8 17 26 GAIN (dB) 35 44 20 26 32 GAIN (dB) _______________________________________________________________________________________ 38 44 Octal-Channel Ultrasound Front-End VOUT = 1VP-P -40 VOUT = 1VP-P IMD3 (dBc) -60 fRF = 10MHz -50 fRF = 2MHz -70 fRF = 2MHz 26 -90 32 38 38 44 -30 MAX2077 toc10 HD2 -60 -70 -40 10 FREQUENCY (MHz) -50 15 20 VOUT = 1VP-P GAIN = 26dB fRF = 5MHz HD2 -60 -70 -80 HD3 5 HD3 -90 0 0.2 0.4 0.6 1.0 0.8 VOUT P-P (V) SECOND- AND THIRD-HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT RESISTANCE HD2 AND HD3 (dBc) HD2 AND HD3 (dBc) 32 SECOND- AND THIRD-HARMONIC DISTORTION vs. FREQUENCY VOUT = 1VP-P GAIN = 26dB 0 26 GAIN (dB) -50 -80 -90 20 GAIN (dB) -30 -40 44 SECOND- AND THIRD-HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT LOAD CAPACITANCE -30 HD3 VOUT = 1VP-P GAIN = 26dB fRF = 5MHz -40 HD2 AND HD3 (dBc) 20 -70 fRF = 5MHz fRF = 5MHz MAX2077 toc11 -90 HD2 -80 -70 -80 -60 MAX2077 toc12 HD3 (dBc) fRF = 10MHz GAIN = 26dB fRF = 5MHz HD2 AND HD3 (dBc) -30 -50 -50 MAX2077 toc08 -10 MAX2077 toc07 -30 SECOND- AND THIRD-HARMONIC DISTORTION vs. VOUT P-P TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. GAIN MAX2077 toc09 THIRD-HARMONIC DISTORTION vs. GAIN -50 HD2 -60 -70 HD3 -80 -90 200 300 400 500 600 700 800 900 1000 DIFFERENTIAL OUTPUT RESISTANCE (I) 0 20 40 60 80 100 DIFFERENTIAL OUTPUT LOAD CAPACITANCE (pF) _______________________________________________________________________________________ 7 MAX2077 Typical Operating Characteristics (continued) (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF, unless otherwise noted.) Typical Operating Characteristics (continued) (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF, unless otherwise noted.) ADJACENT CHANNEL-TO-CHANNEL CROSSTALK vs. GAIN VOUT = 1VP-P GAIN = 26dB VOUT = 1VP-P fRF = 10MHz VOUT = 1VP-P GAIN = 20dB -40 -60 CROSSTALK (dBc) -55 CROSSTALK (dBc) IMD3 (dBc) -20 0 MAX2077 toc14 -50 MAX2077 toc13 0 ADJACENT CHANNEL-TO-CHANNEL CROSSTALK vs. FREQUENCY MAX2077 toc15 TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. FREQUENCY -60 ADJACENT CHANNEL 1 -30 ADJACENT CHANNEL 1 -60 -65 ADJACENT CHANNEL 2 ADJACENT CHANNEL 2 -70 0 5 10 20 15 17 26 35 44 1 10 100 FREQUENCY (MHz) GAIN (dB) FREQUENCY (MHz) LARGE-SIGNAL BANDWIDTH vs. FREQUENCY (GAIN = 20dB, VOUT = 1VP-P) COMMON-MODE OUTPUT VOLTAGE vs. GAIN DIFFERENTIAL OUTPUT IMPEDANCE vs. FREQUENCY 10 18MHz 9MHz 0 10MHz -10 -20 VOUT = 1VP-P GAIN = 20dB 1 1.8 1.7 1.6 FREQUENCY (MHz) 100 REAL 120 80 60 40 60 20 IMAGINARY 1.5 10 REAL COMPONENT (I) 15MHz MAX2077 toc18 180 MAX2077 toc17 20 1.9 COMMON-MODE OUTPUT VOLTAGE (V) MAX2077 toc16 30 8 -90 8 8 17 26 GAIN (dB) 35 44 0 0 10 20 30 FREQUENCY (MHz) _______________________________________________________________________________________ 40 0 50 IMAGINARY COMPONENT (I) -80 LARGE-SIGNAL BANDWIDTH MAX2077 Octal-Channel Ultrasound Front-End Octal-Channel Ultrasound Front-End LNA OVERLOAD RECOVERY TIME (VIN = 500mVP-P FOR 0.5µs TO 100mVP-P FOR 1µs AND BACK TO 500mVP-P FOR 0.5µs, GAIN =10dB) MAX2077 toc19 1.25 VGA OVERLOAD RECOVERY TIME (VIN = 40mVP-P FOR 1µs TO 4mVP-P FOR 1µs AND BACK TO 40mVP-P FOR 1µs, GAIN = 42.5dB) 0.5 MAX2077 toc20 3 0.25 -0.5 -0.75 0 500 1 -0.05 0 -1.0 OUTPUT 1000 -1 -1.5 2000 1500 0 -2 -0.10 OUTPUT 500 0 TIME (ns) INPUT (V) 0 OUTPUT (V) 2 0.75 -0.25 0.05 INPUT INPUT (V) OUTPUT (V) INPUT 1000 1500 -0.15 2000 TIME (ns) OVERDRIVE PHASE DELAY vs. FREQUENCY MAX2077 toc21 45 OVERDRIVE PHASE DELAY (ns) INPUT = 300mVP-P 36 27 18 INPUT = 30mVP-P 9 0 GAIN = 10dB 0 5 10 15 20 FREQUENCY (MHz) _______________________________________________________________________________________ 9 MAX2077 Typical Operating Characteristics (continued) (Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25°C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200Ω, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200Ω, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1kΩ differential, reference noise less than 10nV/√Hz from 1kHz to 20MHz, DOUT loaded with 10MΩ and 60pF, unless otherwise noted.) MAX2077 Octal-Channel Ultrasound Front-End Pin Description PIN NAME FUNCTION 2 INC2 Channel 2 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 2 3 ZF3 Channel 3 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 3 4 IN3 56 TQFN 68 TQFN 1 4 5 INC3 5 6 ZF4 Channel 4 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 6 7 IN4 7 8 INC4 Channel 4 Positive Differential Input Channel 4 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 8 10 AG AC Ground. Connect a low-ESR 1μF capacitor to ground. 9 11 ZF5 Channel 5 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 10 12 IN5 Channel 5 Positive Differential Input 11 13 INC5 Channel 5 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 12 14 ZF6 Channel 6 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 13 15 IN6 Channel 6 Positive Differential Input 14 16 INC6 Channel 6 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 15 17 ZF7 Channel 7 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 16 18 IN7 Channel 7 Positive Differential Input 17 19 INC7 Channel 7 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 18 20 ZF8 Channel 8 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 19 21 IN8 Channel 8 Positive Differential Input 20 22 INC8 Channel 8 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 21, 51 23, 64 VCC2 4.75V Power Supply. Connect to an external 4.75V power supply. Connect all 4.75V supply pins together externally and bypass with 100nF capacitors as close as possible to the pin. VREF External 2.5V Reference Supply. Connect to a low-noise power supply. Bypass to GND with a 0.1μF capacitor as close as possible to the pins. Note that noise performance of the device is dependent on the noise contribution from VREF. Use a supply with noise lower than 5nV/Hz from 1kHz to 20MHz. VCC1 3.3V Power Supply. Connect to an external 3V power supply. Connect all 3.3V supply pins together externally and bypass with 100nF capacitors as close as possible to the pin. 22 24 23, 35, 49 25, 44, 63 10 Channel 3 Positive Differential Input Channel 3 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 24 26 VG+ 25 27 VG- 26 32 DOUT VGA Analog Gain Control Differential Input. Set the differential voltage to -3V for maximum gain and to +3V for minimum gain. Serial Port Data Output. Data output for ease of daisy-chain programming. The level is 3.3V CMOS. ______________________________________________________________________________________ Octal-Channel Ultrasound Front-End PIN NAME FUNCTION 56 TQFN 68 TQFN 27 34 OUT8- Channel 8 Negative Differential Output 28 35 OUT8+ Channel 8 Positive Differential Output 29 36 OUT7- Channel 7 Negative Differential Output 30 37 OUT7+ Channel 7 Positive Differential Output 31 38 OUT6- Channel 6 Negative Differential Output 32 39 OUT6+ Channel 6 Positive Differential Output 33 40 OUT5- Channel 5 Negative Differential Output 34 41 OUT5+ Channel 5 Positive Differential Output 36 45 OUT4- Channel 4 Negative Differential Output 37 46 OUT4+ Channel 4 Positive Differential Output 38 47 OUT3- Channel 3 Negative Differential Output 39 48 OUT3+ Channel 3 Positive Differential Output 40 49 OUT2- Channel 2 Negative Differential Output 41 50 OUT2+ Channel 2 Positive Differential Output 42 51 OUT1- Channel 1 Negative Differential Output 43 52 OUT1+ Channel 1 Positive Differential Output 44 54 CLK Serial Port Data Clock (Positive Edge Triggered). 3.3V CMOS. Clock input for programming the serial shift registers. 45 55 DIN Serial Port Data Input Line. 3.3V CMOS. Data input to program the serial shift registers. 46 56 CS Active-Low Serial Port Chip Select. 3.3V CMOS. Used to store programming bits in registers, as well as in CW mode, synchronizing all channel phases (on a rising edge). 47 — PD Power-Down Mode Select Input (56-Pin TQFN Only). Drive PD high to place the entire device in power-down mode. Drive PD low for normal operation. This mode overrides the standby mode. 48 57 NP VGA Standby Mode Select Input. Set NP to 1 to place the entire device in standby mode. Overrides soft channel shutdown in serial shift register, but not general power-down (PD). 50 9, 28, 31 GND Ground 52 65 ZF1 Channel 1 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 53 66 IN1 54 67 INC1 Channel 1 Clamp Input. Connect to a coupling capacitor. Channel 1 Positive Differential Input 55 68 ZF2 Channel 2 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. 56 1 IN2 Channel 2 Positive Differential Input — 29, 30, 33, 42, 43, 53, 58–62 N.C. No Connection. Internally not connected. — — EP Exposed pad. Internally connected to ground. Connect to a large ground plane using multiple vias to maximize thermal and electrical performance. Not intended as an electrical connection point. ______________________________________________________________________________________ 11 MAX2077 Pin Description (continued) Octal-Channel Ultrasound Front-End MAX2077 Functional Diagram IN2 ZF2 INC1 IN1 ZF1 VCC2 GND VCC1 NP PD* CS DIN CLK OUT1+ OUT1- INC2 VGA ZF3 OUT2+ LNA ANTI-ALIAS IN3 OUT2- VGA INC3 OUT3+ LNA ANTI-ALIAS ZF4 OUT3VGA LNA IN4 ANTI-ALIAS OUT4+ VGA INC4 LNA OUT4- ANTI-ALIAS VCC1 AG VGA OUT5+ ZF5 LNA ANTI-ALIAS OUT5- IN5 VGA LNA INC5 OUT6+ ANTI-ALIAS OUT6- VGA ZF6 LNA ANTI-ALIAS IN6 OUT7+ VGA INC6 OUT7LNA *PD FUNCTION ONLY APPLICABLE TO 56-PIN TQFN PACKAGE. 12 ZF7 IN7 INC7 ZF8 IN8 INC8 VCC2 VREF ANTI-ALIAS VCC1 VG+ VG- DOUT OUT8- OUT8+ ______________________________________________________________________________________ Octal-Channel Ultrasound Front-End 140dBc/Hz at 1kHz offset from a VOUT = 1VP-P, 5MHz clutter signal. To add CW Doppler capability, replace the MAX2077 with the MAX2078. The MAX2077 is a high-density, octal-channel ultrasound receiver optimized for low-cost, high-channel count, high-performance portable and cart-based ultrasound applications. The integrated octal LNA, VGA, and AAF offer a complete ultrasound imaging path receiver solution. Imaging path dynamic range has been optimized for exceptional second-harmonic performance. The complete imaging receive channel exhibits an exceptional 68dBFS* SNR at 5MHz. The bipolar front-end has also been optimized for exceptionally low near-carrier modulation noise for exceptional low-velocity pulsed and color-flow Doppler sensitivity under high-clutter conditions, achieving an impressive near-carrier SNR of Modes of Operation The MAX2077 requires programming before it can be used. The operating modes are controlled by the B0–B6 programming bits. Tables 1 and 2 show the functions of these programming bits. Low-Noise Amplifier (LNA) The MAX2077’s LNA is optimized for excellent dynamic range and linearity performance characteristics, making it ideal for ultrasound imaging applications. When the LNA is placed in low-gain mode, the input resistance (R IN ), being a function of the gain A (R IN = RF/(1+A)), increases by a factor of approximately 2. *When coupled with the MAX1437B ADC. Table 1. Summary of Programming Bits BIT NAME DESCRIPTION D0, D1, D2 Input-impedance programming D3 LNA gain (D3 = 0 is low gain) D4, D5 Anti-alias filter fC programming Don’t care D6 Table 2. Logic Functions of Programming Bits D6 D5 D4 D3 D2 D1 D0 MODE X X X 1 0 0 0 RIN = 50, LNA gain = 18.5dB X X X 1 0 0 1 RIN = 100 X X X 1 0 1 0 RIN = 200 X X X 1 0 1 1 RIN = 1000 X X X 0 0 0 0 RIN = 100, LNA gain = 12.5dB X X X 0 0 0 1 RIN = 200 X X X 0 0 1 0 RIN = 400 X X X 0 0 1 1 RIN = 2000 X X X 1 1 X X Open feedback, LNA gain = 18.5dB X 0 0 X X X X fC = 9MHz X 0 1 X X X X fC = 10MHz X 1 0 X X X X fC = 15MHz X 1 1 X X X X fC = 18MHz X = Don’t care. ______________________________________________________________________________________ 13 MAX2077 Detailed Description MAX2077 Octal-Channel Ultrasound Front-End Consequently, the switches that control the feedback resistance (RF) have to be changed. For instance, the 100Ω mode in high gain becomes the 200Ω mode in low gain (see Table 2). time. The line is pulled down before the programming begins and pulled up after it is complete for all devices used. On the rising edge, the information is stored in internal registers. Variable-Gain Amplifier (VGA) Active Impedance Matching The MAX2077’s VGAs are optimized for high linearity, high dynamic range, and low output-noise performance, all of which are critical parameters for ultrasound imaging applications. Each VGA path includes circuitry for adjusting analog gain, as well as an output buffer with differential output ports (OUT_+, OUT_-) for driving ADCs. To provide exceptional noise-figure characteristics, the input impedance of each amplifier uses a feedback topology for active impedance matching. A feedback resistor of the value (1 + (A/2)) x RS is added between the inverting output of the amplifier to the input. The input impedance is the feedback resistor (ZF) divided by 1 + (A/2). The factor of two is due to the gain of the amplifier (A) being defined with a differential output. For common input impedances, the internal digitally programmed impedances can be used (see Table 2). For other input impedances, use an externally supplied resistor in series with the existing programmable feedback impedances to set the input impedance according to the above formula. The VGA gain can be adjusted through the differential gain control input VG+ and VG-. Set the differential gain control input voltage at -3V for minimum gain and +3V for maximum gain. The differential analog control common-mode voltage is 1.65V (typ). Overload Recovery The device is also optimized for quick overload recovery for operation under the large input signal conditions that are typically found in ultrasound imaging applications. See the Typical Operating Characteristics for an illustration of the rapid recovery time from a transmit-related overload. Power-Down Mode The MAX2077CTN+ can also be powered down with PD (the same feature is not available in the MAX2077CTK+). Set PD to logic-high for power-down mode. In powerdown mode, the device consumes 3.0µW (typ) power. Set PD to logic-low for normal operation. Setting NP to logic-high places the MAX2077 in standby mode. In standby mode, the device consumes less power (5.6mW typ), but input/output pins remain biased to provide quick power-up response time. Standby mode is available for both MAX2077CTN+ and MAX2077CTK+ versions. Applications Information Serial Interface The MAX2077 is programmed using a serial shift register arrangement. This greatly simplifies the complexity of the program circuitry, reduces the number of IC pins necessary for programming, and reduces the PCB layout complexity. The data in (DIN) and data out (DOUT) can be daisy-chained from device to device and all front-ends can run off a single programming clock. The data can be entered after CS goes low. Once a whole word is entered, CS needs to rise. When programming the part, enter LSB first and MSB last. The chip-select line (CS) is used to load the programming information in multiple MAX2077 devices at the same 14 Noise Figure The MAX2077 is designed to provide maximum input sensitivity with exceptionally low noise figure. The input active devices are selected for very low-equivalent input-noise voltage and current, optimized for source impedances from 50Ω to 1000Ω. Additionally, the noise contribution of the matching resistor is effectively divided by 1 + (A/2). Using this scheme, typical noise figure of the amplifier is approximately 2.4dB for RIN = RS = 200Ω. Table 3 illustrates the noise figure for other input impedances. Input Clamp The MAX2077 includes configurable integrated inputclamping diodes. The diodes are clamped to ground at ±0.8V. The input-clamping diodes can be used to prevent large transmit signals from overdriving the inputs of the amplifiers. Overdriving the inputs could possibly place charge on the input-coupling capacitor, causing longer transmit overload recovery times. Input signals are AC-coupled to the single-ended inputs IN1–IN8, but are clamped with the INC1–INC8 inputs. See the Typical Application Circuits. If external clamping devices are preferred, simply leave INC1–INC8 unconnected. Table 3. Noise Figure vs. Source and Input Impedances RS () RIN () NF (dB) 50 50 4.5 100 100 3.4 200 200 2.4 1000 1000 2.1 ______________________________________________________________________________________ Octal-Channel Ultrasound Front-End MAX2077 MSB LSB D0 DIN D1 D5 D6 CLK tCS tCW tCH CS tES tEWS tEW NOTES: DATA ENTERED ONE CLOCK RISING EDGE. REGISTER STATE CHARGE ON CS RISING EDGE. DATA IS ENTERED LSB FIRST IF MORE THAN 7 BITS ARE ENTERED, THE EXTRA BITS MUST PRECEDE THE LSB. Figure 1. Shift Register Timing Diagram Analog Output Coupling Each of the VGA output pins can drive 25pF to GND and 15pF || 1kΩ differentially. The differential outputs have a common-mode bias of approximately 1.73V. AC-couple these differential outputs if the next stage has a different common-mode input range. (f1 - (f2 - f1)) presents itself as an undesired Doppler error signal in ultrasound applications (see Figure 2). Power-Supply Sequencing -25dB Use the following power-on sequence: 1) 4.75V supply 2) 3.3V supply 3) 2.5V reference voltage 4) Control signals Before a signal is turned on, it should be either at 0V or in an open state. ULTRASOUND IMD3 Ultrasound-Specific IMD3 Specification Unlike typical communications applications, the two input tones are not equal in magnitude for the ultrasound-specific IMD3 two-tone specification. In this measurement, f1 represents reflections from tissue and f2 represents reflections from blood. The latter reflections are typically 25dB lower in magnitude, and hence the measurement is defined with one input tone 25dB lower than the other. The IMD3 product of interest f1 - (f2 - f1) f1 f2 f2 + (f2 - f1) Figure 2. Ultrasound IMD3 Measurement Technique ______________________________________________________________________________________ 15 PCB Layout Chip Information The pin configuration of the MAX2077 is optimized to facilitate a very compact physical layout of the device and its associated discrete components. A typical application for this device might incorporate several devices in close proximity to handle multiple channels of signal processing. The exposed pad (EP) of the MAX2077’s TQFN-EP packages provide a low thermal-resistance path to the die. It is important that the PCB on which the MAX2077 is mounted be designed to conduct heat from the EP. In addition, provide the EP with a low-inductance path to electrical ground. The EP MUST be soldered to a ground plane on the PCB, either directly or through an array of plated via holes. PROCESS: Complementary BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 56 TQFN-EP T5688+2 21-0135 68 TQFN-EP T6800+2 21-0142 Pin Configurations OUT7- OUT7+ OUT6- OUT6+ OUT5- OUT5+ VCC1 OUT4- OUT4+ OUT3- OUT3+ OUT2- OUT2+ OUT1- TOP VIEW 42 41 40 39 38 37 36 35 34 33 32 31 30 29 OUT1+ 43 28 OUT8+ CLK 44 27 OUT8- DIN 45 26 DOUT CS 46 25 VG- PD 47 24 VG+ NP 48 23 VCC1 22 VREF VCC1 49 MAX2077 GND 50 21 VCC2 VCC2 51 20 INC8 ZF1 52 19 IN8 IN1 53 18 ZF8 17 INC7 INC1 54 ZF2 55 *EP + 16 IN7 15 ZF7 10 11 12 13 14 INC6 9 IN6 ZF4 8 ZF6 INC3 7 INC5 IN3 6 IN5 5 AG 4 ZF5 3 INC4 2 IN4 1 ZF3 IN2 56 INC2 MAX2077 Octal-Channel Ultrasound Front-End TQFN (8mm × 8mm) *EP = EXPOSED PAD. 16 ______________________________________________________________________________________ Octal-Channel Ultrasound Front-End OUT8+ OUT7- OUT6- OUT7+ OUT6+ OUT5- OUT5+ N.C. VCC1 N.C. OUT4- OUT4+ OUT3- OUT3+ OUT2- OUT1- OUT2+ TOP VIEW 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 OUT8- OUT1+ 52 N.C. 53 33 N.C. CLK 54 32 DOUT DIN 55 31 GND CS 56 30 N.C. NP 57 29 N.C. N.C. 58 28 GND MAX2077 N.C. 59 27 VG- N.C. 60 26 VG+ N.C. 61 25 VCC1 N.C. 62 24 VREF VCC1 63 23 VCC2 VCC2 64 22 INC8 ZF1 65 21 IN8 20 ZF8 IN1 66 INC1 67 *EP + 19 INC7 18 IN7 ZF7 ZF4 INC6 INC3 10 11 12 13 14 15 16 17 IN6 IN3 9 ZF6 ZF3 8 INC5 INC2 7 IN5 6 AG 5 ZF5 4 GND 3 INC4 2 IN4 1 IN2 ZF2 68 TQFN (10mm × 10mm) *EP = EXPOSED PAD. ______________________________________________________________________________________ 17 MAX2077 Pin Configurations (continued) Octal-Channel Ultrasound Front-End MAX2077 Typical Application Circuits C10 22nF C9 10nF ZF6 IN6 IN6 INC6 DIN CS CLK OUT1+ CLK DIN CS 36 MAX2077 8 35 34 9 10 33 11 32 31 12 13 30 *EP 29 14 IN7 ZF7 16 C11 10nF 17 18 19 20 21 22 23 24 25 26 C13 10nF C12 22nF C14 22nF C15 100nF IN8 IN7 VCC2 18 PD 37 7 15 *EP = EXPOSED PAD. NP GND VCC2 ZF1 IN1 6 C16 100nF VCC1 27 C32 4.7nF OUT1OUT2+ C30 4.7nF OUT2OUT3+ C29 4.7nF C28 4.7nF OUT3OUT4+ OUT1- C31 4.7nF C27 4.7nF C26 4.7nF OUT4- OUT5+ C24 4.7nF C23 4.7nF OUT5OUT6+ C22 4.7nF C21 4.7nF OUT6OUT7+ OUT7- C20 4.7nF C19 4.7nF 28 C17 4.7nF OUT2+ OUT2OUT3+ OUT3OUT4+ OUT4- VCC1 C18 4.7nF OUT8+ INC5 38 5 OUT8+ IN5 39 OUT8- IN5 40 4 OUT8- ZF5 3 DOUT C7 10nF 43 41 DOUT C8 22nF AG 44 2 VG- C6 180nF 45 42 VG- INC4 46 + VG+ IN4 47 VG+ IN4 48 VCC1 ZF4 49 REF C5 22nF C4 10nF 50 VREF INC3 51 VCC2 IN3 C33 4.7nF INC8 IN3 1 52 IN8 ZF3 53 ZF8 C3 22nF C2 10nF 54 INC7 IN2 55 INC1 ZF2 IN2 56 VCC1 C37 22nF C38 10nF C39 10nF PD NP IN1 VCC1 C1 22nF INC2 C35 100nF OUT1+ VCC2 C36 100nF ______________________________________________________________________________________ OUT5+ OUT5OUT6+ OUT6OUT7+ OUT7- C25 100nF VCC1 Octal-Channel Ultrasound Front-End ZF5 IN5 IN5 INC5 C10 22nF C9 10nF ZF6 IN6 IN6 INC6 C11 10nF ZF7 C12 22nF OUT1+ CLK CS DIN NP OUT1+ N.C. CLK DIN N.C. CS N.C. NP N.C. VCC1 VCC2 N.C. 52 3 49 4 48 5 47 6 46 45 7 44 8 9 OUT2+ OUT4+ 12 40 13 39 14 38 15 37 *EP 36 17 35 IN7 21 22 23 24 25 26 27 28 29 30 31 32 33 VCC2 OUT2OUT3+ OUT3OUT4+ OUT4- C25 100nF VCC1 OUT5+ C24 4.7nF C23 4.7nF OUT5OUT6+ C22 4.7nF C21 4.7nF OUT6OUT7+ C20 4.7nF C19 4.7nF OUT7OUT8+ C18 4.7nF OUT5+ OUT5OUT6+ OUT6OUT7+ OUT7OUT8+ VG- C40 4.7nF OUT8- C16 100nF DOUT C15 100nF VG+ REF C14 22nF C26 4.7nF OUT2+ 34 C13 10nF IN8 C27 4.7nF VCC1 41 20 C28 4.7nF OUT4- 11 19 C29 4.7nF OUT3- 42 N.C. 18 C30 4.7nF OUT2OUT3+ OUT1- C31 4.7nF 43 N.C. MAX2077 16 C32 4.7nF OUT1- 10 OUT8- C7 10nF 53 N.C. C8 22nF 54 DOUT AG 55 50 N.C. GND C6 1µF 56 GND INC4 57 N.C. IN4 58 GND IN4 59 VG- ZF4 60 VG+ C4 10nF 61 VCC1 C5 22nF 62 VREF INC3 63 VCC2 IN3 IN3 2 INC8 ZF3 IN8 C3 22nF C2 10nF 64 + ZF8 IN2 65 51 IN7 INC2 66 1 INC7 IN2 67 C33 4.7nF N.C. 68 IN1 ZF2 C39 10nF INC1 C1 22nF ZF1 C36 C35 100nF 100nF C37 22nF VCC2 VCC1 C38 10nF IN1 VCC1 *EP = EXPOSED PAD. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc. MAX2077 Typical Application Circuits (continued)