### ETC AB-069

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INTERLEAVING ANALOG-TO-DIGITAL CONVERTERS
by Jerry Horn, (602) 746-7413
the sample rate (due to the offset error) and the other with a
frequency of half the sample rate minus the frequency of the
original input signal (due to the gain error).
It is tempting when pushing the limits of analog-to-digital
conversion to consider interleaving two or more converters
to increase the sample rate (Figure 1). However, such designs must take into consideration several possible sources
of error.
The last consideration covered is the difference in INL
(integral non-linearity) between the converters. INL represents the number of LSBs the output of a converter is from
the expected output for a given input voltage. For example,
if a converter would ideally put out a code of N for an input
voltage M but actually puts out a code N+2, then the INL at
that point is two.
The first consideration is the bandwidth of the converters.
For example, if the bandwidth of the converters is just over
half their sampling rate, then it would not do much good to
interleave them. Fortunately, the bandwidth of most converters which currently “push the envelope” is often many
times higher than their sample rate since these converters are
often used in undersampling situations.
It is not unusual for a converter to have an INL of one or two
LSBs over a good part of its input voltage range. For
interleaving converters, the output codes could differ by as
much as two times the maximum INL (say two to four
codes) for the same input voltage. This could cause errors in
the output codes which resemble the gain and offset problems discussed earlier, and may drastically reduce the number of effective bits of the digitizing system.
The next consideration is possible offset and gain errors
between the converters. Figure 2 shows two interleaved
converters digitizing a sine wave. Converter A has an offset
problem and converter B a gain problem. The digitized
codes represent not only the original sine wave but also an
error signal. In the discrete digital domain, the error signal
is seen to contain two sine frequencies—a frequency of half
+15V
+15V
Offset
Gain
–15V
–15V
(10MHz)
12
L
a
t
c
h
12
12
+15V
–15V
(10MHz)
D
Q
C
Q
Data
(20MHz)
Gain
–15V
20MHz
Clock
12
+15V
Offset
Input
2-to-1
M
U
X
12
L
a
t
c
h
MUX
Timing
and
Control
FIGURE 1. Two Interleaved Analog-to-Digital Converters.
1994 Burr-Brown Corporation
AB-069
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Printed in U.S.A. January, 1994
With careful design, many of these problems can be reduced. Select ADCs with a wide enough bandwidth. Find
ones that have offset and gain adjust circuitry built in or add
this externally. ADCs which need external references may
work well because the same reference can be provided to all
the converters (but be careful of board layout). Unfortunately in this case, the trend has been to include internal
references.
post digital signal processing. Correcting in the time domain
will involve lengthy calibration of the converters and storing
correction tables. Correcting in the frequency domain will
involve computationally intensive mathematical algorithms.
On the practical side, an interleaving digitizing system will
suffer some performance penalty. The amount of degradation depends on how well the converters are matched and/or
how much digital signal processing the designer is willing to
do. Contact Burr-Brown Applications Engineering for more
information on this subject.
Reducing the errors even further is also possible, but quickly
becomes increasingly complicated and costly. Correcting
INL problems will almost certainly involve some form of
Converter A
(Offset Error)
Converter B
(Gain Error)
Actual Input
Interleaving Digitizer
Magnified Error Signal
Sample/2 (Due to Offset Error)
Sample/2-Input (Due to Gain Error)
Frequencies Present In Error Signal
FIGURE 2. Digitized Signal of Two Interleaved Converters.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
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