ETC AM7920-1SC

Am7920
Subscriber Line Interface Circuit
The Am7920 Subscriber Line Interface Circuit implements the basic telephone line interface functions, and enables
the design of low cost, high performance, POTS line interface cards.
DISTINCTIVE CHARACTERISTICS
Control states: Active, Ringing, Standby,
and Disconnect
Low standby power (35 mW)
–19 V to –58 V battery operation
On-hook transmission
Two-wire impedance set by single external
impedance
Programmable loop-detect threshold
Programmable ring-trip detect threshold
No –5 V supply required
Current Gain = 500
On-chip Thermal Management (TMG) feature
Four on-chip relay drivers and relay snubbers, 1
ringing and 3 general purpose (32 PLCC)
Programmable constant-current feed
BLOCK DIAGRAM
TMG
A(TIP)
Relay
Driver
RYOUT3
Relay
Driver
RYOUT2
Relay
Driver
RYOUT1
Ring Relay
Driver
RINGOUT
HPA
Input Decoder
and Control
HPB
B(RING)
Two-Wire
Interface
D1
D2
D3
C1
C2
DET
VTX
RSN
Signal
Transmission
Off-Hook
Detector
RD
RDC
CAS
Power-Feed
Controller
DA
DB
VBAT
BGND
Ring-Trip
Detector
VCC
VBREF
AGND/DGND
Publication# 080146 Rev: H Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the elements below.
Am7920
S
–1
C
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)*
PACKAGE TYPE
J = 32-pin Plastic Leaded Chip Carrier (PL 032)
S = 28-pin Small Outline Integrated Circuit (SOW 028)
PERFORMANCE GRADE
–1 53 dB Longitudinal Balance
–2 63 dB Longitudinal Balance
DEVICE NUMBER/DESCRIPTION
Am7920
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
–1
JC
–2
SC
Am7920
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local Legerity sales office to confirm availability of specific valid combinations, to check on
newly released combinations, and to obtain additional data on Legerity’s standard military–grade
products.
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of production units.
2
Am7920 Data Sheet
RYOUT1
RINGOUT
VCC
BGND
B(RING)
A(TIP)
DB
CONNECTION DIAGRAMS
Top View
4
3
2
1
32
31
30
RYOUT3
6
28
RD
TMG
7
27
HPB
VBAT
8
26
HPA
D2
9
25
NC
D1
10
24
VTX
NC
11
23
VBREF
NC
12
22
RSN
DET
13
21
AGND
17 18
19 20
RDC
16
NC
15
NC
14
CAS
DA
C1
29
C2
5
D3
RYOUT2
28-Pin SOIC
BGND
1
28
B(RING)
VCC
2
27
A(TIP)
RINGOUT
3
26
DB
RYOUT1
4
25
DA
RYOUT2
5
24
RD
TMG
6
23
HPB
VBAT
7
22
HPA
D2
8
21
VTX
D1
9
20
VBREF
NC
10
19
RSN
DET
11
18
AGND/DGND
NC
12
17
RDC
C2
13
16
NC
C1
14
15
CAS
Notes:
1. Pin 1 is marked for orientation.
2. NC = No Connect
SLIC Products
3
PIN DESCRIPTIONS
4
Pin Name
Type
Description
AGND/DGND
Ground
Analog and Digital ground.
A(TIP)
Output
Output of A(TIP) power amplifier.
BGND
Ground
Battery (power) ground.
B(RING)
Output
Output of B(RING) power amplifier.
C2–C1
Inputs
Decoder. TTL compatible. C2 is MSB and C1 is LSB.
CAS
Capacitor
Anti-Saturation pin for capacitor to filter reference voltage when operating in antisaturation region.
D3–D1
Input
Relay Driver Control. D3–D1 control the relay drivers RYOUT1, RYOUT2, and RYOUT3.
Logic Low on D1 activates the RYOUT1 relay driver. Logic Low on D2 activates the
RYOUT2 relay driver. Logic Low on D3 activates the RYOUT3 relay driver. TTL
compatible.
DA
Input
Ring-trip negative. Negative input to ring-trip comparator.
DB
Input
Ring-trip positive. Positive input to ring-trip comparator.
DET
Output
HPA
Capacitor
High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor.
HPB
Capacitor
High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor.
NC
—
RD
Resistor
Detect resistor. Detector threshold set and filter pin.
RDC
Resistor
DC feed resistor. Connection point for the DC feed current programming network. The
other end of the network connects to the receiver summing node (RSN).
RINGOUT
Output
RSN
Input
Receive Summing Node. The metallic current (both AC and DC) between A(TIP) and
B(RING) is equal to 500 times the current into this pin. The networks that program
receive gain, two-wire impedance, and feed resistance all connect to this node.
RYOUT1
Output
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND.
RYOUT2
Output
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND
(PLCC only).
RYOUT3
Output
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND
(PLCC only).
TMG
—
VBAT
Battery
VBREF
—
VCC
Power
+5 V power supply.
VTX
Output
Transmit Audio. This output is a 0.50 gain version of the A(TIP) and B(RING) metallic
voltage. VTX also sources the two-wire input impedance programming network.
Switchhook detector. Logic Low indicates that selected detector is tripped. Logic inputs
C2–C1, E1, and E0 select the detector. Open-collector with a built-in 15 kΩ pull-up
resistor.
No Connect. Pin not internally connected.
Ring Relay Driver. Open-collector driver with emitter internally connected to BGND.
Thermal Management. External resistor connects between this pin and VBAT to offload
power from SLIC.
Battery supply and connection to substrate.
This is an Legerity reserved pin and must always be connected to the VBAT pin.
Am7920 Data Sheet
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Storage temperature ......................... –55°C to +150°C
Commercial (C) Devices
VCC with respect to AGND/DGND ..... –0.4 V to +7.0 V
Ambient temperature .............................0°C to +70°C*
VBAT with respect to AGND/DGND:
Continuous..................................... +0.4 V to –70 V
10 ms ............................................. +0.4 V to –75 V
VCC .....................................................4.75 V to 5.25 V
BGND with respect to AGND/DGND........ +3 V to –3 V
A(TIP) or B(RING) to BGND:
Continuous ......................................... VBAT to +1 V
10 ms (f = 0.1 Hz) ............................. –70 V to +5 V
1 µs (f = 0.1 Hz) ................................ –80 V to +8 V
250 ns (f = 0.1 Hz) .......................... –90 V to +12 V
Current from A(TIP) or B(RING).....................±150 mA
RINGOUT/RYOUT1,2,3 current.........................50 mA
RINGOUT/RYOUT1,2,3 voltage ........... BGND to +7 V
VBAT ......................................................–19 V to –58 V
AGND/DGND .......................................................... 0 V
BGND with respect to
AGND/DGND ....................... –100 mV to +100 mV
Load resistance on VTX to ground .............. 20 kΩ min
The operating ranges define those limits between which the
functionality of the device is guaranteed.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
RINGOUT/RYOUT1,2,3 transient ....... BGND to +10 V
DA and DB inputs
Voltage on ring-trip inputs ..................... VBAT to 0 V
Current into ring-trip inputs .........................±10 mA
C2–C1 and D3–D1
Input voltage .........................–0.4 V to VCC + 0.4 V
Maximum power dissipation, continuous,
TA = 70°C, No heat sink (See note)
In 32-pin PLCC package................................1.7 W
Thermal Data:................................................................ θJA
In 32-pin PLCC package....................... 43°C/W typ
ESD immunity/pin (HBM) ..................................1500 V
Note: Thermal limiting circuitry on-chip will shut down the circuit at a junction temperature of about 165°C. The device
should never see this temperature and operation above 145°C
junction temperature may degrade device reliability. See the
SLIC Packaging Considerations for more information.
Stresses above those listed under Absolute Maximum
Ratings may cause permanent device failure. Functionality
at or above these limits is not implied. Exposure to
absolute maximum ratings for extended periods may affect
device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
3
20
dB
1, 4
Ω
4
+50
mV
Transmission Performance
2-wire return loss
200 Hz to 3.4 kHz
26
Analog output (VTX) impedance
Analog (VTX) output offset voltage
–50
Overload level, 2-wire and 4-wire
Active state
2.5
Overload level
On hook, RLAC = 600 Ω
0.77
THD, Total Harmonic Distortion
0 dBm
+7 dBm
THD, On hook
0 dBm, RLAC = 600 Ω
–64
–55
–50
–40
Vpk
2a
Vrms
2b
dB
5
–36
Longitudinal Capability (See Test Circuit D)
Longitudinal to
metallic L-T, L-4
balance
200 Hz to 1 kHz
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–1*
–2
–1
–2
52
63
50
58
1 kHz to 3.4 kHz
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–1*
–2
–1
–2
52
58
50
53
4
4
dB
Longitudinal signal generation 4-L
200 Hz to 3.4 kHz
40
Longitudinal current per pin (A or B)
Active state
20
Longitudinal impedance at A or B
0 to 100 Hz
4
4
27
35
mArms
8
Ω/pin
25
Idle Channel Noise
C-message weighted noise
RL = 600 Ω
RL = 600 Ω
0°C to +70°C
–40°C to +85°C
7
+10
+12
dBrnc
Psophometric weighted noise
RL = 600 Ω
RL = 600 Ω
0°C to +70°C
–40°C to +85°C
–83
–80
–78
dBmp
4
Insertion Loss and Balance Return Signal (See Test Circuits A and B)
Gain accuracy
4- to 2-wire
0 dBm, 1 kHz
–0.20
0
+0.20
Gain accuracy
2- to 4-wire, 4- to 4-wire
0 dBm, 1 kHz
–6.22
–6.02
–5.82
Gain accuracy, 4- to 2-wire
On hook
–0.35
Gain accuracy, 2- to 4-wire, 4- to 4-wire On hook
–6.37
Gain accuracy over frequency
300 to 3.4 kHz
relative to 1 kHz
–0.15
+0.15
Gain tracking
+3 dBm to –55 dBm
relative to 0 dBm
–0.15
+0.15
Gain tracking
On hook
0 dBm to –37 dBm
+3 dBm to 0 dBm
–0.15
–0.35
+0.15
+0.35
Group delay
0 dBm, 1 kHz
Note:
* Performance Grade
6
Am7920 Data Sheet
+0.35
–6.02
4
–5.67
4
dB
µs
4, 7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
26
Unit
Note
Line Characteristics
IL, Short Loops, Active state
RLDC = 600 Ω
20
23
IL, Long Loops, Active state
RLDC = 1930 Ω, BAT = –42.75 V,
TA = 25°C
18
19
IL, Accuracy, Standby state
BAT – 3 V
IL = ------------------------------R L + 400
0.7IL
IL
18
30
T A = 25°C
Constant-current region
IL, Loop current, Disconnect state
RL = 0
ILLIM
Active, A and B to ground
VAB, Open Circuit voltage
VBAT = –52 V
85
–42.75
–44
1.3IL
mA
100
µA
120
mA
V
Power Supply Rejection Ratio (VRIPPLE = 100 mVrms), Active Normal State
VCC
50 Hz to 3.4 kHz
30
40
VBAT
50 Hz to 3.4 kHz
28
50
Effective internal resistance
CAS pin to VBAT
85
170
255
dB
5
kΩ
4
Power Dissipation
On hook, Disconnect state
25
70
On hook, Standby state
35
100
On hook, Active state
125
270
Off hook, Standby state
RL = 600 Ω
860
1200
Off hook, Active state
RL = 300 Ω, RTMG = 2350 Ω
450
800
ICC,
On-hook VCC supply current
Disconnect state
Standby state
Active state, BAT = –48 V
1.7
2.2
6.3
4.0
4.0
8.5
IBAT,
On-hook VBAT supply current
Disconnect state
Standby state
Active state, BAT = –48 V
0.25
0.55
2.8
1.0
1.5
4.8
mW
Supply Currents, Battery = –48V
mA
RFI Rejection
RFI rejection
100 kHz to 30 MHz, (See Figure F)
1.0
mVrms
4
Receive Summing Node (RSN)
RSN DC voltage
IRSN = 0 mA
0
RSN impedance
200 Hz to 3.4 kHz
10
V
20
Ω
4
Logic Inputs (C2–C1 and D3–D1)
VIH, Input High voltage
2.0
VIL, Input Low voltage
0.8
IIH, Input High current
–75
IIL, Input Low current
–400
40
V
µA
Logic Output (DET)
VOL, Output Low voltage
IOUT = 0.3 mA, 15 kΩ to VCC
VOH, Output High voltage
IOUT = –0.1 mA, 15 kΩ to VCC
0.40
2.4
V
Ring-Trip Detector Input (DA, DB)
Bias current
Offset voltage
Source resistance = 2 MΩ
SLIC Products
–500
–50
–50
0
nA
+50
mV
6
7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Loop Detector
On threshold
RD = 35.4 kΩ
11.5
17.3
Off threshold
RD = 35.4 kΩ
9.4
14.1
Hysteresis
RD = 35.4 kΩ
0
4.4
mA
Relay Driver Output (RINGOUT, RYOUT1, RYOUT2, RYOUT3)
On voltage
IOL = 40 mA
Off leakage
VOH = +5 V
Zener breakover
IZ = 100 µA
Zener On voltage
IZ = 30 mA
+0.3
6
+0.7
V
100
µA
7.2
10
V
RELAY DRIVER SCHEMATICS
RINGOUT
RYOUT1, RYOUT2, RYOUT3
BGND
BGND
Notes:
1. Unless otherwise noted, test conditions are BAT = –52 V, VCC = +5 V, RL = 600 Ω, RDC1 = RDC2 = 27.17 kΩ, RTMG = 2350 Ω,
RD = 35.4 kΩ, no fuse resistors, CHP = 0.22 µF, CDC = 0.1 µF, CCAS = 0.33 µF, D1 = 1N400x, two-wire AC input impedance
is a 600 Ω resistance synthesized by the programming network shown below.
VTX
RT1 = 75 kΩ
CT1 = 120 pF
RT2 = 75 kΩ
RSN
RRX = 150 kΩ
VRX
2. a. Overload level is defined when THD = 1%.
b. Overload level is defined when THD = 1.5%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire, AC-load impedance
matches the programmed impedance.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only.
7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1. The network reduces the group
delay to less than 2 µs and increases 2WRL. The effect of group delay on linecard performance also may be compensated
for by synthesizing complex impedance with the QSLAC™ or DSLAC™ device.
8. Minimum current level guaranteed not to cause a false loop detect.
8
Am7920 Data Sheet
Table 1.
State
C2
C1
0
0
0
Disconnect
Ring trip
1
0
1
Ringing
Ring trip
2
1
0
Active
Loop detector
3
1
1
Standby
Loop detector
Table 2.
Two-Wire Status
DET Output
User-Programmable Components
Z T = 250 ( Z 2WIN – 2 R F )
Z RX
SLIC Decoding
ZT is connected between the VTX and RSN pins. The fuse
resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZRX is connected from VRX to RSN. ZT is defined above, and
G42L is the desired receive gain.
ZL
500 Z T
= ------------ • ---------------------------------------------------G 42L
Z T + 250 ( Z L + 2 R F )
RDC1, RDC2, and CDC form the network connected to the RDC
pin. RDC1 and RDC2 are approximately equal. ILOOP is the
desired loop current in the constant-current region.
1250
R DC1 + R DC2 = -------------I LOOP
R DC1 + R DC2
C DC = 1.5 ms • ---------------------------------R DC1 • R DC2
510
415
ms
RD ON = --------- , RD OFF = --------- , C D = 0.5
----------------IT
IT
RD
C CAS
RD and CD form the network connected from RD to AGND/
DGND and IT is the threshold current between on hook and
off hook.
CCAS is the regulator filter capacitor and fc is the desired filter
cut-off frequency.
1
= ------------------------------5
3.4 • 10 π f c
Standby loop current (resistive region).
V BAT – 3 V
I STANDBY = --------------------------------400 Ω + R L
Thermal Management Equations (Normal Active and Tip Open States)
RTMG is connected from TMG to VBAT and saves power within
the SLIC in Active and Disconnect state constant-currents
only.
æ V BAT – 6 V
ö
R TMG ≥ ç --------------------------------- – 70 Ω÷
è
ø
I LOOP
2
( V BAT – 6 V – ( I L • R L ) )
- • R TMG
P RTMG = ----------------------------------------------------------------------( R TMG + 70 Ω )
Power dissipated in the TMG resistor, RTMG, during Active and
Disconnect states.
2
2
P SLIC = V BAT • I L – P RTMG – R L ( I L ) + 0.12 W
Power dissipated in the SLIC while in Active and Disconnect
states.
SLIC Products
9
DC FEED CHARACTERISTICS
60
3
2
VAB
(volts)
1
0
30
IL (mA)
RDC = RDC1 + RDC2 = 54.34 kΩ
BAT = –48 V
Notes:
1250
1. V AB = I L R L' = ------------ R L' , where R L' = R L + 2 R F
R DC
R DC
2. V AB = 0.857 ( V BAT + 3.3 ) – I L ----------300
R DC
3. V AB = 0.857 ( V BAT + 1.2 ) – I L ----------300
a. Load Line (Typical)
A
a
RL
I
SLIC
L
RSN
RDC1
b
RDC2
B
RDC
Feed current programmed by RDC1 and RDC2
b. Feed Programming
Figure 1. DC Feed Characteristics
10
Am7920 Data Sheet
CDC
TEST CIRCUITS
A(TIP)
RL
2
VTX
SLIC
VAB
VL
RT
AGND
RL
RRX
2
RSN
B(RING)
IL2-4 = 20 log (VTX / VAB)
A. Two- to Four-Wire Insertion Loss
A(TIP)
VTX
SLIC
VAB
RL
AGND
RT
RRX
B(RING) RSN
VRX
IL4-2 = 20 log (VAB / VRX)
BRS = 20 log (VTX / VRX)
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
1
ωC
A(TIP)
<< RL
S1
SLIC
2
C
VL
VL
VTX
RL
VAB
AGND
RT
RL
S2
2
B(RING)
RRX
RSN
VRX
S2 Open, S1 Closed
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
S2 Closed, S1 Open
4-L Long. Sig. Gen. = 20 log (VL / VRX)
C. Longitudinal Balance
SLIC Products
11
TEST CIRCUITS (continued)
ZD
A(TIP)
R
VTX
RT1
SLIC
VS
VM
AGND
R
ZIN
CT1
RT2
B(RING)
RSN
ZD: The desired impedance;
e.g., the characteristic impedance of the line
RRX
Return loss = –20 log (2 VM / VS)
D. Two-Wire Return Loss Test Circuit
VCC
6.2 kΩ
A(TIP)
DET
15 pF
RL = 600 Ω
B(RING)
E1
E. Loop-Detector Switching
C1
L1
200 Ω
50 Ω
A
RF1
200 Ω
RF2
B
HF
GEN
50 Ω
50 Ω
C2
L2
CBX
33 nF
VTX
SLIC
under test
1.5 Vrms
80% Amplitude
Modulated
100 kHz to 30 MHz
F. RFI Test Circuit
12
CAX
33 nF
Am7920 Data Sheet
TEST CIRCUITS (continued)
+5 V
VCC
DA
DB
RD
2.2 nF
RD
CD
VTX
VTX
A(TIP)
A(TIP)
RT
HPA
CHP
HPB
B(RING)
B(RING)
VRX
RSN
RDC1
2.2 nF
RRX
RDC2
RDC
CDC
RINGOUT
RYOUT1
RYOUT3
RYOUT3
BGND
AGND/
DGND
D3
BATTERY
GROUND
D2
D1
VBREF
VBAT
BAT
C2
ANALOG
GROUND
C1
D1
TMG
RTMG
DET
CAS
CCAS
DIGITAL
GROUND
G. Am7920 Test Circuit
SLIC Products
13
PHYSICAL DIMENSIONS
PL032
.485
.495
.447
.453
.009
.015
.585
.595
.042
.056
.125
.140
Pin 1 I.D.
.080
.095
.547
.553
SEATING
PLANE
.400
REF.
.490
.530
.013
.021
.050 REF.
.026
.032
TOP VIEW
16-038FPO-5
PL 032
DA79
6-28-94 ae
SIDE VIEW
SOW028
28
15
.453
.500
.324
.350
0°
8°
1
.016
.050
14
.050 BSC
DETAIL A
.697
.728
0.86
0.90
.080
.100
.006
.0125
.002
.014
0.14
0.20
.014
.024
0.045 MIN.
16-038-SO28-2_AC
SOW28
DF87
9-3-97 lv
DETAIL A
14
Am7920 Data Sheet
REVISION SUMMARY
Revision C to Revision D
•
Minor changes were made to the datasheet style and format to conform to Legerity standards.
Revision D to Revision E
•
Absolute Maximum Ratings: Added ESD immunity specification.
Revision E to Revision F
•
Added the 28-pin SOIC connection diagram and the SC option to the ordering information.
Revision F to Revision G
•
The physical dimension (PL032) was added to the Physical Dimension section.
Revision G to Revision H
•
Deleted the plastic DIP package and references to it.
•
Updated the Pin Description table to correct inconsistencies.
SLIC Products
15
Notes:
www.legerity.com
16
Am7920 Data Sheet
Notes:
www.legerity.com
SLIC Products
17
Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system
cost of our customers' products. By combining process, design, systems architecture, and a complete set of
software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity
ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places
Legerity in a class by itself.
The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product
descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights
is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever,
and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness
for a particular purpose, or infringement of any intellectual property right.
Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the
body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create
a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or
make changes to its products at any time without notice.
© 1999 Legerity, Inc.
All rights reserved.
Trademarks
Legerity, the Legerity logo and combinations thereof, DSLAC and QSLAC are trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
P.O. Box 18200
Austin, Texas 78760-8200
Telephone: (512) 228-5400
Fax: (512) 228-5510
North America Toll Free: (800) 432-4009
To contact the Legerity Sales Office nearest you,
or to download or order product literature, visit
our website at www.legerity.com.
To order literature in North America, call:
(800) 572-4859
or email:
americalit@legerity.com
To order literature in Europe or Asia, call:
44-0-1179-341607
or email:
Europe — eurolit@legerity.com
Asia — asialit@legerity.com