MAXIM MAX4865LEUT

19-3582; Rev 2; 5/10
Overvoltage Protection Controllers
with Reverse Polarity Protection
The MAX4864L/MAX4865L/MAX4866L/MAX4867 overvoltage protection controllers protect low-voltage systems against high-voltage faults up to +28V, and
negative voltages down to -28V. These devices drive a
low-cost complementary MOSFET. If the input voltage
exceeds the overvoltage threshold, these devices turn
off the n-channel MOSFET to prevent damage to the
protected components. If the input voltage drops below
ground, the devices turn off the p-channel MOSFET to
prevent damage to the protected components. An internal charge pump eliminates the need for external
capacitors and drives the MOSFET GATEN for a simple,
robust solution.
The overvoltage thresholds are preset to +7.4V
(MAX4864L), +6.35V (MAX4865L), +5.8V (MAX4866L),
and +4.65V (MAX4867). When the input voltage drops
below the undervoltage lockout (UVLO) threshold, the
devices enter a low-current standby mode (8.5µA). Also in
shutdown (EN set to logic-high), the current is reduced further (0.4µA). The MAX4864L/MAX4865L/MAX4866L have
a +2.85V UVLO threshold, and the MAX4867 has a +2.5V
UVLO threshold.
In addition, a ±15kV ESD protection is provided to the
input when bypassed with a 1µF capacitor to ground. All
devices are offered in a small 6-pin SOT23 and a 6-pin,
2mm x 2mm µDFN package, and are specified for
operation over the -40°C to +85°C temperature range.
Applications
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
Features
♦ Overvoltage Protection Up to +28V
♦ Reverse Polarity Protection Down to -28V
♦ Preset Overvoltage (OV) Trip Level (7.4V, 6.35V,
5.8V, 4.65V)
♦ Drive Low-Cost Complementary MOSFET
♦ Internal 50ms Startup Delay
♦ Internal Charge Pump
♦ 8.5µA Standby Current (In UVLO Mode)
♦ 0.4µA Shutdown Current
♦ Overvoltage Fault FLAG Indicator
♦ 6-Pin (2mm x 2mm) µDFN and 6-Pin SOT23
Packages
Ordering Information
PART
PINPACKAGE
OV TRIP
LEVEL (V)
TOP
MARK
ABVO
MAX4864LEUT-T
6 SOT23-6
7.40
MAX4864LELT
6 μDFN
7.40
AAE
MAX4865LEUT-T
6 SOT23-6
6.35
ABVP
MAX4865LELT
6 μDFN
6.35
AAF
MAX4866LEUT-T
6 SOT23-6
5.80
ABVQ
MAX4866LELT
6 μDFN
5.80
AAG
MAX4867EUT-T
6 SOT23-6
4.65
ABVN
MAX4867ELT
6 μDFN
4.65
AAD
Note: All devices are specified over the -40°C to +85°C operating
temperature range.
T = Tape and reel.
Typical Operating Circuit
ADAPTER
(-28V TO +28V)
P
N
OUTPUT
1μF
GATEP
EN
GND
IN
Functional Diagram appears at end of data sheet.
GATEN
MAX4864L
MAX4865L
MAX4866L
MAX4867
VIO
FLAG
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX4864L/MAX4865L/MAX4866L/MAX4867
General Description
MAX4864L/MAX4865L/MAX4866L/MAX4867
Overvoltage Protection Controllers
with Reverse Polarity Protection
ABSOLUTE MAXIMUM RATINGS
IN to GND ..............................................................-0.3V to +30V
GATEN, GATEP to GND ........................................-0.3V to +12V
IN to GATEP ...........................................................-0.3V to +20V
FLAG, EN to GND ....................................................-0.3V to +6V
Continuous Power Dissipation (TA = +70°C)
6-Pin µDFN (2mm x 2mm) (derate 2.1mW/°C
above +70°C) ..............................................................168mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C)............696mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .................................................... +150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Soldering Temperature (reflow) ......................................+240°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +5V (MAX4864L/MAX4865L/MAX4866L), VIN = +4V (MAX4867), TA = -40°C to +85°C, CGATEN = 500pF, unless otherwise
noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
Input Voltage Range
Overvoltage Trip Level
SYMBOL
CONDITIONS
VIN
OVLO
Overvoltage Lockout
Hysteresis
MIN
1.2
VIN rising
UVLO
Undervoltage Lockout
Hysteresis
IN Supply Current
UVLO Supply Current
MAX4865L
5.95
6.35
6.75
MAX4866L
5.45
5.8
6.15
MAX4867
4.35
4.65
4.95
MAX4865L
65
MAX4866L
55
50
2.65
2.85
3.05
MAX4867
2.3
2.5
2.7
MAX4864L/MAX4865L/MAX4866L
44
MAX4867
25
77
120
MAX4867
68
110
EN = GND
MAX4864L/MAX4865L/MAX4866L,
VIN = +2.6V
8.5
22
8
18
EN = 1.6V
MAX4864L/MAX4865L/MAX4866L,
VIN = 3.6V
0.4
2
IUVLO
GATEN Pulldown Current
VGATEN
IPD
1µA load
MAX4864L/MAX4865L/MAX4866L
MAX4867
0.4
2
9
9.83
10
7.5
7.85
8.0
µA
µA
µA
V
12
32
65
GATEP Clamp Voltage
VCLAMP
13.5
16.5
19.5
V
GATEP Pulldown Resistor
RGATEP
32
48
64
kΩ
FLAG Output-Low Voltage
VOL
0.4
V
1
µA
FLAG Leakage Current
ISINK = 1mA
VFLAG = +5.5V
EN Input-High Voltage
VIH
EN Input-Low Voltage
VIL
2
VIN > OVLO, VGATEN = +5.5V
V
mV
MAX4864L/MAX4865L/MAX4866L
EN = GND
V
mV
MAX4864L/MAX4865L/MAX4866L
MAX4867, VIN = 3.6V
GATEN Voltage
V
7.8
75
IIN
ISHD
28.0
7.4
MAX4867, VIN = +2.2V
Shutdown Supply Current
UNITS
7.0
MAX4864L
VIN falling
MAX
MAX4864L
MAX4867
Undervoltage Lockout
Threshold
TYP
1.5
_______________________________________________________________________________________
mA
V
0.4
V
Overvoltage Protection Controllers
with Reverse Polarity Protection
(VIN = +5V (MAX4864L/MAX4865L/MAX4866L), VIN = +4V (MAX4867), TA = -40°C to +85°C, CGATEN = 500pF, unless otherwise
noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
EN Input Leakage Current
ILKG
CONDITIONS
MIN
TYP
EN = GND or +5.5V
MAX
UNITS
1
µA
TIMING
Startup Delay
tSTART
VIN > UVLO to VGATEN > 0.3V, Figure 1
20
50
80
ms
FLAG Blanking Time
tBLANK
VGATEN > 0.3V to VFLAG < 0.3V, Figure 1
20
50
80
ms
GATEN Turn-On Time
tGON
CGATEN = 500pF, VGATEN = 0.3V to +8V
(MAX4864L/MAX4865L/MAX4866L)
VGATEN = 0.3V to +7V (MAX4867), Figure 1
10
tGOFF
VIN rising at 3V/µs from +5V to +8V
(MAX4864L/MAX4865L/MAX4866L),
or from +4V to +7V (MAX4867)
VGATEN = 0.3V, CGATEN = 500pF, Figure 2
7
FLAG Assertion Delay
tFLAG
VIN rising at 3V/µs from 5V to 8V
(MAX4864L/MAX4865L/MAX4866L),
or from +4V to +7V (MAX4867), VFLAG = 0.3V,
Figure 2
3.5
µs
Initial Overvoltage Fault Delay
tOVP
VIN rising at 3V/µs from 0V to +9V, time from
VIN = 5V to IGATEN = 80% of IPD (GATEN pulldown
current), Figure 3
1.5
µs
GATEN Turn-Off Time
ms
20
µs
Disable Time
tDIS
VEN = +2.4V, VGATEN = 0.3V, Figure 4
2
µs
Note 1: All parts are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and correlation.
+5V
VIN
VIN
VUVLO
VOVLO
tFLAG
+5V
tGON
tGOFF
+8V (+7V)*
tSTART
VGATEN
VGATEN
+0.3V
+0.3V
VFLAG
tBLANK
*MAX4867
Figure 1. Startup Timing Diagram
VIN
+0.3V
VFLAG
+0.3V
Figure 2. Shutdown Timing Diagram
VEN
VOVLO
+2.4V
0V
tOVP
tDIS
80%
IGATEN
VGATEN
Figure 3. Power-Up Overvoltage Timing Diagram
+0.3V
Figure 4. Disable Timing Diagram
_______________________________________________________________________________________
3
MAX4864L/MAX4865L/MAX4866L/MAX4867
ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
REVERSE CURRENT vs. OUTPUT VOLTAGE
(MAX4864L)
200
150
100
0.3
EN = 0V
REVERSE CURRENT (μA)
250
80
MAX4864 toc02
EN = 3V
REVERSE CURRENT (μA)
300
SUPPLY CURRENT (μA)
0.4
MAX4864 toc01
350
REVERSE CURRENT vs. OUTPUT VOLTAGE
(MAX4864L)
0.2
0.1
MAX4864 toc03
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(MAX4864L)
60
DEVICE TURNS ON
AT TRANSITION
40
20
50
0
0
5
10
15
20
25
30
0
0
1
2
3
5
4
0
1
2
3
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
MAX4864L/MAX4865L/MAX4866L
GATEN VOLTAGE vs. INPUT VOLTAGE
MAX4867
GATEN VOLTAGE vs. INPUT VOLTAGE
POWER-UP RESPONSE
9
MAX4865L
6
3
12
GATEN VOLTAGE (V)
MAX4864L
12
5
5V
MAX4867
5V
9
IN
0V
6
10V
GATEN
0V
5V
0
0
0
2
4
6
8
0V
0
2
INPUT VOLTAGE (V)
4
6
8
20ms/div
INPUT VOLTAGE (V)
POWER-UP RESPONSE
OVERVOLTAGE RESPONSE
MAX4864 toc07
MAX4864 toc08
ADAPTER
5V/div
8V
ADAPTER
5V
IN
5V/div
OUT
5V/div
8V
IN
5V
GATEN
5V/div
IIN
1A/div
IGATEN
10mA/div
FLAG
5V/div
20ms/div
4
ADAPTER
0V
3
MAX4866L
4
MAX4864 toc06
15
MAX4864 toc04
15
MAX4864 toc05
0
GATEN VOLTAGE (V)
MAX4864L/MAX4865L/MAX4866L/MAX4867
Overvoltage Protection Controllers
with Reverse Polarity Protection
FLAG
5V/div
2μs/div
_______________________________________________________________________________________
FLAG
Overvoltage Protection Controllers
with Reverse Polarity Protection
POWER-UP OVERVOLTAGE RESPONSE
NEGATIVE VOLTAGE RESPONSE
MAX4864 toc09
MAX4864 toc10
8V
5V
ADAPTER
0V
ADAPTER
0V
8V
IN
0V
GATEP
0V
IN
0V
GATEN
0V
5V
FLAG
0V
20ms/div
5V
FLAG
0V
20ms/div
_______________________________________________________________________________________
5
MAX4864L/MAX4865L/MAX4866L/MAX4867
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX4864L/MAX4865L/MAX4866L/MAX4867
Overvoltage Protection Controllers
with Reverse Polarity Protection
Pin Configuration
TOP VIEW
+
+
IN 1
GND 2
MAX4864L
MAX4865L
MAX4866L
MAX4867
FLAG 3
SOT23
6
EN
GND
1
5
GATEP
FLAG
2
4
GATEN
IN
3
MAX4864L
MAX4865L
MAX4866L
MAX4867
6
GATEN
5
GATEP
4
EN
μDFN
Pin Description
PIN
MAX4864LEUT/
MAX4865LEUT/
MAX4866LEUT/
MAX4867EUT
MAX4864LELT/
MAX4865LELT/
MAX4866LELT/
MAX4867ELT
1
3
IN
2
1
GND
Ground
6
NAME
FUNCTION
Voltage Input. IN is both the power-supply input and the overvoltage sense input.
3
2
FLAG
Fault-Indication Output. When EN goes high, FLAG becomes high-impedance. FLAG
is asserted high during undervoltage lockout and overvoltage lockout conditions.
FLAG is deasserted during normal operation. FLAG is an open-drain output.
4
6
GATEN
n-Channel MOSFET Gate-Drive Output. GATEN is the output of an on-chip charge
pump. When VUVLO < VIN < VOVLO, GATEN is driven high to turn on the external
n-channel MOSFET.
5
5
GATEP
p-Channel MOSFET Gate-Drive Output. GATEP is always on when input is above
ground and off when input drops below ground.
6
4
EN
Active-Low Enable Input. Connect to ground in normal operation. Drive EN high to
disable device and enter shutdown mode.
_______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
The MAX4864L/MAX4865L/MAX4866L/MAX4867 provide
up to +28V overvoltage and negative voltage protection
for low voltage systems. When the input voltage exceeds
the overvoltage trip level, the MAX4864L/MAX4865L/
MAX4866L/MAX4867 turn off a low-cost external n-channel
MOSFET to prevent damage to the protected components. The devices also drive an external p-channel
MOSFET to protect against negative voltage inputs. An
internal charge-pump (see the Functional Diagram),
drives the MOSFET GATEN for a simple, robust solution.
On power-up, the device waits for 50ms before driving
GATEN high. The open-drain FLAG output is kept at a
high impedance for an additional 50ms after GATEN goes
high before deasserting. The FLAG output asserts high
immediately to an overvoltage fault.
Undervoltage Lockout (UVLO)
The MAX4864L/MAX4865L/MAX4866L have a fixed
+2.85V typical UVLO level, and the MAX4867 has
+2.5V UVLO level. When VIN is less than the UVLO, the
GATEN driver is held low and FLAG is asserted.
Overvoltage Lockout (OVLO)
The MAX4864L has a +7.4V typical OVLO threshold;
the MAX4865L has +6.35V typical OVLO threshold; the
MAX4866L has a +5.8V typical OVLO threshold; and
the MAX4867 has a +4.65V typical OVLO threshold.
When VIN is greater than OVLO, the GATEN driver is
held low and FLAG is asserted.
output voltage is a function of input voltage, as shown
in the Typical Operating Characteristics.
GATEP Driver
When the input voltage drops below ground, GATEP
goes high turning the external p-channel MOSFET off.
When the input voltage goes above ground, GATEP
pulls low and turns on the p-channel MOSFET. An internal clamp protects the p-channel MOSFET by insuring
that the GATEP-to-IN voltage does not exceed +16V
when the input (IN) rises to +28V.
Device Operation
The MAX4864L/MAX4865L/MAX4866L/MAX4867 have
an on-board state machine to control device operation.
A flowchart is shown in Figure 5. On initial power-up, if
VIN < UVLO or if VIN > OVLO, GATEN is held at 0V and
FLAG is high.
If UVLO < VIN < OVLO, the device enters startup after a
50ms internal delay. The internal charge pump is
enabled, and GATEN begins to be driven above VIN by
the internal charge pump. FLAG is held high during
startup until the FLAG blanking period expires, typically
50ms after the GATEN starts going high. At this point,
the device is in its on-state.
At any time if VIN drops below UVLO, FLAG is driven
high and GATEN is driven to ground.
STANDBY
GATEN = 0
FLAG = HIGH
FLAG Output
The open-drain FLAG output is used to signal to the
host system when there is a fault with the input voltage.
On power-up, FLAG is held high for 50ms after GATEN
turns on, before deasserting. FLAG asserts immediately
to overvoltage and undervoltage faults. When the fault
condition is removed, FLAG deasserts 50ms after
GATEN turns on. Connect a pullup resistor from FLAG
to the logic I/O voltage of the host system.
VIN > UVLO
TIMER STARTS
COUNTING
t = 50ms
VIN < UVLO
GATEN Driver
An on-chip charge pump is used to drive GATEN
above IN, allowing the use of a low-cost n-channel
MOSFET. The charge pump operates from the internal
+5.5V regulator.
The actual GATEN output voltage tracks approximately
two times VIN until VIN exceeds +5.5V, or the OVLO trip
level is exceeded, whichever comes first. The
MAX4864L has a +7.4V typical OVLO, therefore GATEN
remains relatively constant at approximately +10.5V for
+5.5V < VIN < +7.4V. The MAX4866L has a +5.8V typical OVLO, but this can be as low as +5.5V. The GATEN
OVLO CHECK
GATEN = 0
FLAG = HIGH
VIN > OVLO
STARTUP
GATEN DRIVEN HIGH
FLAG = HIGH
VIN > OVLO
t = 50ms
ON
GATEN HIGH
FLAG = LOW
Figure 5. State Diagram
_______________________________________________________________________________________
7
MAX4864L/MAX4865L/MAX4866L/MAX4867
Detailed Description
MAX4864L/MAX4865L/MAX4866L/MAX4867
Overvoltage Protection Controllers
with Reverse Polarity Protection
ADAPTER
-28V TO +28V
N
P
N
OUTPUT
1μF
that if the input is actually pulled low, the output will
also be pulled low due to the parasitic body diode in
the MOSFET. If this is a concern, then the back-to-back
configuration should be used.
MOSFET Selection
IN
GATEP
MAX4864L
MAX4865L
MAX4866L
MAX4867
GND
The MAX4864L/MAX4865L/MAX4866L/MAX4867 are
designed for use with a complementary MOSFET or single p-channel and dual back-to-back n-channel
MOSFETs. In most situations, MOSFETs with RON specified for a VGS of 4.5V work well. Also the VDS should
be +30V for the MOSFET to withstand the full +28V IN
range of the MAX4864L/MAX4865L/MAX4866L/
MAX4867. Table 1 shows a selection of MOSFETs
which are appropriate for use with the MAX4864L/
MAX4865L/MAX4866L/MAX4867.
GATEN
VIO
FLAG
Figure 6. Back-to-Back External MOSFET Configuration
IN Bypass Considerations
Applications Information
MOSFET Configuration
The MAX4864L/MAX4865L/MAX4866L/MAX4867 can be
used with either a complementary MOSFET configuration
as shown in the Typical Operating Circuit, or can be configured with a single p-channel MOSFET and back-toback n-channel MOSFETs as shown in Figure 6.
The MAX4864L/MAX4865L/MAX4866L/MAX4867 can drive
either a complementary MOSFET or a single p-channel
MOSFET and back-to-back n-channel MOSFETs. The
back-to-back configuration has almost zero reverse current when the adapter is not present or when the
adapter voltage is below the UVLO threshold.
If reverse current leakage is not a concern, a single
MOSFET can be used. This approach has half the loss
of the back-to-back configuration when used with similar MOSFET types and is a lower cost solution. Note
For most applications, bypass ADAPTER to GND with a
1µF ceramic capacitor. If the power source has significant inductance due to long lead length, take care to
prevent overshoots due to the LC tank circuit and provide protection if necessary to prevent exceeding the
+30V absolute maximum rating on IN.
ESD Test Conditions
ESD performance depends on a number of conditions. The
MAX4864L/MAX4865L/MAX4866L/MAX4867 are specified
for ±15kV typical ESD resistance on IN when ADAPTER is
bypassed to ground with a 1µF ceramic capacitor.
Human Body Model
Figure 7 shows the Human Body Model, and Figure 8
shows the current waveform it generates when discharged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the device through a
1.5kΩ resistor.
Table 1. MOSFET Suggestions
PART
Si5504DC
CONFIGURATION/
PACKAGE
VGS MAX
(V)
Complementary
MOSFET/1206-8
±20
VDS MAX
(V)
RON AT 4.5V (mΩ)
+30
143 (n-MOSFET)
-30
290 (p-MOSFET)
Si5902DC
Dual/1206-8
±20
+30
143 (n-MOSFET)
Si1426DH
Single/µDFN-6
±20
+30
115 (n-MOSFET)
Si5435DC
Single/1206-8
±20
-30
80 (p-MOSFET)
FDC6561AN
Dual/SSOT-6
±20
+30
145 (n-MOSFET)
FDG315N
Single/µDFN-6
±20
+30
160 (n-MOSFET)
FDC658P
Single/SSOT-6
±20
-30
75 (p-MOSFET)
FDC654P
Single/SSOT-6
±20
-30
125 (p-MOSFET)
8
MANUFACTURER
Vishay Siliconix
Fairchild Semiconductor
_______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
CHARGE-CURRENT
LIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
RD
1.5kΩ
IP 100%
90%
DISCHARGE
RESISTANCE
Ir
AMPERES
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
36.8%
10%
0
0
Figure 7. Human Body ESD Test Model
CHARGE-CURRENT
LIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
tDL
CURRENT WAVEFORM
Figure 8. Human Body Current Waveform
RD
330Ω
I
100%
90%
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
TIME
tRI
IPEAK
RC
50MΩ TO 100MΩ
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
DEVICE
UNDER
TEST
10%
tR = 0.7ns TO 1ns
t
30ns
60ns
Figure 9. IEC 1000-4-2 ESD Test Model
Figure 10. IEC 1000-4-2 ESD Generator Current Waveform
IEC 1000-4-2
Since January 1996, all equipment manufactured
and/or sold in the European Union has been required to
meet the stringent IEC 1000-4-2 specification. The IEC
1000-4-2 standard covers ESD testing and performance of finished equipment. It does not specifically
refer to ICs. The MAX4864L/MAX4865L/MAX4866L/
MAX4867 help users design equipment that meets
Level 3 of IEC 1000-4-2, without additional ESD-protection components.
The main difference between tests done using the
Human Body Model and IEC 1000-4-2 is higher peak
current in IEC 1000-4-2. Because series resistance is
lower in the IEC 1000-4-2 ESD test model (Figure 9), the
ESD-withstand voltage measured to this standard is gen-
erally lower than that measured using the Human Body
Model. Figure 10 shows the current waveform for the
±8kV IEC 1000-4-2 Level 4 ESD Contact Discharge test.
The Air-Gap test involves approaching the device with a
charger probe. The Contact Discharge method connects
the probe to the device before the probe is energized.
Chip Information
PROCESS: BiCMOS
_______________________________________________________________________________________
9
MAX4864L/MAX4865L/MAX4866L/MAX4867
RC
1MΩ
MAX4864L/MAX4865L/MAX4866L/MAX4867
Overvoltage Protection Controllers
with Reverse Polarity Protection
Functional Diagram
ADAPTER
P
GATEP
N
IN
OUTPUT
GATEN
GND
MAX4864L
MAX4865L
MAX4866L
MAX4867
+15V CLAMP
+5.5V
REGULATOR
2x CHARGE
PUMP
GATE
DRIVER
VIO
UVLO AND OVLO
DETECTOR
EN
CONTROL
LOGIC AND TIMER
FLAG
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the
package regardless of RoHS status.
10
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
6 µDFN
L622-1
21-0164
6 SOT23
U6-1
21-0058
______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
2
5/10
Deleted package codes from the Ordering Information table;
updated the Pin Configuration, Figure 7, and Figure 8; deleted the transistor count
from the Chip Information section
1, 6, 8, 9
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MAX4864L/MAX4865L/MAX4866L/MAX4867
Revision History