19-3705; Rev 0; 5/05 KIT ATION EVALU E L B AVAILA Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs ♦ Low-Cost Dual Linear Regulators ♦ Output Voltage Accuracy ±5mV ♦ Independent 0.5V to 2.5V Reference Inputs ♦ Foldback Current-Limit Protection ♦ Output Undervoltage-Lockout Protection ♦ Thermal Limit (Internal Sensor) ♦ 1.0V to 5.5V Input Supply Voltage (External FET Drain) ♦ 5V Bias Supply Voltage ♦ Independent Power-Good Open-Drain Outputs ♦ Independent Enable Inputs ♦ Soft-Shutdown Output Discharge ♦ Low Supply Current (0.5mA) ♦ 5µA (max) Shutdown Supply Current Ordering Information PART MAX8737ETE TEMP RANGE PIN-PACKAGE -40°C to +85°C 16 Thin QFN-EP* 4mm x 4mm MAX8737ETE+ -40°C to +85°C 16 Thin QFN-EP* 4mm x 4mm *EP = Exposed pad. +Denotes lead-free packaging. Notebook and Desktop Computers REFIN2 Applications OUT2 TOP VIEW CS2 Pin Configuration N.C. The MAX8737 dual high-power linear regulator controllers use external n-channel MOSFETs to generate two independent low-voltage supplies for notebook computers. The MAX8737 delivers low output voltages from 0.5V to 2.5V (±5mV no-load accuracy). The external components allow scalable current design with loads up to 5A with excellent load regulation (1%). The regulator operates from a low input voltage, which also reduces the power dissipation in the external n-channel MOSFET. The controller powers the external MOSFET gate driver from the standard 5V system supply. The MAX8737 includes current and thermal limits to prevent damage to the linear regulator. The MAX8737 uses an external resistive divider to fold back the current limit, reducing the overall power dissipation. The MAX8737 uses an external resistive-divider in series with the current-sense input (CS_), providing foldback current-limit protection, and effectively reducing the short-circuit power dissipation. An output undervoltage timeout is available for low-cost applications that omit the current-sense resistor. The output undervoltage (UVP) timing depends on the magnitude of the voltage at VOUT. The UVP detects and shuts down the LDO if the output voltage drops out of regulation. The controller uses an adjustable reference input (REFIN_) to set the nominal output voltage (VOUT_), which minimizes the cost and makes the stability independent of the output voltage. Each linear regulator features an adjustable soft-start function, and generates a delayed power-good (PGOOD) signal that signals when the linear regulator is in regulation. The MAX8737 is a low-cost solution requiring few external components and is available in a small, 4mm x 4mm, 16-pin thin QFN package. Features 12 11 10 9 DRV2 13 8 EN1 7 EN2 GND 15 6 PGOOD1 DRV1 16 5 PGOOD2 Point-of-Load Regulators VMCH and VCCP CPU Supplies Low-Voltage Bias Supplies N.C. 14 MAX8737 2 3 4 OUT1 REFIN1 VCC 1 CS1 Servers 4mm x 4mm TQFN ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX8737 General Description MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +6V OUT1, OUT2 to GND................................................-0.3V to +6V REFIN1, REFIN2, PGOOD1, PGOOD2, EN1, EN2 to GND..........................................................-0.3V to +6V DRV1, DRV2, CS1, CS2 to GND.................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70°C) 16-Pin 4mm x 4mm Thin QFN (derated 25mW/°C above +70°C).............................................................2000mW Operating Temperature Range MAX8737ETE ...................................................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER Supply Voltage Range SYMBOL VCC Undervoltage Lockout Threshold VCC Quiescent Supply Current CONDITIONS MAX UNITS 5.50 V 4.35 4.6 V EN1 = EN2 = VCC 0.5 1 mA EN1 = EN2 = GND 0.1 5 µA VCC Rising edge, 200mV hysteresis (typ) ICC VCC Shutdown Supply Current MIN TYP 4.75 4.1 REFIN to OUT Offset Voltage VOUT_ -5 +5 mV OUT_ Input Bias Current IOUT_ -1 +1 µA DRIVERS Output high; VOUT_ = VREFIN_ - 25mV, ILOAD = 1mA DRV_ Output Voltage Swing (Note 1) VCC 0.3 VCC 0.05 V Output low; VOUT_ = VREFIN_ + 25mV, ILOAD = 1mA 0.03 0.3 DRV_ Maximum Sourcing Current VOUT_ = VREFIN_ - 25mV; VDRV = 3V 6 14 mA DRV_ Maximum Sinking Current VOUT_ = VREFIN_ + 25mV; VDRV = 3V 6 14 mA 0.8 S -80 dB OUT_ to DRV_ Transconductance (Large Signal) GMDRV DRV_ Power-Supply Rejection Ratio DRV_ Soft-Start Charging Current 10Hz < f < 10kHz, IDRV = 1mA, CDRV = 10nF ISOFT 40 170 400 µA 2.5 V -10 +100 nA REFERENCE INPUT REFIN_ Voltage Range VREFIN_ VCC = 4.75V to 5.5V 0.5 REFIN_ Input Bias Current IREFIN_ VREFIN_ = 0 to 2.5V -100 TSHDN Hysteresis = 20°C FAULT PROTECTION Thermal Shutdown Threshold Current-Limit Threshold VILIM VCS_ - VOUT_ +125 TA = 0°C to +85°C TA = +85°C CS_ Input Current Linear Regulator UVP Threshold (Slow) 2 10 13 7.5 10 12.5 -1 UVP(SLOW) With respect to VREFIN; CS_ = VCC °C 7 72 80 _______________________________________________________________________________________ mV +1 µA 88 % Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs (VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 54 60 66 % Linear Regulator UVP Threshold (Fast) UVP(FAST) Slow Short-Circuit Timer Duration tUVP(SLOW) With respect to VREFIN; CS_ = VCC 75 µs Fast Short-Circuit Timer Duration tUVP(FAST) 5 µs Discharge-Mode On-Resistance OUT_ Pin ROUT 10 Ω With respect to VREFIN; CS_ = VCC With respect to VREFIN; CS_ = VCC INPUTS AND OUTPUTS EN_ Input Low Level 0.6 EN_ Input High Level Rising edge, 200mV (typ) hysteresis Enable Leakage Current 1.6 -1 Power-Good Trip Threshold (Lower) With respect to error comparator threshold, hysteresis = 4% (falling edge) -15 Power-Good Startup Delay Power-Good Propagation Delay tPGOOD Power-Good Output Low Voltage Power Good Leakage Current OUT_ forced 2% beyond PGOOD_ trip threshold -12 +1 µA -9 % 2 ms 1 µs ISINK = 4mA I GOO 0.3 VOUT_ = 1.0V (PGOOD_ high impedance), V V 1 V µA ELECTRICAL CHARACTERISTICS (VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER Supply Voltage Range SYMBOL VCC Undervoltage Lockout Threshold VCC Quiescent Supply Current Rising edge 200mV hysteresis (typ) ICC VCC Shutdown Supply Current REFIN to OUT Offset Voltage CONDITIONS VCC MAX UNITS 4.75 MIN 5.50 V 4.1 4.6 V 1.5 mA EN1 = EN2 = VCC EN1 = EN2 = GND VOUT_ -7 TYP 5 µA +7 mV DRIVERS Output high; VOUT_ = VREFIN_ - 25mV; ILOAD = 1mA DRV_ Output Voltage Swing (Note 1) VCC 0.3 V Output low; VOUT_ = VREFIN_ + 25mV: ILOAD = 1mA 0.3 DRV_ Maximum Sourcing Current VOUT_ = VREFIN_ - 25mV; VDRV = 3V 3.5 DRV_ Maximum Sinking Current VOUT_ = VREFIN_ + 25mV; VDRV = 3V 3.5 DRV_ Soft-Start Charging Current ISOFT 40 mA mA 400 µA _______________________________________________________________________________________ 3 MAX8737 ELECTRICAL CHARACTERISTICS (continued) ELECTRICAL CHARACTERISTICS (continued) (VCC = 5V, EN_ = CS_ = VCC, VREFIN = 1.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS REFERENCE INPUT REFIN_ Voltage Range VREFIN_ VCC = 4.75V to 5.5V 0.5 2.5 V VCS_ - VOUT_ 6.5 13.5 mV FAULT PROTECTION Current-Limit Threshold VILIM Linear Regulator UVP Threshold (Slow) UVP(SLOW) With respect to VREFIN; CS_ = VCC 72 88 % Linear Regulator UVP Threshold (Fast) UVP(FAST) 54 66 % 0.6 V With respect to VREFIN; CS_ = VCC INPUTS AND OUTPUTS EN_ Input Low Level EN_ Input High Level 1.6 Power-Good Trip Threshold (Lower) With respect to error comparator threshold, hysteresis = 4% (falling edge) Power-Good Output Low Voltage ISINK = 4mA V -15 -9 % 0.3 V Note 1: Low threshold n-channel MOSFET is required for 2.5V (±2%) output. Note 2: Specifications to -40°C are guaranteed by design, not production tested. Typical Operating Characteristics (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) OUTPUT-VOLTAGE DEVIATION vs. LOAD CURRENT FOLDBACK CURRENT LIMIT vs. OUTPUT VOLTAGE 3 1 0 -1 -2 0 2.0 3V 1.6 0 1.5V -5 1.2 C 0 5V 0.5 1.0 LOAD CURRENT (A) 1.5 2.0 D 0 0 0 A B 0.4 VOUT = 1.5V 5V 2.4 0.8 -3 -4 4 2.8 CURRENT LIMIT (A) 2 MAX8737 toc02 4 SOFT-START (EN RISING EDGE) MAX8737 toc03 3.2 MAX8737 toc01 5 OUTPUT-VOLTAGE DEVIATION (mV) MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs 0 0.5 1.0 OUTPUT VOLTAGE (V) 1.5 1ms/div A. EN1, 5V/div B. DRV1, 2V/div NO LOAD C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div _______________________________________________________________________________________ Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs SOFT-STOP (EN FALLING EDGE) SOFT-START (UVLO RISING EDGE) MAX8737 toc04 5V SOFT-STOP (UVLO FALLING EDGE) MAX8737 toc05 A 0 5V MAX8737 toc06 A 0 3V 3V 3V B 0 1.5V C 0 5V D 0 D 2ms/div A 0 2A B 0 0.1A MAX8737 toc09 A 2.1A B 2.7V C 1.7V 1.51V D 1.50V A 0 2A B 0 3.2V C C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div LOAD TRANSIENT (NO LOAD TO 2A) MAX8737 toc08 MAX8737 toc07 3.2V 2.8V A. 5V BIAS (VCC), 5V/div B. DRV1, 2V/div NO LOAD, EN = VCC C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div LOAD TRANSIENT (NO LOAD TO 2A) LOAD TRANSIENT (0.1A TO 2.1A) D 0 2ms/div A. 5V BIAS (VCC), 5V/div B. DRV1, 2V/div NO LOAD, EN = VCC C. LDO1 OUTPUT, 1V/div D. PGOOD1, 5V/div 0 C 0 5V 0 100µs/div A. EN1, 5V/div B. DRV1, 2V/div NO LOAD B 0 1.5V C 0 5V A 0 B 0 1.5V 5V 3.2V C 2.7V 1.50V D 1.45V 1.50V D 1.45V 1.49V 10µs/div A. CONTROL SIGNAL C. DRV1, 500mV/div B. LOAD CURRENT, 2A/div D. LDO1 OUTPUT VOLTAGE, 10mV/div 10µs/div A. CONTROL SIGNAL C. DRV1, 1V/div B. LOAD CURRENT, 2A/div D. LDO1 OUTPUT VOLTAGE, 50mV/div 2µs/div A. CONTROL SIGNAL C. DRV1, 1V/div B. LOAD CURRENT, 2A/div D. LDO1 OUTPUT VOLTAGE, 50mV/div _______________________________________________________________________________________ 5 MAX8737 Typical Operating Characteristics (continued) (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (Circuit of Figure 1, TA = +25°C, unless otherwise noted.) MAX8737 toc10 50 OUT1 OUT2 A 0 C 0 1.50V D 20 10 0 -5 0 5 3 7.5 20 10 MAX8737 toc14 2 1.3 60 40 20 -20 0 180 -1 90 0 -2 -90 -180 -3 1.0 1.5 -40 -15 10 TRANSCONDUCTANCE (S) 35 85 60 TEMPERATURE (°C) 0.001 0.01 0.1 MAX8737 toc16 GAIN (dB) 40 20 0 -20 180 PHASE (°) 90 0 -90 -180 0.01 0.1 10 1.5V OUTPUT, 1A LOAD, COUT = (1) 10µF 1206 16V CERAMIC 60 0.001 1 FREQUENCY (MHz) GAIN AND PHASE (OUT2) 1 10 FREQUENCY (MHz) 1.05V OUTPUT, 2A LOAD, COUT = (1) 22µF 1206 6V CERAMIC 6 12.5 11.3 0 1 0 0.8 10.0 MAX8737 toc15 3 OUTPUT-VOLTAGE DEVIATION (mV) 30 0.5 8.8 GAIN AND PHASE (OUT1) OUTPUT-VOLTAGE DEVIATION vs. TEMPERATURE MAX8737 toc13 SAMPLE SIZE = 150 40 0 CURRENT LIMIT (mV) DRV TRANSCONDUCTANCE DISTRIBUTION OUT1 OUT2 -3 OUTPUT OFFSET VOLTAGE (mV) A. GATE OF FET LOAD, 10V/div D. LD01 OUTPUT B. DRV1, 1V/div VOLTAGE, 2V/div C. MOSFET CURRENT, 20A/div E. PGOOD1, 5V/div 50 20 10 E 2µs/div 30 GAIN (dB) 0 5V 0 30 SAMPLE SIZE = 150 40 PHASE (°) 20A OUT1 OUT2 SAMPLE PERCENTAGE (%) B 1.5V SAMPLE SIZE = 150 40 SAMPLE PERCENTAGE (%) 3V 50 MAX8737 toc11 10V CURRENT-LIMIT THRESHOLD DISTRIBUTION OUTPUT OFFSET VOLTAGE DISTRIBUTION MAX8737 toc12 FOLDBACK CURRENT LIMIT (SHORT-CIRCUIT RESPONSE) SAMPLE PERCENTAGE (%) MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs _______________________________________________________________________________________ Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs PIN NAME FUNCTION 1 VCC Analog and Driver Supply Input. Connect to the system supply voltage (+5.0V). Bypass VCC to analog ground with a 1µF or greater ceramic capacitor. 2 CS1 Positive Current-Sense Input for LDO1. To enable (foldback) current limit, connect CS1 to the positive terminal of the current-sense element as shown in Figure 1. The MAX8737 driver reduces the gate voltage when the 10mV (typ) current-limit threshold is exceeded. When CS1 is connected to VCC, the MAX8737 disables the current-limit protection and enables the output undervoltage protection (see the UVP Short-Circuit Protection section). 3 OUT1 4 REFIN1 5 PGOOD2 6 PGOOD1 7 EN2 Enable Input for LDO2. Connect EN2 to Vcc for always ON. When EN2 is pulled low, the linear regulator shuts down and pulls the output to ground. 8 EN1 Enable Input for LDO1. Connect EN1 to Vcc for always ON. When EN1 is pulled low, the linear regulator shuts down and pulls the output to ground. 9 REFIN2 10 OUT2 Output Feedback-Sense, Negative Current-Sense, and Discharge Input for LDO1. Connect directly to the linear regulator output. When LDO1 is disabled, OUT1 is discharged through an internal 10Ω FET to GND. External Reference Input for LDO1. REFIN1 sets the main output regulation voltage (VOUT1 = VREFIN1). Open-Drain Power-Good Output for LDO2. PGOOD2 is low when the output voltage is more than 12% (typ) below the normal regulation point, during soft-start, and in shutdown. Approximately 2ms (typ) after OUT2 reaches the regulation voltage (REFIN2), PGOOD2 becomes high impedance as long as the output remains in regulation. Open-Drain Power-Good Output for LDO1. PGOOD1 is low when the output voltage is more than 12% (typ) below the normal regulation point, during soft-start, and in shutdown. Approximately 2ms (typ) after OUT1 reaches the regulation voltage (REFIN1), PGOOD1 becomes high impedance as long as the output remains in regulation. External Reference Input for the Secondary Regulator (LDO2). REFIN2 sets the main output regulation voltage (VOUT2 = VREFIN2). Output Sense, Negative Current-Sense Input, and Discharge Input for the Secondary Regulator (LDO2). Connect directly to the linear regulator output. When the LDO2 is disabled, OUT2 is discharged through an internal 10Ω FET to GND. 11 CS2 12, 14 N.C. Positive Current-Sense Input for LDO2. To enable (foldback) current limit, connect CS2 to the positive terminal of the current-sense element as shown in Figure 1. The MAX8737 driver reduces the gate voltage when the 10mV (typ) current-limit threshold is exceeded. When CS2 is connected to VCC, the MAX8737 disables the current-limit protection and enables the output undervoltage protection (see the UVP Short-Circuit Protection section). Not Internally Connected 13 DRV2 External N-Channel Gate Drive for LDO2 15 GND Ground. Connect the thin QFN backside pad to GND. 16 DRV1 External N-Channel Gate Drive for LDO1 — EP Exposed Pad. Connect the thin QFN backside pad to GND. _______________________________________________________________________________________ 7 MAX8737 Pin Description MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs Detailed Description The MAX8737 is a dual, low-dropout, external n-channel linear regulator controller for low-voltage notebook computer power supplies. The linear regulator provides a 0.5V to 2.5V (±5mV no-load) output for powering the low-voltage supplies to desktop and notebook CPU chipsets (VCCP and VCC_MCH). The regulator operates from low input voltage, which also reduces the power dissipation in the external n-channel MOSFET. The controller powers the external MOSFET gate driver from the standard 5V system supply. The controller features independent enable inputs (EN_), PGOOD outputs (PGOOD_), input undervoltage lockout (UVLO), and output undervoltage protection (UVP). The controller uses an adjustable reference input (REFIN_) to set the nominal output voltage (VOUT), which minimizes the cost and makes the stability independent of the output voltage. An output UVP timing depends on the magnitude of the voltage at VOUT. The UVP detects and shuts down the LDO if the output voltage drops below the nominal output voltage (VREFIN). Each linear regulator features an adjustable soft-start function, and generates a delayed PGOOD signal that signals when the linear regulator is in regulation. The MAX8737 uses an external resistor-divider in series with the current-sense input (CS_), providing foldback current-limit protection, and effectively reducing the short-circuit power dissipation. The MAX8737 is available in a thin QFN package to reduce the thermal impedance, and improve the thermal coupling between the controller and the external MOSFETs. REFIN Input The low-cost linear regulator uses an adjustable reference input (REFIN_) to set the nominal output voltage, which minimizes cost and simplifies the stability—the stability calculation is independent of VOUT. The output voltage accuracy depends on the accuracy of the source generating the REFIN voltage. Multiple accurate references are typically available elsewhere in the system (such as the switching regulator providing the lowvoltage input supply). If lower output accuracy is acceptable, divide down and filter another regulated output voltage supply. To set output voltage, select R2 = 100kΩ and select R1 using the following formula: V R1 = REF − 1 R2 VREFIN _ 8 Soft-Start When the LDO is activated, the respective DRV_ is pulled up from GND with a typical soft-start current of 170µA. The soft-start current limits the output voltage slew rate and also limits the initial current spike through the external n-channel MOSFET. The slew rate is also limited by the compensation capacitance used at the DRV_ pin. The maximum drain current during startup is the ratio of COUT to CCOMP, multiplied by the soft-start current ISOFT of 170µA (typ). Enable and Power Good The MAX8737 has independent enable control inputs (EN1, EN2). Drive EN1 high to enable output 1. Drive EN2 high to enable output 2. When EN_ is driven low, the corresponding DRV_ and PGOOD_ pins are pulled to GND, and the output is discharged through a 10Ω switch. There are two independent PGOOD_ outputs indicating the supply status. PGOOD_ is pulled high 2ms after the controller is enabled (EN_ is pulled high and V CC exceeds its UVLO threshold), and the output is in regulation. If either output is out of regulation, the respective PGOOD_ goes low immediately. The MAX8737 pulls PGOOD_ low if the output voltage drops below the lower trip threshold of -12% (typ) or when VCC is in UVLO or when EN_ is pulled low. Soft-Stop The MAX8737 enables a soft-stop function that discharges the output through an internal 10Ω switch when EN_ is driven low or VCC is in UVLO. The discharge time of the output depends on the output capacitance, output load, and the exact resistance of the internal discharge switch. To slow down the discharge rate, add resistance in series with the OUT_ pin. 5.0V Bias Supply (VCC) The linear regulator operates with very low input voltages. VIN may be as low as 1.2V, so a secondary 5V supply is required to provide sufficient bias to the gate drivers. Locally decouple the V CC input with 1µF or greater of ceramic capacitance. Current Limit The MAX8737 features a current limit that monitors the voltage across the current-sense resistor, which limits VCS_ - VOUT_ to 10mV (typ). However, in case of a short-circuit condition, the power dissipation across the external FET will be extremely high. To protect the external FET, the MAX8737 uses an external resistive divider (see Figure 1) to fold back the current limit, reducing the overall power dissipation. The foldback _______________________________________________________________________________________ Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs N1/N2: Si 4922DY C1 1.0µF VCC R6A 100kΩ R6B 100kΩ POWER GOOD 1 1.5V 2A (MAX) N1 CIN1 10µF MAX8737 N2 DRV1 RCS1 20mΩ R4A 10Ω CIN2 10µF DRV2 R3A 27Ω COUT1 10µF POWER GOOD 2 PGOOD2 PGOOD1 INPUT 1.8V TO 2.5V CSYS1* 100µF MAX8737 5V BIAS SUPPLY INPUT 1.25V TO 1.5V CSYS2* 100µF R3B 33Ω C2A 0.1µF C2B 0.22µF R4B 10Ω CS1 1.05V 3A (MAX) RCS2 20mΩ COUT2 22µF CS2 R5A 340Ω R5B 150Ω OUT1 OUT2 ON ON EN2 EN1 OFF R1A 33.2kΩ R1B 90kΩ REFIN1 SYSTEM REF (2.0V) OFF R2A 100kΩ * A LOCAL 10µF CERAMIC CAPACITOR WILL BE SUFFICIENT FOR MOST APPLICATIONS. IF THE MAX8737 IS POWERED FROM A HIGH-IMPEDANCE SOURCE, ADDITIONAL LOW-ESR POLYMER CAPACITORS ARE RECOMMENDED ON THE INPUT. REFIN2 GND SYSTEM REF (2.0V) R2B 100kΩ NOTE: THE SYSTEM REFERENCE IS TYPICALLY GENERATED BY THE STEP-DOWN CONVERTER USED TO POWER THE DUAL LOW-VOLTAGE LINEAR REGULATORS. Figure 1. Typical Operating Circuit with Current Limit resistor network is calculated using the short-circuit current (ISHORT), the maximum load current (IMAX), current-sense resistor (RCS), the 10mV (±3mV) currentlimit threshold (VILIM), and the external reference input (REFIN_). See Figure 3: 1) Pick the RCS requirement for maximum short-circuit current: RCS = VILIM / ISHORT 2) Select R1 = 10Ω and select R2 using the following formula: R2 = (VREFIN + VILIM )R1 IMAXRCS − VILIM UVP Short-Circuit Protection There are two levels of short-circuit UVP available in the controller. When the current-limit protection is not used (CS_= VCC), the output undervoltage timeout protection is enabled, which protects the regulator against short circuits. Output UVP timing depends on the magnitude of the output voltage drop. To clear the UVP fault latch, toggle the respective EN_ input, or cycle VCC below its UVLO threshold. _______________________________________________________________________________________ 9 MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs RCS N1 INPUT 1.0V TO 5.5V OUTPUT COUT 4.7µF/A CIN R3 OUT CS DRV C2 0.4V C1 MAX8737 ERROR AMPLIFIER R6 PGOOD REF R2 DELAY LOGIC 88% ILIM_EN 75µs DELAY S Q 80% R EN 60% GND THE MAX8737 INCLUDES TWO LDOs AS SHOWN ABOVE. Figure 2. Functional Diagram 10 R1 REFIN THERMAL SHDN LOGIC SUPPLY POWER GOOD CONTROL BLOCK EN OFF ON EN CURRENT SENSE VCC ILIM_EN 5V BIAS SUPPLY 10Ω RDSON ______________________________________________________________________________________ Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs MAX8737 INPUT INPUT MAX8737 MAX8737 CIN DRV CIN DRV R3 R3 VOUT RCS C2 VOUT COUT RCS C2 R1 COUT CS CS OUT R2 OUT IMAX IMAX 10mV RCS 10mV RCS VOUT SIMPLE CURRENT-LIMIT PROTECTION VOUT FOLDBACK CURRENT-LIMIT PROTECTION Figure 3. Current-Limit Protection Slow UVP If the output drops below 80% of the nominal output voltage (VREFIN) for 75µs, the MAX8737 shuts down the LDO and pulls the DRV_ pin to ground. If the output voltage returns above 80% of the nominal output voltage (VREFIN) within the 75µs, the controller ignores the load transient. the external pass transistor, allowing the system to cool. The thermal sensor turns the pass transistor back on once the controller’s junction temperature drops by approximately 20°C. Fast UVP If the output voltage drops below 60% of the nominal output voltage (V REFIN ) for approximately 5µs, the MAX8737 immediately shuts down and pulls the DRV_ pin to ground. If the output voltage returns above 80% of the nominal output voltage (VREFIN) within the 5µs, the controller ignores the load transient. Typically, the MAX8737 is powered from the output of a step-down regulator, effectively providing a low-impedance source. A local 10µF ceramic capacitor at VIN and a 1.0µF ceramic capacitor at VBIAS should be sufficient for most applications. If the linear regulator is connected to a high-impedance input, low-ESR polymer capacitors are recommended on the input. Thermal Protection The MAX8737 is available in a thin QFN package to reduce the thermal impedance, and improve the thermal coupling between the controller and the external MOSFETs. When the controller’s junction temperature exceeds TJ = +125°C (max), a thermal sensor turns off Design Procedure Input Capacitor Selection (CIN) Output Capacitor Selection (COUT) To maintain stability and provide good transient response, the MAX8737 requires 4.7µF/A (4.7µF minimum) of low ESR ceramic capacitor at the output. The regulator remains stable with capacitances higher than the minimum. When selecting the output capacitor to ______________________________________________________________________________________ 11 MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs provide good transient response, the capacitor’s ESR should be minimized: ∆VOUT = ∆IOUT x ESR where ∆IOUT is the maximum peak-to-peak load current step, and ∆VOUT is the transient output-voltage tolerance. Example: The example below is used to demonstrate the stability calculation for the application circuit in Figure 1. 1) Choose VOUT = 1.05V and IMAX = 3A and the minimum load can be determined from the foldback current-limit resistance: Regulator Compensation The compensation network (R3_, C2_) is customizable and depends on load and MOSFET characteristics: • Use of ceramic output capacitors with low RESR to ensure stability and minimize ESR voltage drop at load step • Strength of the external n-channel MOSFET (gM), its forward transconductance (gFS), and the gate-tosource capacitance (CGS) • The driver transconductance (GMDRV) of the integrated circuit driver • Load current range (including the minimum load): IMIN to IMAX Recommended Procedure Use the CGS, gFS, ID from the chosen transistor data sheet and use the equation below to translate the measured gFS to gM for normal operation: 1) Determine the LDO transconductance using the MOSFET’s forward transconductance (gFS), and the drain current (ID) used to test the selected MOSFET: IMIN = VOUT ≈ 6mA R1 + R2 2) For the selected MOSFET (Si4922DY), C GS = 2000pF at 1.5V, and gFS = 30S at ID = 8.8A: gM = 30S 3A = 17.5S 8.8A 3) The output capacitor must be at least 4.7µF/A. Therefore the design must use a minimum 14.1µF capacitor. The closest standard capacitor value is 22µF. 4) Based on the above operating conditions and component selection, the compensation resistor value should be: R3 = 22µF = 35Ω 2nF × 17.5S × 0.5S 5) Finally, select the compensation capacitor value: I gM = gFS MAX ID 2) Calculate the compensation resistor based on the output capacitor (C OUT), the MOSFET’s gate-tosource capacitance (CGS = CISS - CRSS), and the minimum driver transconductance: R3 = COUT CGSgM x 0.5S 3) Calculate the compensation capacitance using the minimum load current (I MIN ) and compensation resistor value calculated above: C2 = where VT = 25mV. 12 2VTCOUT IMINGMDRV (R3)2 C2 = 2 × 25mV × 22µF 6mA × 1S × (35Ω)2 = 0.15µF External MOSFET Selection The MAX8737 uses an n-channel MOSFET as the series pass transistor instead of a p-channel MOSFET to reduce cost. The selected MOSFET must have a gate threshold voltage (at the required max load) that meets the following criteria: VGS _ MAX ≤ VCC − VOUT where VCC is the controller bias voltage, and VGS_MAX is the maximum gate voltage required to yield the onresistance (RDS_ON) specified by the manufacturer’s data sheet. Make sure that input-to-output voltage meets the condition below to avoid entering dropout, where output voltage starts to decrease and any ripple on the input also passes through to the output. RDSON has a positive temperature coefficient (approximately ______________________________________________________________________________________ Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs VIN _ MIN − VOUT _ MAX ≥ IMAX (RDSON _ MAX + RCS ) where VIN_MIN is the minimum input voltage at the drain of the MOSFET. MOSFET Power Dissipation The maximum power dissipation of the MAX8737 depends on the thermal resistance of the external nchannel MOSFET package, the board layout, the temperature difference between the die and ambient air, and the rate of airflow. The power dissipated in the MOSFET is: PDIS = IOUT(VIN - VCSP) The maximum allowable power dissipation is determined by the following formula: RDIS(MAX) = TJ(MAX) − TA θJC + θCA where TJ(MAX) is the maximum junction temperature (+150°C), TA is the ambient temperature, θJC is the thermal resistance from the die junction to the package case, and θCA is the thermal resistance from the case through the PC board, copper traces, and other materials to the surrounding air. Standard 8-pin SO MOSFETs are typically rated for 2W, while new power packages (PowerPAK™, DirectFET™, etc.) can achieve power dissipation ratings as high as 5W. For optimum power dissipation, use a large ground plane with good thermal contact to ground and use wide input and output traces. Extra copper on the PC board increases thermal mass and reduces the thermal resistance of the board. See Figure 4. PC Board Layout Guidelines Due to the high-current paths and tight output accuracy required by most applications, careful PC board layout is required. An evaluation kit (MAX8737EVKIT) is available to speed design. It is important to keep all traces as short as possible to minimize the highcurrent trace dimensions to reduce the effect of undesirable parasitic inductance. The MOSFET dissipates a fair amount of heat due to the high currents involved, especially during large input-to-output voltage differences. To dissipate the heat generated by the MOSFET, make power traces very wide with a large amount of copper area. An efficient way to achieve good power dissipation on a surface-mount package is to lay out copper areas directly under the MOSFET package on multiple layers and connect the areas through vias. Use a ground plane to minimize impedance and inductance. In addition to the usual high-power considerations, here are four tips to ensure high output accuracy: • Ensure that the feedback connection to C OUT is short and direct. • Place the reference input resistors next to the REFIN_ pin. • Place RC and CC next to the DRV_ pin. • Ensure REFIN_ and DRV_ traces are away from noisy sources to ensure tight accuracy. PowerPAK is a registered trademark of Vishay Siliconix. DirectFET is a trademark of International Rectifier Corp. ______________________________________________________________________________________ 13 MAX8737 0.5%/°C); therefore, the value of RDSON at the highest operating junction temperature should be used: MAX8737 Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs N1/N2: Si 4922DY 5V BIAS SUPPLY C1 1.0µF *A LOCAL 10µF CERAMIC CAPACITOR IS SUFFICIENT FOR MOST APPLICATIONS. IF THE MAX8737 IS POWERED FROM A HIGH-IMPEDANCE SOURCE, ADDITIONAL LOW-ESR POLYMER CAPACITORS ARE RECOMMENDED ON THE INPUT. VCC CS2 CS1 R6A 100kΩ POWER GOOD 1 R6B 100kΩ PGOOD1 INPUT 1.8V TO 2.5V POWER GOOD 2 PGOOD2 INPUT 1.25V TO 1.5V CSYS2* 100µF MAX8737 CIN1 10µF CSYS1* 100µF 1.5V 2A (MAX) N2 N1 DRV2 DRV1 R3B 33Ω R3A 27Ω COUT1 10µF CIN2 10µF 1.05V 3A (MAX) C2B 0.22µF C2A 0.1µF OUT1 COUT2 22µF OUT2 ON ON EN2 EN1 OFF OFF R7 47.5kΩ REFIN1 SYSTEM REF (2.0V) R8 42.2kΩ GND REFIN2 R9 100kΩ NOTE: THE SYSTEM REFERENCE IS TYPICALLY GENERATED BY THE STEP-DOWN CONVERTER USED TO POWER THE DUAL LOW-VOLTAGE LINEAR REGULATORS. Figure 4. Typical Operating Circuit with Output Undervoltage Protection Chip Information TRANSISTOR COUNT: 1562 PROCESS: BiCMOS 14 ______________________________________________________________________________________ Dual, Low-Voltage Linear Regulator Controllers with External MOSFETs 24L QFN THIN.EPS PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 D 1 2 PACKAGE OUTLINE, 12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm 21-0139 D 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX8737 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)