RT9241 Preliminary Two-Phase DC/DC Controller for CPU Core Power Supply General Description Features The RT9241 is a two-phase buck DC/DC controller z Two-Phase Power Conversion integrated z VRM 9.0 DAC Output with Active Droop with all control functions for high Compensation for Fast Load Transient performance processor VRM. The RT9241 drives 2 buck switching stages operating in 180 degree phase z Precise Channel Current Sharing with Differential Sense Input shift. The two-phase architecture provides high output current while maintaining low power z Hiccup Mode Over Current Protection dissipation on power devices and low stress on z Programmable Under Voltage Lockout and Soft Start input and output capacitors. The high equivalent operating frequency also reduces the component z 200KHz) Times Channel Number dimension and the output voltage ripple in load transient. High Ripple Frequency, (Channel Frequency Applications RT9241 regulates both easily set voltage and z Power Supply for Server and Workstation current loops. Precise current sharing for power z Power Supply for High Current Microprocessor stage is achieved by differential input current sense and processing circuit. The settings of current sense, droop tuning and over current protection are independent to compensation circuit of voltage loop. The feature greatly facilitates the flexibility of CPU Pin Configurations Part Number Pin Configurations TOP VIEW RT9241CS (Plastic SOP-20) VID4 VID3 1 20 2 19 VDD PGOOD VID2 VID1 3 18 ISP1 4 17 16 PWM1 PWM2 6 15 ISP2 7 14 requirement. The IC monitors the VCORE voltage VID0 COMP FB ADJ 5 VSEN 8 13 for PGOOD and over voltage protection. Soft start, DVD 9 12 GND ISN1 over current protection and programmable under SS 10 11 ISN2 power supply design and tuning. The RT9241 uses a 5-bit DAC of 1.1V to 1.85V (25mV/step) output with load current droop compensation to meet the strict VRM transient voltage lockout are also provided to assure the safety of microprocessor and power system. Ordering Information RT9241 Package Type S : SOP-20 Operating temperature range C: Commercial standard DS9241-00 November 2001 www.richtek-ic.com.tw 1 RT9241 Preliminary Absolute Maximum Ratings z Supply Voltage 6V z Input, Output or I/O Voltage GND-0.3V ~ VDD+0.3V z Ambient Temperature Range 0°C ~ 70°C z Operating Junction Temperature Range 0°C ~ 125°C z Storage Temperature Range -65°C ~ 150°C z Power Dissipation, PD @ TA = 25°C SOP-20 0.625W Package Thermal Resistance z z SOP-20, θJA 60°C /W Lead Temperature (Soldering, 10 sec.) 260°C Electrical Characteristics (VDD = 5V, GND = 0V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units -- 6 -- mA VDD Rising Threshold 4.2 4.35 4.5 V VDD Falling Threshold 3.7 3.85 4 V VDVD Rising Trip Threshold 1.19 1.25 1.31 V 170 200 230 kHz -- 1 -- V 1.0 1.3 -- V -- 75 -- % -1.0 -- +1.0 % DAC (VID0-VID4) Input Low Voltage -- -- 0.8 V DAC (VID0-VID4) Input High Voltage 2.0 -- -- V DAC (VID0-VID4) Bias Current 10 20 40 µA DC Gain -- 85 -- dB Bandwidth -- 10 -- MHz -- 5 -- V/µS ISP 1,2 Full Scale Source Current -- 50 -- µA ISP 1,2 Current for OCP -- 75 -- µA VDD Supply Current Nominal Supply Current IDD PWM 1,2 Open Power-On Reset Oscillator Frequency For each phase Ramp Amplitude Ramp Valley Maximum On Time of Each Channel Reference and DAC DACOUT Voltage Accuracy PWM Controller Error Amplifier Slew Rate CL = 10pF Current Sense GM Amplifier To be continued www.richtek-ic.com.tw 2 DS9241-00 November 2001 RT9241 Preliminary Parameter Symbol Test Conditions Min Typ Max Units -- 10 -- µA 116 120 124 % Protection SS Current VSS = 1V Over-Voltage Trip (VSEN/DACOUT) Power Good Upper Threshold (VSEN/DACOUT) VSEN Rising -- 108 -- % Lower Threshold (VSEN/DACOUT) VSEN Rising -- 92 -- % Function Block Diagram DVD Power On Reset VDD Oscillator PGOOD + _ 92% VDAC Current Limit Processor CS1 Droop Control + _ FB PWM Logic & Driver PWM2 PWMCP VSEN ADJ PWM1 CS2 _ + Balance PWMCP INH PWM Logic & Driver ISP1 _ + Current + _ OVP, PGOOD POR Logic _ 108% VDAC + _ DAC INH INH + VID3 VID4 120% VDAC + _ VID0 VID1 VID2 ISP2 ISN2 ISN1 SS Control EA GND COMP DS9241-00 November 2001 SS www.richtek-ic.com.tw 3 RT9241 Preliminary Table 1 Output Voltage Program Pin Name Nominal Output Voltage DACOUT VID4 VID3 VID2 VID1 VID0 1 1 1 1 1 Off 1 1 1 1 0 1.100V 1 1 1 0 1 1.125V 1 1 1 0 0 1.150V 1 1 0 1 1 1.175V 1 1 0 1 0 1.200V 1 1 0 0 1 1.225V 1 1 0 0 0 1.250V 1 0 1 1 1 1.275V 1 0 1 1 0 1.300V 1 0 1 0 1 1.325V 1 0 1 0 0 1.350V 1 0 0 1 1 1.375V 1 0 0 1 0 1.400V 1 0 0 0 1 1.425V 1 0 0 0 0 1.450V 0 1 1 1 1 1.475V 0 1 1 1 0 1.500V 0 1 1 0 1 1.525V 0 1 1 0 0 1.550V 0 1 0 1 1 1.575V 0 1 0 1 0 1.600V 0 1 0 0 1 1.625V 0 1 0 0 0 1.650V 0 0 1 1 1 1.675V 0 0 1 1 0 1.700V 0 0 1 0 1 1.725V 0 0 1 0 0 1.750V 0 0 0 1 1 1.775V 0 0 0 1 0 1.800V 0 0 0 0 1 1.825V 0 0 0 0 0 1.850V Note: (1) 0:Connected to GND (2) 1:Open www.richtek-ic.com.tw 4 DS9241-00 November 2001 DS9241-00 November 2001 12V R9 1K C14 R8 13K R12 R7 R14 2.4K 33pF C12 24K ADJ FB COMP VID0 VID1 VID2 VID3 VID4 10 9 SS PWM2 ISN2 ISP2 ISN1 ISP1 PWM1 PGOOD VDD RT9241 DVD 13 GND 14 VSEN 8 7 6 5 C17 0.1µF VID0 4 3 VID2 VID1 2 VID3 16 11 15 12 18 17 19 20 2.4K R13 2.4K R2 2.4K R10 2.4K R1 PGOOD Typical 12V R3 10K 7 3 C13 1µF Typical 12V 3 C4 1µF PHASE 6 PWM 4 GND 5 PHASE LGATE 5 8 2 BOOT 1 UGATE LGATE RT9600 4 GND VCC PVCC PWM 8 2 BOOT 1 UGATE RT9600 6 VCC 7 PVCC Q4 PHB95NO3LT C11 1µF Q2 PHB95NO3LT C3 1µF C1 1µF L1 0.01µF 0.01µF 2µH L3 Q3 PHB83NO3LT C8 1µF L2 2µH Q1 PHB83NO3LT C2 100µF 2µH C5 1000µF C15 1000µF C9 100µF 12V C16 1000µF C6 1000µF VCORE Typical Application Circuit 2.4K R5 C10 6.6nF R 6 1 VID4 C7 1µF +5V Preliminary RT9241 www.richtek-ic.com.tw 5 www.richtek-ic.com.tw 6 12V C15 18K R7 R9 2.4K R6 R7 R14 3K R8 66pF C11 15K C13 R5 9 C18 0.1µF 10 R10 2.4K 8 7 6 5 VID0 3 VID2 4 2 VID3 VID1 1 VID4 SS PWM2 ISN2 ISP2 GND VSEN ISN1 ISP1 PWM1 PGOOD VDD RT9241 DVD ADJ FB COMP VID0 VID1 VID2 VID3 VID4 16 11 15 13 14 12 18 17 19 20 C8 1µF 3K R10 3K R10 3K 3K R10 R10 +5V PGOOD R4 10K 12V L3 2H L3 1000µF C10 2U C16 ×1500µF C10 1000µF C17 ×1500µF 1.2µH L1 Q5 HUF76129 C9 1µF Q4 HUF76129 C9 1µF Q5 HUF76129 Q4 HUF76129 C9 1µF PHASE1 UGATE1 PHASE2 PGND 10 2 D3 6 GND 3 PWM2 PWM1 1 PVCC 7 6 VDD 7 LGATE2 BOOT2 8 9 UGATE2 4 LGATE1 13 12 BOOT 11 D1 C5 1µF 10 R20 12V RT9241 Preliminary DS9241-00 November 2001 Preliminary RT9241 Functional Pin Description VID4, VID3, VID2, VID1 and VID0 ( Pin1,2,3,4,5) PWM1 (Pin 17), PWM2 (Pin 16) DAC voltage identification inputs for VRM9.0. These PWM outputs for each driven channel. Connect these pins are TTL-compatible and internally pulled to VDD pins to the PWM input of the MOSFET driver. if left open. PGOOD (Pin 19) COMP (Pin 6) Power good open-drain output. Output of the error amplifier and input of the PWM comparator. VDD (Pin 20) IC power supply. Connect this pin to a 5V supply. FB (Pin 7) Inverting input of the internal error amplifier. ADJ (Pin 8) Current sense output for active droop adjust. Connect a resistor from this pin to GND to set the amount of load droop. DVD (Pin 9) Programmable power UVLO detection input. Trip threshold = 1.25V at V(DVD) rising SS (Pin 10) Connect this SS pin to GND with a capacitor to set the start time interval. Pull this pin below 1V(ramp valley of saw-tooth wave in pulse width modulator) to shutdown the converter output. ISEN1 (Pin 12), ISEN2 (Pin 11) Current sense inputs from the individual converter channel’s sense component GND nodes. GND (Pin 13) Ground for the IC. VSEN (Pin 14) Power good and over voltage monitor input. Connect to the microprocessor-CORE voltage. ISP1 (Pin 18), ISEN2 (Pin 15) Current sense inputs for individual converter channels. Tie this pin to the component sense node. DS9241-00 November 2001 www.richtek-ic.com.tw 7 RT9241 Preliminary Simplified Block Diagram Control Loops for a Two Phase Converter + PWM2 PWMCP _ CS1 GND SS Control CS2 SS _ + + Processor + _ Current EA COMP PWM Logic & Driver PWMCP Droop Control Balance FB PWM1 _ + ADJ _ VDAC PWM Logic & Driver ISP1 ISN1 ISP2 ISN2 VIN RT9600 R LOAD C OUT VIN RT9600 Voltage loop Current loop www.richtek-ic.com.tw 8 DS9241-00 November 2001 RT9241 Preliminary Operation RT9241 is a two-phase DC/DC controller that Fault detection precisely regulates CPU core voltage and balances The chip detects VCORE for over voltage and power the The good detection. The “hiccup mode” operation of over converter consists of RT9241 and its companion current protection is adopted to reduce the short MOSFET driver provide high quality CPU power and circuit current. The in-rush current at the start up is all protection function to meet the requirement of suppressed by the soft start circuit through clamping modern VRM. the pulse width and output voltage. current of different power channels. Voltage control The reference of VCORE is provided by a 5-bit DAC of VRM9.0 specification. Control loop consists of error amplifier, two-phase pulse width modulator, driver and power components. Like conventional voltage mode PWM controller, the output voltage is locked at the VREF of error amplifier and the error signal is used as the control signal VC of pulse width modulator. The PWM signals of different channels are generated by comparison of EA output and spiltphase saw-tooth wave. Power stage transforms VIN to output by PWM signal on-time ratio. Current balance RT9241 senses the current of low side MOSFET in each synchronous rectifier when it is conducting for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the RDS(ON) of the low side MOSFET) to current signal into internal balance circuit. The current Application Circuit setting MOSFET driver detection and converter start up RT9241 interface with companion MOSFET driver (like RT9600 or HIP660X series) for correct converter initialization. The tri-phase PWM output (high, low, high impedance) pins sense the interface voltage at IC POR acts (both VDD and DVD trip). The channel is enabled if the pin voltage is 1.2V less than VDD. Please tie the both PWM output to driver input for correct converter start-up. Current sensing setting RT9241 senses the current of low side MOSFET in each synchronous rectifier when it is conducting for channel current balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense component (can be a sense resistor or the RDS(ON) of the low side MOSFET) to current signal into internal circuit (see Fig.1). balance circuit sums and averages the current signals then produces the balancing signals injected to pulse width modulator. If the current of some power channel is greater than average, the balancing IX signal reduces the output pulse width to keep the balance. The sensed power channel current signals regulate the reference of DAC to form a output voltage droop proportional to the load current. The droop or so call “active voltage positioning” can reduce the output Sample & Hold To Current Balance To Droop Tune GM + Load Droop _ IBP IBN ISPX RSP RS ISN X 2/3 IX RSN 2/3 IX To Over Current Detection 2/3 IX voltage ripple at load transient and the LC filter size. Fig.1 Current Sense Circuit DS9241-00 November 2001 www.richtek-ic.com.tw 9 IL RT9241 Preliminary The sensing circuit gets IX = IL × RS by local feedback. RSP Protection and SS function RSP = RSN to cancel the voltage drop caused by GM For OVP, the RT9241 detects the VCORE by VSEN amplifier input bias current. IX is sampled and held pin. Eliminate the parasitic delay and noise influence just before low side MOSFET turns off (See Fig.2). Therefore, I X ( S / H) = VO TOFF IL(S / H) × RS , IL(S / H) = IL( AVG) − , × L 2 RSP VIN − VO TOFF = × 5µS , for operating frequency = 200kHz VIN IX (S / H) VIN − VO VO − × 5µS IN V × RS = IL( AVG) − RSP 2L on the PCB path for fast and accurate detection. The trip point of OVP is 120% of normal output level. The PWM outputs are pulled low to turn on the low side MOSFET and turn off the high side MOSFET of the synchronous rectifier at OVP. The OVP latch can only be reset by VDD or DVD restart power on reset sequence. The PGOOD detection trip point of VCORE is ±8% out of the normal level. The PGOOD open drain output pulls low when VOCRE exceeds the range. Soft start circuit generates a ramp voltage by charging external capacitor with 10uA current after IC Falling Slope = VO /L IL POR acts. The PWM pulse width and VCORE are clamped by the rising ramp to reduce the in-rush IL (AVG) current and protect the power devices. IL (S/H) Inductor Current Over current protection trip point is set by the resistor RIMAX connected to IMAX pin. OCP is triggered if one PWM Signal & High Side MOSFET Gate Signal channel S/H current signal IX> 3 0.6 × . Controller 2 RIMAX forces PWM output latched at high impedance to turn off both high and low side MOSFET in the power Low Side MOSFET Gate Signal stage and initial the hiccup mode protection. The SS pin voltage is pulled low with a 10µA current after it is Fig. 2 Inductor Current and PWM Signal less than 90% VDD. The converter restarts after SS pin voltage < 0.2V. Three times of OCP disable the Droop Tuning The S/H current signals from power channels are injected to ADJ pin to create droop voltage. V ADJ = R ADJ × converter and only release the latch by POR acts (see Fig.4). COUNT = 1 COUNT = 2 2 ∑ IX 3 The DAC output voltage decreases by VADJ to form 2V the VCORE load droop(see Fig.3). 0V _ EA VDAC - VADJ 2/3 IX1 VDAC _ + COMP FB + COUNT = 3 4V VADJ ∑ ∑ IX ADJ R ADJ SS VCORE OVERLOAD APPLIED IL 2/3 IX2 2/3 IX3 2/3 IX4 0A T0T1 T3T4 T2 TIME Fig. 4 Fig. 3 Droop Tune Circuit www.richtek-ic.com.tw 10 DS9241-00 November 2001 RT9241 Preliminary Two-Phase Converter and Components Function Grouping 12V VCC PVCC BOOT UGATE PHASE RT9600 PWM +5V LGATE GND VDD VID 12V PWM1 Compensation & Offset COMP ISP1 ISN1 PVCC FB ADJ 12V UGATE +VCORE RT9600 PWM2 RT9241 Driver Power UVLO BOOT PHASE VSEN Droop Setting VCC PWM LGATE GND DVD ISP2 ISN2 SS Current Sense Components GND DS9241-00 November 2001 www.richtek-ic.com.tw 11 RT9241 Preliminary Package Information H M B B J A C F Symbol D I Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 12.598 13.005 0.496 0.512 B 7.391 7.595 0.291 0.299 C 2.362 2.642 0.093 0.104 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.229 0.330 0.009 0.013 I 0.102 0.305 0.004 0.012 J 10.008 10.643 0.394 0.419 M 0.381 1.270 0.015 0.050 20–Lead SOP Plastic Package www.richtek-ic.com.tw 12 DS9241-00 November 2001 Preliminary RT9241 RICHTEK TECHNOLOGY CORP. RICHTEK TECHNOLOGY CORP. Headquarter Taipei Office (Marketing) 6F, No. 35, Hsintai Road, Chupei City 8F-1, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5510047 Fax: (8863)5537749 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] DS9241-00 November 2001 www.richtek-ic.com.tw 13