ETC BAS19LT1/D

BAS19LT1, BAS20LT1,
BAS21LT1
Preferred Devices
High Voltage
Switching Diode
• Device Marking: BAS19LT1 = JP
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Device Marking: BAS20LT1 = JR
Device Marking: BAS21LT1 = JS
HIGH VOLTAGE
SWITCHING DIODE
3
CATHODE
MAXIMUM RATINGS
Rating
Symbol
Continuous Reverse Voltage
Value
Unit
VR
BAS19
BAS20
BAS21
Vdc
120
200
250
3
Continuous Forward Current
IF
200
mAdc
Peak Forward Surge Current
IFM(surge)
625
mAdc
1
2
SOT–23
CASE 318
STYLE 8
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation FR–5 Board
(Note 1.)
TA = 25°C
Derate above 25°C
Thermal Resistance Junction to Ambient
Total Device Dissipation Alumina Substrate
(Note 2.)
TA = 25°C
Derate above 25°C
Thermal Resistance Junction to Ambient
Junction and Storage
Temperature Range
1
ANODE
Symbol
Max
Unit
PD
225
mW
MARKING DIAGRAM
1.8
mW/°C
RJA
556
°C/W
PD
300
mW
2.4
mW/°C
RJA
417
°C/W
TJ, Tstg
–55 to
+150
°C
1. FR–5 = 1.0 0.75 0.062 in.
2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
Jx M
Jx
x
M
= Specific Device Code
= P, R or S
= Date Code
ORDERING INFORMATION
Device
Package
Shipping
BAS19LT1
SOT–23
3000/Tape & Reel
BAS20LT1
SOT–23
3000/Tape & Reel
BAS21LT1
SOT–23
3000/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
 Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 1
1
Publication Order Number:
BAS19LT1/D
BAS19LT1, BAS20LT1, BAS21LT1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Reverse Voltage Leakage Current
(VR = 100 Vdc)
(VR = 150 Vdc)
(VR = 200 Vdc)
(VR = 100 Vdc, TJ = 150°C)
(VR = 150 Vdc, TJ = 150°C)
(VR = 200 Vdc, TJ = 150°C)
BAS19LT1
BAS20LT1
BAS21LT1
BAS19LT1
BAS20LT1
BAS21LT1
Reverse Breakdown Voltage
(IBR = 100 µAdc)
(IBR = 100 µAdc)
(IBR = 100 µAdc)
BAS19LT1
BAS20LT1
BAS21LT1
Min
Max
–
–
–
–
–
–
0.1
0.1
0.1
100
100
100
120
200
250
–
–
–
–
–
1.0
1.25
Unit
µAdc
IR
V(BR)
Vdc
Forward Voltage
(IF = 100 mAdc)
(IF = 200 mAdc)
VF
Vdc
Diode Capacitance (VR = 0, f = 1.0 MHz)
CD
–
5.0
pF
Reverse Recovery Time (IF = IR = 30 mAdc, IR(REC) = 3.0 mAdc, RL = 100)
trr
–
50
ns
820 Ω
+10 V
2.0 k
IF
100 µH
tr
0.1 µF
tp
IF
t
trr
10%
t
0.1 µF
90%
D.U.T.
50 Ω OUTPUT
PULSE
GENERATOR
50 Ω INPUT
SAMPLING
OSCILLOSCOPE
VR
IR
INPUT SIGNAL
IR(REC) = 3.0 mA
OUTPUT PULSE
(IF = IR = 30 mA; MEASURED
at IR(REC) = 3.0 mA)
Notes: 1. A 2.0 kΩ variable resistor adjusted for a Forward Current (IF) of 30 mA.
Notes: 2. Input pulse is adjusted so IR(peak) is equal to 30 mA.
Notes: 3. tp » trr
Figure 1. Recovery Time Equivalent Test Circuit
3500
2500
REVERSE CURRENT (nA)
FORWARD VOLTAGE (mV)
3000
TA = -55°C
2000
1500
TA = 155°C
1000
TA = 25°C
500
0
0.1 0.2
0.5
1
2
5
10
20
50
100
7000
6000
5000
4000
3000
6
5
4
3
2
1
0
200
TA = 155°C
TA = 25°C
TA = -55°C
1
FORWARD CURRENT (mA)
2
5
10
20
50
REVERSE VOLTAGE (V)
Figure 2. Forward Voltage
Figure 3. Reverse Leakage
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2
100
200 300
BAS19LT1, BAS20LT1, BAS21LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by TJ(max), the maximum rated junction
temperature of the die, RθJA, the thermal resistance from the
device junction to ambient, and the operating temperature,
TA. Using the values provided on the data sheet for the
SOT–23 package, PD can be calculated as follows:
PD =
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225
milliwatts. There are other alternatives to achieving higher
power dissipation from the SOT–23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
SOLDERING PRECAUTIONS
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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3
BAS19LT1, BAS20LT1, BAS21LT1
PACKAGE DIMENSIONS
SOT–23 (TO–236)
CASE 318–08
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
A
L
3
1
V
B S
2
DIM
A
B
C
D
G
H
J
K
L
S
V
G
C
D
H
J
K
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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BAS19LT1/D