CY24712 MediaClock™ Set-top Box Clock Generator with VCXO Features Benefits • Integrated phase-locked loop (PLL) High-performance PLL tailored for Set Top Box applications • Low-jitter, high-accuracy outputs Meets critical timing requirements in complex system designs • VCXO with analog adjust Large ±150-ppm range, better linearity • 3.3V Operation Meet industry standard voltage platforms • 8-pin SOIC Industry standard packaging saves on board space Part Number Outputs Input Frequency Range Output Frequencies CY24712 3 27-MHz pullable crystal input per Cypress specification 11.0592 MHz, 13.5 MHz, 27 MHz Logic Block Diagram CLK_C 27 MHz 27 XIN OSC Q XOUT OUTPUT DIVIDERS Φ VCO CLK_A 11.0592 MHz P VCXO PLL /2 VDD CLK_B 13.5 MHz VSS Pin Configuration CY24712 8-pin SOIC Cypress Semiconductor Corporation Document #: 38-07319 Rev. *B • XIN 1 8 XOUT VDD VCXO 2 7 3 6 CLK_C CLK_A VSS 4 5 CLK_B 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 14, 2002 CY24712 Summary Pin Name Pin Number Pin Description XIN 1 Reference Crystal Input VDD 2 3.3V Voltage Supply VCXO 3 Input Analog Control for VCXO VSS 4 Ground CLK_B 5 13.5-MHz Clock Output CLK_A 6 11.0592-MHz Clock Output CLK_C 7 27-MHz Clock Output XOUT[1] 8 Reference Crystal Output Pullable Crystal Specifications Parameter CRYSTALLoad Description Min. Load Capacitance Typ. Max. Unit 14 pF C0/C1 240 ESR 35 0 Ω To Operating Temperature Accinit Initial Accuracy ±30 70 ppm °C Stability Temperature plus Aging Stability ±80 ppm Absolute Maximum Conditions Parameter VDD Description Supply Voltage Min. Max. Unit –0.5 7.0 V Temperature[2] TS Storage TJ Junction Temperature –65 125 °C 125 °C Digital Inputs VSS – 0.3 VDD + 0.3 V Digital Outputs referred to VDD VSS – 0.3 VDD + 0.3 V Electrostatic Discharge Analog Input –0.5 2000 V 7.0 V Recommended Operating Conditions Parameter Description VDD Operating Voltage TA Ambient Temperature CLOAD Max. Load Capacitance fREF Reference Frequency tPU Power-up time for all VDD's to reach minimum specified voltage (power ramps must be monotonic) Min. Typ. Max. Unit 3.135 3.3 3.465 V 0 70 °C 15 pF 27 MHz 0.05 500 ms DC Electrical Characteristics Parameter Description Conditions Min. Typ. Max. Unit IOH Output High Current VOH = VDD – 0.5, VDD = 3.3V 12 24 mA IOL Output Low Current VOL = 0.5, VDD = 3.3V 12 24 mA CIN Input Capacitance IIZ Input Leakage Current f∆XO VCXO pullability range[3] VVCXO VCXO input range IVDD Supply Current Document #: 38-07319 Rev. *B 7 ±150 0 pF µA 5 ppm VDD V 36 mA Page 2 of 5 CY24712 DC Electrical Characteristics Parameter Description Conditions Min. Typ. Max. Unit Notes: 1. Float XOUT if XIN is externally driven. 2. Rated for 10 years. 3. Must meet pullable crystal specifications. AC Electrical Characteristics (VDD = 3.3V) Parameter[4] Min. Typ. Max. Unit DC Output Duty Cycle Description Duty Cycle is defined in Figure 1 50% of VDD Conditions 45 50 55 % ER0 Rising Edge Rate Output Clock Edge Rate, Measured from 20% to 80% of VDD, CLOAD = 15 pF Figure 2. 0.8 1.4 V/ns EF1 Falling Edge Rate Output Clock Edge Rate, Measured from 80% to 20% of VDD, CLOAD = 15 pF Figure 2. 0.8 1.4 V/ns t9 Clock Jitter Peak-Peak period jitter t10 PLL Lock Time 300 350 ps 3 ms Note: 4. Not 100% tested. Test Circuit V DD CLK out 0.1 µF C LOAD OUTPUTS GND t3 t1 t2 CLK t4 80% 50% 50% CLK Figure 1. Duty Cycle Definition; DC = t2/t1 20% igure 2. Rise and Fall Time Definitions: ER = 0.6 x VDD/t3, EF = 0.6 x VDD/t4 Ordering Information Ordering Code Package Name Package Type Operating Range Operating Voltage CY24712SC S8 8-pin SOIC Commercial 3.3V Document #: 38-07319 Rev. *B Page 3 of 5 CY24712 Package Diagram 8-pin (150-mil) SOIC S8 51-85066-A All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07319 Rev. *B Page 4 of 5 © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY24712 Document Title: CY24712 MediaClock™ Set-top Box Clock Generator with VCXO Document Number: 38-07319 REV. ECN No. Issue Date Orig. of Change Description of Change ** 111555 02/29/02 CKN New Data Sheet *A 113937 05/02/02 CKN Removed Kony from the Pullable Crystal Specification table, p. 2 *B 121887 12/14/02 RBI Document #: 38-07319 Rev. *B Power up requirements added to Operating Conditions Information Page 5 of 5