19-3973; Rev 0; 1/06 KIT ATION EVALU E L B A AVAIL 4.5V to 28V Input Current-Mode StepDown Controller with Adjustable Frequency Features The MAX8650 synchronous PWM buck controller operates from a 4.5V to 28V input and generates an adjustable 0.7V to 5.5V output voltage at loads up to 25A. The MAX8650 uses a peak current-mode control architecture with an adjustable (200kHz to 1.2MHz) constant switching frequency and is externally synchronizable. The IC’s current limit uses the inductor’s DC resistance to improve efficiency or an external sense resistor for high accuracy. The current-limit threshold is adjusted with an external resistor. Foldback-type current limit can be implemented to reduce the power dissipation in overload or short-circuit conditions. Short-circuit protection is provided based on sensing the current in the low-side MOSFET. A reference input is provided for use with a high-accuracy external reference or for double-data-rate (DDR)-tracking applications. Monotonic prebiased startup is available for a safe-start in applications where the output capacitor may have an initial charge. This feature prevents the output from pulling low during startup, which is a common characteristic of conventional buck regulators. ♦ Operates from 4.5V to 28V Supply A 180° out-of–phase synchronization output is available for synchronizing with another converter. ♦ Adjustable Soft-Start ♦ 1% FB Voltage Accuracy Over Temperature ♦ Adjustable Output Voltage Down to 0.7V or REFIN ♦ Adjustable Switching Frequency or External Synchronization from 200kHz to 1.2MHz ♦ 180° Phase-Shifted Clock Output ♦ Adjustable Overcurrent Limit ♦ Adjustable Foldback Current Limit ♦ Adjustable Slope Compensation ♦ Selectable Current-Limit Mode: Latch-Off or Automatic Recovery ♦ Monotonic Output-Voltage Rise at Startup ♦ Output Sources and Sinks Current ♦ Enable Input ♦ Power-OK (POK) Output ♦ Independently Adjustable Overvoltage Protection Applications Ordering Information Base Stations DDR Network and Telecom Power Modules Storage IBA Applications Servers PART TEMP RANGE PIN-PACKAGE PKG CODE MAX8650EEG+ -40°C to +85°C 24 QSOP E24-1 +Denotes lead-free package. Pin Configuration appears at end of data sheet. Typical Operating Circuit R2 R1 SYNC 1 ON EN OFF POK 11 24 SYNCO 3 23 R3 22 21 C3 20 R4 C4 16 R5 19 MODE FSYNC EN BST POK DH 6 MAX8650EEG ILIM2 18 R7 PGND REFIN VL SS IN ILIM1 AVL COMP FB CS- 17 OVP C1 D2 VOUT 0.7V TO 5.5V L1 C2 Q1 LX DL CS+ R6 4 5 SYNCO SCOMP VIN 7V TO 28V 2 GND 7 Q2 8 9 C5 R8 C6 C7 10 C8 C10 12 R9 C9 14 15 C11 13 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX8650 General Description MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency ABSOLUTE MAXIMUM RATINGS IN, EN to GND ........................................................-0.3V to +30V BST to LX...............................................................-0.3V to +7.5V DH to LX ....................................................-0.3V to (VBST + 0.3V) LX to GND .................... -1V (-2.5V for < 50ns transient) to +30V DL to PGND.................................................-0.3V to (VVL + 0.3V) ILIM2, ILIM1, SYNCO, FSYNC, OVP, SCOMP to GND .....................................-0.3V to (VAVL + 0.3V) VL to PGND ...........................................................-0.3V to +7.5V AVL, FB, POK, COMP, SS, MODE, REFIN to GND .....-0.3V to +6V CS+, CS- to GND .....................................................-0.3V to +6V PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70°C) 24-Pin QSOP (derate 9.5mW/°C above +70°C)..........762mW Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = 12V, VBST - VLX = 6.5V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP 4.5 MAX Operating Input Voltage Range VL = IN for VIN < 7V Quiescent Supply Current VFB = 0.75V, no switching Shutdown Supply Current IIN + IVL + IAVL EN = GND, VIN ≤ 28V 10 EN = GND, VAVL = VVL = VIN = 5V 32 2 AVL Undervoltage-Lockout Trip Level VAVL rising, 3% typ hysteresis 3.90 Output Voltage Adjust Range Minimum output voltage is limited by minimum duty cycle and external components 0.7 VL Regulation Voltage 7V < VIN < 28V, 1mA < ILOAD < 40mA 6.0 5.5V < VVL < 7V, 1mA < ILOAD < 10mA 4.900 VL Output Current AVL Regulation Voltage 4.15 28.0 V 3 mA µA 4.40 V 5.5 V 6.5 7.0 V 4.975 5.050 40 AVL Output Current UNITS mA 10 V mA SOFT-START SS Shutdown Resistance From SS to GND, VEN = 0V SS Soft-Start Current VSS = 0.625V 20 100 Ω 23 28 µA VAVL 1.0V VAVL V -250 +250 nA 0 1.5 V 18 REFIN INPUT REFIN Dual Mode™ Threshold REFIN Input Bias Current VREFIN = 0.7V to 1.5V REFIN Input Voltage Range Dual Mode is a trademark of Maxim Integrated Products, Inc. 2 _______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency (VIN = 12V, VBST - VLX = 6.5V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX 0.693 0.7 0.707 UNITS ERROR AMPLIFIER REFIN = AVL FB Regulation Voltage VREFIN = 0.7V to 1.5V Transconductance VREFIN VREFIN 0.00375 70 VREFIN + 0.00375 V 110 160 µS COMP Shutdown Resistance From COMP to GND, VEN = 0V 20 100 Ω FB Input Leakage Current VFB = 0.7V 5 50 nA +1.5 V FB Input Common-Mode Range -0.1 CURRENT-SENSE AMPLIFIER Voltage Gain VOUT = 0 to 5.5V, VCS+ - VCS- = 30mV 12 V/V CURRENT LIMIT Peak Current-Limit Threshold (VCS+ - VCS-) RILIM1 = 24kΩ 27.2 32.0 36.8 ILIM1 = AVL 68.0 80.0 92.0 Valley Current-Limit Threshold (VLX - VPGND) RILIM2 = 50kΩ -42.5 -50.0 -57.5 RILIM2 = 200kΩ -170 -200 -230 Negative Current-Limit Threshold % of (typ) positive direction current limit (VLX - VPGND) -90 -120 -150 % CS+, CS- Input Current VCS+ = VCS- = 0V or 5.5V -25 +25 µA 0 5.5 V CS+, CS- Input Common-Mode Range mV mV SLOPE COMPENSATION Slope Compensation at Maximum Duty Cycle VSCOMP = 2.5V 231.25 250.00 268.75 VSCOMP = 1.25V 113.77 123.00 132.23 SCOMP = AVL 231.25 250.00 268.75 SCOMP = GND, TA = 0°C to +85°C 113.77 123.00 132.23 TA = -40°C to +85°C 110.70 123.00 132.23 SCOMP High Threshold VAVL - 0.5 SCOMP Low Threshold 0.5 SCOMP Adjustment Range 1.25 SCOMP Input Leakage Current VSCOMP = 1.25V to 2.5V mV V V 2.5 V 5 200 nA OSCILLATOR Switching Frequency RFSYNC = 21.0kΩ 800 1000 1200 RFSYNC = 143kΩ 160 200 240 Minimum Off-Time Measured at DH 235 Minimum On-Time Measured at DH 75 kHz ns 100 ns _______________________________________________________________________________________ 3 MAX8650 ELECTRICAL CHARACTERISTICS (continued) MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency ELECTRICAL CHARACTERISTICS (continued) (VIN = 12V, VBST - VLX = 6.5V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN FSYNC Synchronization Range 160 FSYNC Input-High Pulse Width 100 FSYNC Input-Low Pulse Width 100 TYP MAX UNITS 1200 kHz ns ns FSYNC Rise/Fall Time 100 SYNCO Phase Shift 180 SYNCO Output Low Level ISYNCO = 5mA SYNCO Output High Level ISYNCO = 5mA FSYNC Pin Threshold for SYNC Mode 0.4 VAVL 1V V V 1.7 FSYNC Input Low FSYNC Input High ns Degrees 2.5 V 0.4 V 2.5 V FET DRIVERS DH On-Resistance, High State DH On-Resistance, Low State DL On-Resistance, High State DL On-Resistance, Low State VBST - VLX = 6.5V 1.13 1.8 VBST - VLX = 5V 1.4 2.2 VBST - VLX = 6.5V 1.0 2 VBST - VLX = 5V 1.3 2.2 VVL = 6.5V 1.6 2.5 VVL = 5V 1.7 2.8 VVL = 6.5V 0.8 1.5 VVL = 5V 0.85 1.5 20 30 ns 5 µA Break-Before-Make Dead Time Low side off to high side on, high side off to low side on LX, BST Leakage Current VBST = 35V, VLX = 28V, VIN = 28V Ω Ω Ω Ω THERMAL PROTECTION Thermal Shutdown Thermal-Shutdown Hysteresis 4 Rising temperature +160 °C 15 °C _______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency (VIN = 12V, VBST - VLX = 6.5V, TA = -40°C to +85°C. Typical values are at TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS REFIN = AVL, VFB rising, typical hysteresis is 3% 629.0 650.0 671.0 VREFIN = 0.7V to 1.5V, VFB rising, typical hysteresis is 3% 88.7 91.7 94.7 mV % of 25 200 mV 1 µA POK Power-OK Threshold POK Output Voltage, Low VFB = 0.6V, IPOK = 2mA POK Leakage Current, High VPOK = 5.5V OVP OVP Threshold Voltage OVP Leakage Current, High REFIN = AVL 770 800 840 mV VREFIN = 0.7V to 1.5V 110 115 120 % of VREFIN 500 nA 0.4 V +1 µA 0.45 V VOVP = 0.8V MODE CONTROL MODE Logic-Level Low 4.5V ≤ VAVL ≤ 5.5V MODE Logic-Level High 4.5V ≤ VAVL ≤ 5.5V 1.8 MODE Input Current VMODE = 0 to VAVL -1 V SHUTDOWN CONTROL EN Logic-Level Low 4.5V ≤ VAVL ≤ 5.5V EN Logic-Level High 4.5V ≤ VAVL ≤ 5.5V 2 VEN = 0V -1 EN Input Current VEN = 28V V +1 1.5 6.0 µA Note 1: Specifications are 100% production tested at TA = +85°C. Limits over the operating temperature range are guaranteed by design. _______________________________________________________________________________________ 5 MAX8650 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (Circuit of Figure 3, 500kHz switching, VIN = 17V, VOUT = 3.3V, TA = +25°C, unless otherwise noted.) EFFICIENCY vs. LOAD CURRENT (CIRCUIT OF FIGURE 4) 24V INPUT, 3.3V OUTPUT 50 40 30 60 50 12V INPUT, 0.9V OUTPUT 40 30 20 20 10 10 0 100 RILIM1 vs. PEAK CURRENT LIMIT OSCILLATOR FREQUENCY vs. INPUT VOLTAGE 50 RILIM1 (kΩ) 3.295 3.290 3.285 5 10 LOAD CURRENT (A) 55 NO LOAD 3.300 LOAD CURRENT (A) 15A LOAD 3.280 45 40 35 30 3.275 25 3.270 6 10 14 18 22 INPUT VOLTAGE (V) 26 30 20 0.03 0 10 60 MAX8650 toc04 3.305 3.285 3.270 1 LINE REGULATION 3.310 3.290 3.275 MAX8650 toc05 10 LOAD CURRENT (A) 3.295 3.280 0 1 3.300 530 520 510 490 TA = +85°C 480 6 0.08 10 14 18 22 INPUT VOLTAGE (V) STEP-LOAD RESPONSE -8A TO 8A TO -8A (CIRCUIT OF FIGURE 4) MAX8650 toc08 50mV/div (AC-COUPLED) VOUT 100mV/div (AC-COUPLED) IOUT IOUT 40µs/div TA = -40°C 500 MAX8650 toc07 6 TA = +25°C 470 0.04 0.05 0.06 0.07 PEAK CURRENT LIMIT VCS+ - VCS- (V) STEP-LOAD RESPONSE 7.5A TO 15A TO 7.5A VOUT 15 MAX8650 toc06 EFFICIENCY (%) 60 OUTPUT VOLTAGE (V) 70 12V INPUT, 3.3V OUTPUT 12V INPUT, 2.5V OUTPUT 12V INPUT, 1.8V OUTPUT 70 3.305 OSCILLATOR FREQUENCY (kHz) 80 12V INPUT, 1.25V OUTPUT 80 LOAD REGULATION 3.310 MAX8650 toc02 90 EFFICIENCY (%) 90 MAX8650 toc01 100 MAX8650 toc03 EFFICIENCY vs. LOAD CURRENT OUTPUT VOLTAGE (V) MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency 5A/div 0V 0V 5A/div 100µs/div _______________________________________________________________________________________ 26 30 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency POWER-DOWN WAVEFORMS POWER-UP WAVEFORMS 5V/div VPOK ENABLE/SHUTDOWN WAVEFORMS MAX8650 toc10 MAX8650 toc09 VPOK MAX8650 toc11 5V/div VPOK 5V/div 5V/div 0V VEN 5V/div VOUT 2V/div VIN 5V/div 1V/div VOUT VIN 5A/div VOUT IL IL 1V/div 0V 5A/div 0V 0V IL 10A/div 0V 200µs/div 2ms/div 2ms/div SHORT CIRCUIT AND RECOVERY SYNCHRONIZATION WAVEFORMS OVERVOLTAGE PROTECTION MAX8650 toc13 MAX8650 toc12 VFSYNC 5V/div VSYNCO 5V/div MAX8650 toc14 7.5A LOAD VOUT 2V/div 1V/div VOUT 0V IL 10V/div VDH IIN 10A/div VDH 0V 10A/div 0V VDL 0V 10V/div 0V 5V/div 0V 200µs/div 1µs/div CLOSED-LOOP BODE PLOT WITH NO LOAD 40µs/div CLOSED-LOOP BODE PLOT WITH 15A LOAD MAX8650 toc15 MAX8650 toc16 GAIN GAIN 0dB 10dB/div PHASE 0dB 10dB/div PHASE 0° 30°/div 1k 10k 100k FREQUENCY (Hz) MAX8650 Typical Operating Characteristics (continued) (Circuit of Figure 3, 500kHz switching, VIN = 17V, VOUT = 3.3V, TA = +25°C, unless otherwise noted.) 1M 0° 30°/div 1k 10k 100k 1M FREQUENCY (Hz) _______________________________________________________________________________________ 7 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650 Pin Description PIN NAME 1 FSYNC Frequency Set and Synchronization. Connect a resistor from FSYNC to GND to set the switching frequency, or drive with an external clock signal between 160kHz and 1.2MHz. See the Switching Frequency and Synchronization section. 2 MODE Current-Limit Operating-Mode Selection. Connect MODE to AVL for latch-off current limit or connect MODE to GND for automatic-recovery current limit. 3 SYNCO Synchronization Output. Provides a clock output that is 180° out-of-phase with the internal oscillator for synchronizing another MAX8650. 4 BST Boost Capacitor Connection. Connect a 0.1µF ceramic capacitor from BST to LX. 5 DH High-Side n-Channel MOSFET Gate-Driver Output. Connect DH to the gate of the high-side MOSFET. DH is internally pulled low in shutdown. 6 LX External Inductor Connection 7 DL Low-Side n-Channel MOSFET Gate-Driver Output. Connect DL to the gate of the low-side MOSFET (synchronous rectifier). DL is internally pulled low in shutdown. 8 PGND Power Ground. Connect PGND to the power ground plane and to the source of the low-side external MOSFET. The return path for both gate drivers is through PGND. 9 VL Internal 6.5V Linear-Regulator Output. Connect a 1µF to 10µF ceramic capacitor from VL to ground. For VIN < 7V, connect VL directly to IN. VL powers both gate drivers. VL is the input to the AVL linear regulator. 10 IN Input Supply Voltage. IN is the input to the VL linear regulator. Connect VL to IN for VIN < 7V. 11 EN Enable. Apply logic-high to enable the output, or logic-low to put the controller in low-power shutdown mode. Connect EN to IN for always-on operation. 12 AVL Internal 5V Linear-Regulator Output. Connect a 1µF ceramic capacitor from AVL to ground. AVL powers the MAX8650’s internal circuits. 13 GND Ground. Connect GND to the analog ground plane. Connect the analog ground and power ground planes at a single point near the IC. Low-current signals return to GND. 14 CS+ Positive Differential Current-Sense Input 15 CS- Negative Differential Current-Sense Input 16 8 ILIM1 FUNCTION Programmable Current-Limit Input for Inductor Current. Connect a resistor from ILIM1 to GND to set the peak current-limit threshold. ILIM1 sources 10µA through the resistor, and the voltage at ILIM1 is attenuated 7.5:1 to set the final current limit. For example, a 60kΩ resistor results in 600mV at ILIM1. This results in a current-limit threshold (VCS+ - VCS-) of 80mV. The ILIM1 resistor range is 24kΩ to 60kΩ. Connect ILIM1 to AVL to set the default current-limit threshold of 80mV. _______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency PIN NAME FUNCTION 17 OVP Output Voltage Sensing for Overvoltage Protection. Connect OVP to the center of a resistor-divider from OUT to GND to set the FB independent output overvoltage trip point. Connect OVP to FB if this independence is not desired. The OVP threshold is 115% of the nominal FB regulation voltage. 18 FB Feedback Input. Connect FB to the center of a resistor voltage-divider between the output and GND to set the output voltage. The FB threshold regulates at 0.7V or VREFIN. 19 COMP Loop Compensation. Connect COMP to an external RC network to compensate the loop. COMP is internally pulled to GND through 20Ω during shutdown. 20 SS Soft-Start. Connect a 0.1µF to 1µF ceramic capacitor from SS to GND. This capacitor sets the softstart period during startup. SS is internally pulled to GND through 20Ω during shutdown. 21 REFIN External Reference Input. Connect REFIN to AVL to use the internal 0.7V reference for the feedback threshold. 22 ILIM2 Programmable Current-Limit Input for the Low-Side MOSFET (LX-PGND). Connect a resistor from ILIM2 to GND to set the valley current-limit threshold. ILIM2 sources 5µA through the resistor, and the voltage at ILIM2 is attenuated 5:1 to set the final current limit. For example, a 50kΩ resistor results in 250mV at ILIM2. This results in a current-limit threshold (VLX - VPGND) of 50mV. VILIM2 must not exceed 1V. 23 SCOMP 24 POK Programmable Slope-Compensation Input. The slope-compensation voltage rate is the voltage at SCOMP times 0.1 divided by the oscillator period (T). Connect SCOMP to AVL or GND to set to the default of 250mV/T or 125mV/T, respectively. Open-Drain Output that Is High Impedance when the Output Voltage Rises Above 92% of the Nominal Regulation Value. POK pulls low during shutdown and when the output drops below 88% of the nominal regulation value. _______________________________________________________________________________________ 9 MAX8650 Pin Description (continued) MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency IN MAX8650 BST 6.5V LDO REGULATOR EN UVLO VL LEVEL SHIFT DH THERMAL SHDN LX VL 5V AVL LDO AVL PWM CONTROL LOGIC VOLTAGE REFERENCE DL PGND REF SELECT LOGIC REF REFIN SYNCO SOFT-START CIRCUITRY OVP SS 1.15V REF ERROR AMP OSCILLATOR FSYNC SLOPE COMP SCOMP COMP CLAMP GM FB PWM COMPARATOR COMP OVP CSA CS+ CURRENTLIMIT CONTROL LOGIC 12 LEVEL SHIFT X1 5µA VL CURRENTLIMIT COMP MODE ILIM2 DIVIDE BY 5 CS- 10µA VL POK ILIM1 GND DIVIDE BY 7.5 FB 0.92VREF Figure 1. Functional Diagram 10 ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency DC-DC Converter Control Architecture The MAX8650 step-down controller uses a PWM, current-mode control scheme. An internal transconductance amplifier establishes an integrated error voltage. The heart of the PWM controller is an open-loop comparator that compares the integrated voltage-feedback signal against the amplified current-sense signal plus the adjustable slope-compensation ramp, which are summed into the main PWM comparator to preserve inner-loop stability. At each rising edge of the internal clock, the high-side MOSFET turns on until the PWM comparator trips or the maximum duty cycle is reached. During this on-time, current ramps up through the inductor, storing energy in a magnetic field and sourcing current to the output. The current-mode feedback system regulates the peak inductor current as a function of the output-voltage error signal. The circuit acts as a switch-mode transconductance amplifier and pushes the output LC filter pole normally found in a voltage-mode PWM to a higher frequency. During the second half of the cycle, the high-side MOSFET turns off and the low-side MOSFET turns on. The inductor releases the stored energy as the current ramps down, providing current to the output. The output capacitor stores charge when the inductor current exceeds the required load current and discharges when the inductor current is lower, smoothing the voltage across the load. Under soft-overload conditions, when the peak inductor current exceeds the selected current limit (see the Current-Limit Circuit section), the high-side MOSFET is turned off immediately and the low-side MOSFET is turned on and remains on to let the inductor current ramp down until the next clock cycle. Under heavy-overload or short-circuit conditions, the valley foldback current limit is enabled to reduce power dissipation of external components. The MAX8650 operates in a forced-PWM mode. As a result, the controller maintains a constant switching frequency, regardless of load, to allow for easier filtering of the switching noise. Internal Linear Regulators The MAX8650 contains two internal LDO regulators. The AVL regulator provides 5V for the IC’s internal circuitry, and the VL regulator provides 6.5V for the MOSFET gate drivers. Connect a 4.7µF ceramic capacitor from VL to PGND, and connect a 1µF ceramic capacitor from AVL to GND. For applications where the input voltage is between 4.5V and 7V, connect VL directly to IN and connect a 10Ω resistor from VL to AVL. Undervoltage Lockout When AVL drops below 4.03V, the MAX8650 assumes that the supply voltage is too low for proper operation, so the undervoltage-lockout (UVLO) circuitry inhibits switching and forces the DL and DH gate drivers low. When AVL rises above 4.15V, the controller enters the startup sequence and then resumes normal operation. Startup and Soft-Start The internal soft-start circuitry gradually ramps up the reference voltage to control the rate of rise of the stepdown controller’s output and reduce input surge currents during startup. The soft-start period is determined by the value of the capacitor from SS to GND. The softstart time is approximately (30.4ms/µF) x C SS . The MAX8650 also features monotonic output-voltage rise; therefore, both external power MOSFETs are kept off if the voltage at FB is higher than the voltage at SS. This allows the MAX8650 to start up into a prebiased output without pulling the output voltage down. Before the MAX8650 can begin the soft-start and powerup sequence, the following conditions must be met: • VAVL exceeds the 4.15V UVLO threshold. • EN is at logic-high. • The thermal limit is not exceeded. Enable (EN) The MAX8650 features a low-power shutdown mode. A logic-low at EN shuts down the controller. During shutdown, the output is high impedance, and both DH and DL are low. Shutdown reduces the quiescent current (IQ) to less than 10µA. A logic-high at EN enables the controller. Synchronous-Rectifier Driver (DL) Synchronous rectification reduces conduction losses in the rectifier by replacing the normal Schottky catch diode with a low-resistance MOSFET switch. The MAX8650 also uses the synchronous rectifier to ensure proper startup of the boost gate-driver circuit and to provide the current-limit signal. The low-side gate driver (DL) swings from 0 to the 6.5V provided from VL. The DL waveform is always the complement of the DH highside gate-drive waveform (with controlled dead time to prevent cross-conduction or shoot-through). An adaptive dead-time circuit monitors the DL voltage and prevents the high-side MOSFET from turning on until DL is fully off. For the dead-time circuit to work properly, there must be a low-resistance, low-inductance path from the DL driver to the MOSFET gate. Otherwise, the sense circuitry in the MAX8650 can interpret the MOSFET gate as off when gate charge actually remains. Use very short, wide traces, approximately 10 ______________________________________________________________________________________ 11 MAX8650 Detailed Description MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency VL BST DH N MAX8650 LX DL N Figure 2. DH Boost Circuit to 20 squares (50 mils to 100 mils wide if the MOSFET is 1in from the device) for the gate drive. The dead time at the other edge (DH turning off) also has an adaptive dead-time circuit operating in a similar manner. For both edges, there is an additional 20ns fixed dead time after the adaptive dead time expires. High-Side Gate-Drive Supply (BST) A flying capacitor boost circuit (Figure 2) generates the gate-drive voltage for the high-side n-channel MOSFET. The capacitor between BST and LX is charged from VL to 6.5V minus the diode forward-voltage drop while the low-side MOSFET is on. When the low-side MOSFET is switched off, the stored voltage of the capacitor is stacked above LX to provide the necessary turn-on voltage (VGS) for the high-side MOSFET. The controller then closes an internal switch between BST and DH to turn the high-side MOSFET on. Current-Sense Amplifier The current-sense circuit amplifies the differential current-sense voltage (VCS+ - VCS-). This amplified current-sense signal and the internal slope-compensation signal are summed (VSUM) together and fed into the PWM comparator’s inverting input. The PWM comparator shuts off the high-side MOSFET when V SUM exceeds the integrated feedback voltage (VCOMP). The differential current sense is also used to provide peak inductor current limiting. This current limit is more accurate than the valley current limit, which is measured across the low-side MOSFET’s on-resistance. Current-Limit Circuit The MAX8650 uses both foldback and peak current limiting (Figure 5). The valley foldback current limit is used to reduce power dissipation of external compo- 12 nents, mainly inductor and power MOSFETs, and upstream power source, when output is severely overloaded or short circuited and POK is low. Thus, the circuit can withstand short-circuit conditions continuously without causing overheating of any component. The peak constant-current limit sets the current-limit point more accurately since it does not have to suffer the wide variation of the low-side power MOSFET’s on-resistance due to tolerance and temperature. The valley current is sensed across the on-resistance of the low-side MOSFET (VPGND - VLX). The valley current limit trips when the sensed voltage exceeds the valley current-limit threshold. The valley current limit recovers when the sensed voltage drops below the valley currentlimit threshold (except when using the latch-off option). Set the minimum valley current-limit threshold, when the output voltage is at the nominal regulated value, higher than the maximum peak current-limit setting. With this method, the current-limit point accuracy is controlled by the peak current limit and is not interfered with by the wide variation of MOSFET on-resistance. See the Setting the Current Limit section for how to set these limits. The MAX8650 can be configured for either an adjustable valley current-limit threshold with adjustable foldback ratio, or a fixed valley current limit that latches the converter off. When latch-off is used (MODE is connected to AVL), set the current-limit threshold by only one resistor from ILIM2 to GND and make sure this threshold is higher than the maximum output current required by at least a 20% margin. Cycle EN or input power to reset the current-limit latch. The peak current limit is used to sense the inductor current, and is more accurate than the valley current limit since it does not depend upon the on-resistance of the low-side MOSFET. The peak current can be measured across the resistance of the inductor for the highest efficiency, or alternatively, a current-sense resistor can be used for more accurate current sensing. A resistor connected from ILIM1 to GND sets the peak current-limit threshold. For more information on the current limit, see the Setting the Current Limit section. Switching Frequency and Synchronization The MAX8650 has an adjustable internal oscillator that can be set to any frequency from 200kHz to 1.2MHz. To set the switching frequency, connect a resistor from FSYNC to GND. Calculate the resistor value from the following equation: ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency The MAX8650 can also be synchronized to an external clock by connecting the clock signal to FSYNC. In addition, SYNCO is provided to synchronize a second MAX8650 controller 180° out-of-phase with the first by connecting SYNCO of the first controller to FSYNC of the second. When the first controller is synchronized to an external clock, the external clock is inverted to generate SYNCO. Therefore, to get 180° out-of-phase operation, the clock input to the first controller should have a 50% duty cycle. Thermal-Overload Protection Thermal-overload protection limits total power dissipation in the MAX8650. When the junction temperature exceeds +160°C, an internal thermal sensor shuts down the device, allowing the IC to cool. The thermal sensor turns the IC on again after the junction temperature cools by 15°C, resulting in a pulsed output during continuous thermal-overload conditions. Power-Good Signal (POK) POK is an open-drain output on the MAX8650 that monitors the output voltage. When the output is above 92% VIN 10V TO 24V C1 R1 R2 D1 SYNC 1 ON EN OFF POK 11 24 SYNCO 3 23 22 R6 21 C5 20 R13 R8 EN BST POK DH C2 2 4 D2 C3 5 6 SYNCO SCOMP MAX8650EEG 16 19 VOUT 3.3V/15A L1 C6 Q1 C9A LX DL 7 R14 C9B Q2 R5 C7 MODE FSYNC ILIM2 PGND REFIN VL SS IN ILIM1 AVL COMP CS+ 8 9 C10 C11 C13 10 C15 12 R15 C14 14 C8 R9 18 FB CS- 15 C12 R10 R11 17 GND 13 OVP R12 Figure 3. Applications Circuit with 500kHz Switching, 10V to 24V Input, and 3.3V/15A Output ______________________________________________________________________________________ 13 MAX8650 of its nominal regulation voltage, POK is high impedance. When the output drops below 89% of its nominal regulation voltage, POK is internally pulled low. POK is also internally pulled low when the MAX8650 is shut down. To use POK as a logic-level signal, connect a pullup resistor from POK to the logic supply rail. ⎛ 1 ⎞ ⎛ 1kΩ ⎞ RFSYNC = ⎜ − 162ns⎟ ⎜ ⎟ ⎝ 2fS ⎠ ⎝ 16.34ns ⎠ MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency Table 1. Component List for Figure 3 COMPONENT VENDOR/PART QUANTITY C1, C2, C3 10µF, 25V X5R ceramic capacitors TDK C3225X5R1E106M (1210) 3 C5, C6 0.1µF, 10V X7R ceramic capacitors Kemet C0603C104M9RAC (0603) 2 C7 220pF, 50V X7R ceramic capacitor TDK C1608X7R1H271K 1 C8 Not installed — 0 C9A, C9B 150µF ±20%, 4V, 7mΩ ESR polymer aluminum electrolytic capacitors Panasonic EEFSDOG151R 2 C10, C14 0.47µF ±10%, 10V X5R ceramic capacitors Taiyo Yuden LMK107BJ474KA (0603) 2 4.7µF, 10V X5R ceramic capacitor TDK C2012X5R1A475M (0805) 1 C11 C12 100pF, 25V C0G ceramic capacitor Kemet C603C101K3GAC (0603) 1 1µF, 16V X5R ceramic capacitors TDK C1608X7R1C105M (0603) 2 D1 100V, 200mA switching diode Central CMPD914 (SOT23) 1 D2 30V, 100mA Schottky diode Central CMPSH-3 (SOT23) 1 L1 1.2µH, 18.2A, 2.6mΩ max, 2.16mΩ typ inductor TOKO FDA1254-1R2M 1 Q1 30V n-channel MOSFET Fairchild FDS7296N3 1 Q2 30V n-channel MOSFET Fairchild FDS7088SN3 1 R1 51.1kΩ ±1% resistor (0603) — 1 R2 100kΩ ±5% resistor (0603) — 1 R3 0Ω resistor — 1 R4 Not installed — 0 R5 17.4kΩ ±1% resistor (0603) — 1 R6 130kΩ ±1% resistor (0603) — 1 R8 220kΩ ±5% resistor (0603) — 1 R9, R11 7.5kΩ ±1% resistors (0603) — 2 R10, R12 28.0kΩ ±1% resistors (0603) — 2 R13 39.2Ω ±1% resistor (0603) — 1 R14 2.4kΩ ±5% resistor (0603) — 1 R15 39.2kΩ ±5% resistor (0603) — 1 C13, C15 14 DESCRIPTION ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650 VIN 10.8V TO 13.2V R2 R1 D1 SYNC ON EN OFF POK 1 OPTIONAL 11 24 SYNCO 3 23 R5 22 FSYNC EN BST POK DH VREFIN 0.9VDC 21 C4 20 SYNCO SCOMP MAX8650 C6 R8 PGND VL SS ILIM1 COMP CS- R10 18 17 VOUT 0.9V ±8A L1 C5 Q1 C8A 7 8 9 C8B C8C C8D C8E R11 C9 C10 REFIN C7 R9 C2 Q2 ILIM2 CS+ 19 D2 LX DL AVL 16 4 6 IN R7 C1 2 5 R6 C3 MODE FB GND C12 10 C14 12 R12 C13 14 15 C11 13 OVP Figure 4. Applications Circuit with 400kHz Switching, 12V Input, and 0.9V ±8A Output ______________________________________________________________________________________ 15 MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency Table 2. Component List for Figure 4 COMPONENT DESCRIPTION VENDOR / PART QUANTITY C1, C2 10µF, 16V X5R ceramic capacitors (1210) Taiyo Yuden EMK325BJ106MN 2 C3 0.01µF, 10V X7R ceramic capacitor (0603) Kemet C0603C103M9RAC 1 C4, C5 0.1µF, 10V X7R ceramic capacitors Kemet C0603C104M9RAC 2 C6 1800pF, 50V X7R ceramic capacitor TDK C1608X7R1H182K 1 C7 X7% 22pF, 50V ceramic capacitor TDK C1608C0G1H220K 1 680µF/20%, 2.5V, 6mΩ ESR capacitors, POS Al Lytic Sanyo 2R5TPD680M6 5 10V ±10%, 0.47µF X5R ceramic capacitors (0603) Taiyo Yuden LMK107BJ474KA 2 C10 4.7µF, 10V X5R ceramic capacitor (0805) TDK C2012X5R1A475M 1 C11 100pF, 25V ceramic capacitor (C0G) Kemet C0402C101K3GAC 1 C8A–C8E C9, C13 C12, C14 1µF, 16V X5R ceramic capacitors (0603) TDK C1608X7R1C105M 2 D1 Diode, switching, 100V, 200mA Central/CMPD914 1 D2 30V, 100mA diode Schottky Central/CMPSH-3 1 L1 0.56µH, 15A, 1.7mΩ inductor Panasonic ETQPLR56WFC 1 Q1 30V n-MOSFET, 8-pin SO Vishay Si4346DY 1 Q2 30V n-MOSFET, 8-pin SO Vishay Si4362DY 1 R1 100kΩ ±5% resistor (0603) — 1 R2 66.5kΩ ±1% resistor (0603) — 1 R3 0Ω resistor — 1 R4 Resistor, open — 0 R5 16.2kΩ ±1% resistor (0603) — 1 R6 35.7 kΩ ±1% resistor (0603) — 1 R7 15.8kΩ ±1% resistor (0603) — 1 R8 160kΩ ±5% resistor (0603) — 1 R9, R10 10kΩ ±5% resistors (0603) — 2 R11 1.5kΩ ±5% resistor (0603) — 1 R12 1.1kΩ ±5% resistor (0603) — 1 Table 3. Suggested Components Manufacturers MANUFACTURER Central Semiconductor COMPONENTS PHONE WEBSITE Diodes 631-435-1110 Fairchild Semiconductor MOSFETs 972-910-8000 www.fairchildsemi.com Panasonic Capacitors 714-373-7939 www.panasonic.com Sumida www.centralsemi.com Inductors 847-545-6700 www.sumida.com Taiyo Yuden Capacitors 408-573-4150 www.t-yuden.com TDK Capacitors 847-803-6100 www.component.tdk.com Vishay MOSFETs 402-564-3131 www.vishay.com 16 ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650 IPEAK INDUCTOR CURRENT AVL ILOAD MAX8650 R4 IVALLEY SCOMP R3 TIME Figure 5. Inductor-Current Waveform Design Procedure Setting the Output Voltage To set the output voltage for the MAX8650, connect FB to the center of an external resistor-divider from the output to GND (R9 and R10 of Figure 3). Select R9 between 8kΩ and 24kΩ, and then calculate R10 with the following equation: ⎛V ⎞ R10 = R9 × ⎜ OUT − 1⎟ ⎝ VFB ⎠ where VFB = 0.7V. R9 and R10 should be placed as close to the IC as possible. Setting the Output Overvoltage Protection Threshold To set the overvoltage threshold voltage for the MAX8650, connect OVP to the center of an external resistor-divider from the output to GND (R11 and R12 of Figure 3). Select R11 between 8kΩ and 24kΩ, then calculate R12 with the following equation: ⎛V ⎞ R12 = R11 × ⎜ OUT − 1⎟ ⎝ VOVP ⎠ where VOVP = 0.8V when using the internal reference. When using an external reference, VOVP is 115% of VREFIN. Setting the Slope Compensation For most applications where the duty cycle is less than 50%, connect SCOMP to GND to set the slope compensation to the default of 125mV/T, where T is the oscillator period (T = 1 / fS). Figure 6. Resistor-Divider for Setting the Slope Compensation For a slope compensation of 250mV/T, connect SCOMP to AVL. For applications with a duty cycle greater than 50%, set the SCOMP voltage with a resistor voltage-divider from AVL to GND (R3 and R4 in Figure 6). First, use the following equation to find the SCOMP voltage: V × 60 × RL VSCOMP = OUT fS × L where RL is the DC resistance of the inductor, and fS is the switching frequency. Next, select a value for R3, typically 10kΩ, and solve for R4 as follows: R4 = (5V − VSCOMP ) × R3 VSCOMP This sets the slope-compensation voltage rate to VSCOMP / (10 x T). Inductor Selection There are several parameters that must be examined when determining which inductor is to be used. Input voltage, output voltage, load current, switching frequency, and LIR. LIR is the ratio of inductor-current ripple to maximum DC load current. A higher LIR value allows for a smaller inductor, but results in higher losses and higher output ripple. A good compromise between size and efficiency is an LIR of 0.3. Once all the parameters are chosen, the inductor value is determined as follows: VOUT × (VIN − VOUT ) L= VIN × fS × ILOAD(MAX) × LIR ______________________________________________________________________________________ 17 MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency where fS is the switching frequency. Choose a standardvalue inductor close to the calculated value. The exact inductor value is not critical and can be adjusted to make trade-offs between size, cost, and efficiency. Lower inductor values minimize size and cost, but they also increase the output ripple and reduce the efficiency due to higher peak currents. On the other hand, higher inductor values increase efficiency, but eventually resistive losses due to extra turns of wire exceed the benefit gained from lower AC current levels. This is especially true if the inductance is increased without also increasing the physical size of the inductor. Find a low-loss inductor with the lowest possible DC resistance that fits the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 300kHz. The chosen inductor’s saturation current rating must exceed the peak inductor current determined as: IPEAK = ILOAD(MAX) + LIR 2 × ILOAD(MAX) Setting the Current Limit Valley Current Limit The MAX8650 has an adjustable valley current limit, configurable for foldback with automatic recovery, or a constant-current limit with latchup. To set the current limit for foldback mode, connect a resistor from ILIM2 to the output (RFOBK), and another resistor from ILIM2 to GND (RILIM2). See Figure 7. The values of RFOBK and RILIM2 are calculated as follows: 1) First, select the percentage of foldback (PFB). This percentage corresponds to the current limit when VOUT equals zero, divided by the current limit when VOUT equals its nominal voltage. A typical value of PFB is in the 15% to 40% range. A lower value of PFB yields lower short-circuit current. The following equations are used to calculate RFOBK and RILIM2: RFOBK = RILIM 2 = PFB × VOUT 5µA × 1 − PFB ( ( ) ) RFOBK MAX8650 ILIM2 RILIM2 Figure 7. ILIM2 Resistor Connections 2) If the resulting value of RILIM2 is negative, either increase PFB or choose a low-side MOSFET with a lower RDS(ON). The latter is preferred as it increases the efficiency and results in a lower short-circuit current. To set the constant-current limit for the latchup mode, only RILIM2 is used. The equation for RILIM2 below sets the current-limit threshold at 1.2 times the maximum rated output current: RILIM 2 = 1.2 × IVALLEY × RDS(ON) 1µA Similarly, IVALLEY is the value of the inductor valley current at maximum load and RDS(ON) is the maximum on-resistance of the low-side MOSFET at the highest operating junction temperature. Peak Current Limit The peak current-limit threshold (VTH) is set by a resistor connected from ILIM1 to GND. VTH corresponds to the peak voltage across the sensing element (inductor or current-sense resistor), RLIM1. RLIM1 is calculated as follows: 8 × VTH RILIM1 = 10µA This allows a maximum DC output current (ILIM) of: 5 × RDS(ON) × IVALLEY × 1 − PFB × RFOBK ( ) VOUT − ⎡5 × RDS(ON) × IVALLEY × 1 − PFB ⎤ ⎥⎦ ⎢⎣ where IVALLEY is the value of the inductor valley current at maximum load (I LOAD(MAX) - 1/2 x I P-P ), and RDS(ON) is the maximum on-resistance of the low-side MOSFET at the highest operating junction temperature. 18 OUT LX ILIM = VTH RDC I − PK −PK 2 where RDC is either the DC resistance of the inductor or the value of the optional current-sense resistor. To ensure maximum output current, use the minimum value of VTH from each setting, and the maximum RDC values at the highest expected operating temperature. ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency VOUT MAX8650 LX MAX8650 L1 MAX8650 R3 L1 VOUT LX R4 R4 C9 C9 R5 CS+ C13 R5 CS+ C13 CS- CS- Figure 8. Current Sense Using the Inductor’s DC Resistance Figure 9. Using a Current-Sense Resistor for Improved CurrentSense Accuracy The DC resistance of the inductor’s copper wire has a +0.22%/°C temperature coefficient. To use the DC resistance of the output inductor for current sensing, an RC circuit is added (see Figure 8). The RC time constant is set at twice the inductor (L/RDC) time constant. Pick the value of C9 (typically 0.47µF), then calculate the resistor value from R4 = 2L / (RDC x C9). Add a resistor (R5 in Figure 8) to the CS- connection to minimize input offset error. Calculate the value of R5 as follows: 1) When VOUT ≥ 2.4V: 2) Maximum drain-to-source voltage (VDSS): should be at least 20% higher than the input supply rail at the high-side MOSFET’s drain. 3) Gate charges (QG, QGD, QGS): the lower, the better. For a 5V input application, choose the MOSFETs with rated RDS(ON) at VGS ≤ 4.5V. With higher input voltages, the internal VL regulator provides 6.5V for gate drive to minimize the on-resistance for a wide range of MOSFETs. R5 = ⎛ RILIM1 × 10µA ⎞ ⎜ 20µA + ⎟ × R4 32kΩ ⎝ ⎠ 20mA 2) When VOUT < 2.4V: R5 = 15µAx R4 ⎛ RILIM1 × 10µA ⎞ ⎜15µA + ⎟ 32kΩ ⎝ ⎠ Capacitor C13 is connected in parallel with R5 and is equal in value to C9. The equivalent current-sense resistance when using an inductor for current sensing is equal to the DC resistance of the inductor (RDC). MOSFET Selection The MAX8650 drives two or four external, logic-level, nchannel MOSFETs as the circuit switch elements. The key selection parameters are: 1) On-resistance (RDS(ON)): the lower, the better. For a good compromise between efficiency and cost, choose the high-side MOSFET (N1, N2) that has conduction losses equal to switching losses at nominal input voltage and output current. The selected low-side MOSFET (N3, N4) must have an RDS(ON) that satisfies the current-limit-setting condition above. Make sure that the low-side MOSFET does not spuriously turn on due to dV/dt caused by the high-side MOSFET turning on, as this would result in shoot-through current and degrade the efficiency. MOSFETs with a lower QGD/QGS ratio have higher immunity to dV/dt. For highcurrent applications, it is often preferable to parallel two MOSFETs rather than to use a single large MOSFET. For proper thermal-management design, the power dissipation must be calculated at the desired maximum operating junction temperature, maximum output current, and worst-case input voltage (for the low-side MOSFET, worst case is at VIN(MAX); for the high-side MOSFET, it could be either at VIN(MAX) or VIN(MIN)). The high-side and low-side MOSFETs have different loss components due to the circuit operation. The lowside MOSFET operates as a zero voltage switch; therefore, major losses are the channel-conduction loss (PLSCC) and the body-diode conduction loss (PLSDC). ______________________________________________________________________________________ 19 MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency ⎞ ⎛ V PLSCC = ⎜1 − OUT ⎟ × I2LOAD × RDS(ON) VIN ⎠ ⎝ Use RDS(ON) at TJ(MAX): PLSDC = 2 × ILOAD × VF × tDT × fS where VF is the body-diode forward-voltage drop, tDT is the dead time between high-side and low-side switching transitions (30ns typ), and fS is the switching frequency. The high-side MOSFET operates as a duty-cycle control switch and has the following major losses: the channel-conduction loss (PHSCC), the VL overlapping switching loss (PHSSW), and the drive loss (PHSDR). The high-side MOSFET does not have body-diode conduction loss, unless the converter is sinking current, when the loss due to body-diode conduction is calculated as PHSDC = 2 x ILOAD x VF x tDT x fS: V PHSCC = OUT × I2LOAD × RDS(ON) VIN Use RDS(ON) at TJ(MAX): PHSSW = VIN × ILOAD × QGS + QGD IGATE × fS where IGATE is the average DH driver output-current capability determined by: IGATE ≅ RDS(ON)(DR) + RGATE where RDS(ON)(DR) is the high-side MOSFET driver’s on-resistance (1.5Ω typ) and RGATE is the internal gate resistance of the MOSFET (~2Ω): RGATE RGATE + RDS(ON)(DR) where VGS ≈ VVL. In addition to the losses above, allow approximately 20% more for additional losses due to MOSFET output capacitances and low-side MOSFET body-diode reverse-recovery charge dissipated in the high-side MOSFET, but is not well defined in the MOSFET data sheet. Refer to the MOSFET data sheet for thermalresistance specifications to calculate the PC board area needed to maintain the desired maximum operat- 20 To reduce EMI caused by switching noise, add a 0.1µF ceramic capacitor from the high-side switch drain to the low-side switch source or add resistors in series with DH and DL to slow down the switching transitions. However, adding series resistors increases the power dissipation of the MOSFET, so ensure this does not overheat the MOSFET. Input Capacitor The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor must meet the ripple-current requirement (IRMS) imposed by the switching currents defined by the following equation: IRMS = ( ILOAD VOUT × VIN − VOUT ) VIN I RMS has a maximum value when the input voltage equals twice the output voltage (VIN = 2 x VOUT), so IRMS(MAX) = ILOAD / 2. Ceramic capacitors are recommended due to their low ESR and ESL at high frequency with relatively low cost. Choose a capacitor that exhibits less than 10°C temperature rise at the maximum operating RMS current for optimum long-term reliability. Ceramic capacitors with X5R or better temperature characteristics are recommended. Output Capacitor 0.5 × VVL PHSDR = QG × VGS × fS × ing junction temperature with the above calculated power dissipations. The key selection parameters for the output capacitor are the actual capacitance value, the equivalent series resistance (ESR), the equivalent series inductance (ESL), and the voltage-rating requirements. These parameters affect the overall stability, output voltage ripple, and transient response. The output ripple has three components: variations in the charge stored in the output capacitor, the voltage drop across the capacitor’s ESR and ESL caused by the current into and out of the capacitor. The maximum output voltage ripple is estimated as follows: VRIPPLE = VRIPPLE(ESR) + VRIPPLE(C) + VRIPPLE(ESL) The output voltage ripple as a consequence of the ESR, ESL, and output capacitance is: VRIPPLE(ESR) = IP−P × ESR VRIPPLE(ESL) = VIN L + ESL × ESL ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency IP−P 8 × COUT × fS where IP-P is the peak-to-peak inductor current: V − VOUT VOUT IP−P = IN × fS × L VIN These equations are suitable for initial capacitor selection, but final values should be chosen based on a prototype or evaluation circuit. As a general rule, a smaller current ripple results in less output-voltage ripple. Since the inductor ripple current is a factor of the inductor value and input voltage, the output-voltage ripple decreases with larger inductance, and increases with higher input voltages. Ceramic, tantalum, or aluminum polymer electrolytic capacitors are recommended. The aluminum electrolytic capacitor is the least expensive; however, it has higher ESR. To compensate for this, use a ceramic capacitor in parallel to reduce the switching ripple and noise. For reliable and safe operation, ensure that the capacitor’s voltage and ripple-current ratings exceed the calculated values. The response to a load transient depends on the selected output capacitors. After a load transient, the output voltage instantly changes by ESR x ∆I LOAD. Before the controller can respond, the output voltage deviates further, depending on the inductor and outputcapacitor values. After a short period (see the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its nominal state. The controller response time depends on its closedloop bandwidth. With a higher bandwidth, the response time is faster, thus preventing the output voltage from further deviation from its regulating value. Compensation Design The MAX8650 uses an internal transconductance error amplifier whose output compensates the control loop. The external inductor, output capacitor, compensation resistor, and compensation capacitors determine the loop stability. The inductor and output capacitor are chosen based on performance, size, and cost. Additionally, the compensation resistor and capacitors are selected to optimize control-loop stability. The component values, shown in the circuits of Figures 3 and 4, yield stable operation over the given range of input-tooutput voltages. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor, so the MAX8650 uses the voltage drop across the DC resistance of the induc- tor or the alternate series current-sense resistor to measure the inductor current. Current-mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor resulting in a smaller phase shift and requiring a less elaborate error-amplifier compensation than voltage-mode control. A simple single-series RC and CC is all that is needed to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering. For other types of capacitors, due to the higher capacitance and ESR, the frequency of the zero created by the capacitance and ESR is lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop, add another compensation capacitor from COMP to GND to cancel this ESR zero. The basic regulator loop is modeled as a power modulator, an output feedback-divider, and an error amplifier. The power modulator has DC gain set by gmc x RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. Below are equations that define the power modulator: R ×f ×L GMOD(dc) = gmc × LOAD S RLOAD + fS × L where RLOAD = VOUT / IOUT(MAX), fS is the switching frequency, L is the output inductance, and gmc = 1 / (AVCS x RDC), where AVCS is the gain of the currentsense amplifier (12 typ), and RDC is the DC resistance of the inductor. Find the pole and zero frequencies created by the power modulator as follows: fpMOD = 1 ⎛R ⎞ ×f ×L 2π × COUT × ⎜ LOAD S + ESR⎟ ⎝ RLOAD + fS × L ⎠ fzMOD = 1 2π × COUT × ESR When COUT comprises “n” identical capacitors in parallel, the resulting COUT = n x COUT(EACH), and ESR = ESR(EACH) / n. Note that the capacitor zero for a parallel combination of like capacitors is the same as for an individual capacitor. See Figures 10 and 11 for illustrations of the pole and zero locations. The feedback voltage-divider has a gain of GFB = VFB / VOUT, where VFB is equal to 0.75V. ______________________________________________________________________________________ 21 MAX8650 VRIPPLE(C) = MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency CLOSE LOOP CLOSE LOOP GAIN (dB) GAIN (dB) POWER MODULATOR POWER MODULATOR ERROR AMP ERROR AMP fC 0dB FREQUENCY fpMOD FB DIVIDER 0dB FB DIVIDER fzMOD FREQUENCY fpMOD fC fzMOD Figure 10. Simplified Gain Plot for the fzMOD > fC Case Figure 11. Simplified Gain Plot for the fzMOD < fC Case The transconductance error amplifier has a DC gain, GEA(DC) = gmEA x RO, where gmEA is the error-amplifier transconductance, which is equal to 110µS, RO is the output resistance of the error amplifier, which is 30MΩ. A dominant pole is set by the compensation capacitor (CC), the amplifier output resistance (RO), and the compensation resistor (RC), and a zero is set by the compensation resistor (RC) and the compensation capacitor (CC). There is an optional pole set by CF and RC to cancel the output-capacitor ESR zero if it occurs near the crossover frequency (fC). Thus: For the case where fzMOD is greater than fC: fpdEA = 1 2π × CC × (RO + RC ) fzEA = fpEA = 1 2π × CC × RC The crossover frequency, fC, should be much higher than the power-modulator pole fpMOD. Also, fC should be less than or equal to 1/5 the switching frequency. Select a value for fC in the range: fS 5 At the crossover frequency, the total loop gain must equal 1, and is expressed as: 22 VFB VOUT fpMOD fC Then RC can be calculated as: RC = VOUT gmEA × VFB × GMOD( fc) where gmEA = 110µS. The error-amplifier compensation zero formed by RC and CC should be set at the modulator pole fpMOD. Calculate the value of CC as follows: ( 2π × CF × RC GEA ( fc) × GMOD( fc) × GMOD( fc) = GMOD(dc) × R × f × L × COUT CC = LOAD S RLOAD + fS × L × RC 1 fpMOD << fC ≤ GEA ( fc) = gmEA × RC ) If fzMOD is less than 5 x fC, add a second capacitor, CF, from COMP to GND. The value of CF is: CF = 1 2π × RC × fzMOD As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same. =1 ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency GMOD( fc) = GMOD(dc) × fpMOD = fpMOD = fzMOD The error-amplifier gain at fC is: f GEA ( fc) = gmEA × RC × zMOD fC 1 ⎛R ⎞ ×f ×L 2π × COUT × ⎜ LOAD S + ESR⎟ ⎝ RLOAD + fS × L ⎠ 1 ⎛ ⎞ ⎛ 3 −6 ⎞ ⎜ 0.22 × (500 × 10 ) × ⎜⎝1.2 × 10 ⎟⎠ ⎟ −6 2π × (300 × 10 ) × ⎜ + 0.0035⎟ ⎜ 0.22 + (500 × 103 ) × ⎛1.2 × 10 −6 ⎞ ⎟ ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ ⎝ ⎠ = 3.23kHz f fpMOD << fC ≤ S 5 RC is calculated as: V fC RC = OUT × VFB gmEA × GMOD( fc) × fzMOD 3.23kHz << fC ≤ 100kHz, select fC = 100kHz: fzMOD = where gmEA = 110µS. CC is calculated from: CC = 1 2π × COUT × ESR (RLOAD + fS × L) × RC GMOD( fc) = GMOD(dc) × CF is calculated from: RC = 1 2π × RC × fzMOD = Below is a numerical example to calculate RC and CC values of the typical operating circuit of Figure 3: AVCS = 12 L = 1.2µH RDC = 2.16mΩ fS = 500kHz gmc = 1 / (AVCS x RDC) = 1 / (12 x 0.00216) = 38.6S VOUT = 3.3V IOUT(MAX) = 15A RLOAD = VOUT / IOUT(MAX) = 3.3 / 15 = 0.22Ω COUT = 300µF ESR = 3.5mΩ R ×f ×L GMOD(dc) = gmc × LOAD S RLOAD + fS × L = 38.6 × ⎛ ⎞ 0.22 × (500 × 103 ) × ⎜1.2 × 10 −6 ⎟ ⎝ ⎠ ⎞ ⎛ 0.22 + (500 × 10 ) × ⎜1.2 × 10 −6 ⎟ ⎝ ⎠ 3 1 2π × (300 × 10 −6 ) × 0.0035 = 152kHz Since fzMOD > fC: RLOAD × fS × L × COUT CF = = = 6.22 fpMOD fC = 6.22 × 3230 100 × 103 = 0.201 VOUT gmEA × VFB × GMOD( fc) 3.3 = 199 kΩ ⎛ −6 ⎞ × × × 110 10 0 . 7 0 . 201 ⎜ ⎟ ⎝ ⎠ Select the nearest standard value: RC = 200kΩ: R × f × L × COUT CC = LOAD S RLOAD + fS × L × RC ( = ) 0.22(500 × 103 ) × (1.2 × 10 −6 ) × (300 × 10 −6 ) = 241p ⎛ 3 −6 ⎞ 3 ⎜ 0.22 + (500 × 10 ) × (1.2 × 10 )⎟ × (200 × 10 ) ⎝ ⎠ Select the nearest standard value: CC = 270pF: CF = 1 2π × RC × fzMOD = 1 2π × (200 × 103 ) × (152 × 103 ) = 5.2pF Since the calculated value for CF is very small (close to the parasitic capacitance present at COMP), it is not necessary: R8 = RC = 200kΩ C7 = CC = 270pF C8 = CF = Not installed ______________________________________________________________________________________ 23 MAX8650 For the case where fzMOD is less than fC: The power modulator gain at fC is: MAX8650 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency Applications Information PC Board Layout Guidelines Careful PC board layout is critical to achieve low switching losses and clean, stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout: 1) Place IC decoupling capacitors as close to IC pins as possible. Keep the power ground plane and signal ground plane separate. Place the input ceramic decoupling capacitor directly across and as close as possible to the high-side MOSFET’s drain and the low-side MOSFET’s source. This is to help contain the high switching current within this small loop. 2) For output current greater than 10A, a multilayer PC board is recommended. Pour a signal ground plane in the second layer underneath the IC to minimize noise coupling. 3) Connect input, output, and VL capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 4) Place the inductor current-sense resistor and capacitor as close to the inductor as possible. Make a Kelvin connection to minimize the effect of PC board trace resistance. Place the input-bias balance resistor (R5 in Figures 8 and 9) near CS-. Run two closely parallel traces from across the capacitor (C9 in Figures 8 and 9) to CS+ and CS-. 5) Place the MOSFET as close as possible to the IC to minimize trace inductance of the gate-drive loop. If parallel MOSFETs are used, keep the trace lengths to both gates equal. 6) Connect the drain leads of the power MOSFET to a large copper area to help cool the device. Refer to the power MOSFET data sheet for recommended copper area. 7) Place the feedback and compensation components as close to the IC pins as possible. Connect the feedback resistor-divider from FB to the output as close as possible to the farthest output capacitor. 8) Refer to the MAX8650 evaluation kit for an example layout. Chip Information PROCESS: BiCMOS Pin Configuration TOP VIEW FSYNC 1 24 POK MODE 2 23 SCOMP SYNCO 3 BST 4 22 ILIM2 MAX8650 21 REFIN DH 5 20 SS LX 6 19 COMP DL 7 18 FB PGND 8 17 OVP VL 9 16 ILIM1 IN 10 15 CS- EN 11 14 CS+ AVL 12 13 GND QSOP 24 ______________________________________________________________________________________ 4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency QSOP.EPS PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH 21-0055 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 © 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX8650 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)