19-1419; Rev 5; 4/00 MAX3675/MAX3676 Evaluation Kits Component Suppliers SUPPLIER Coilcraft PHONE 847-639-6400 FAX 847-639-1469 ____________________________Features ♦ SMA Connections for all Data and Clock I/Os ♦ Test Points for Monitoring Received-Signal-Strength Indicator (RSSI) Loss-of-Power (LOP) Loss-of-Lock (LOL) LOP Threshold Level (VTH) ♦ +3.3V Single-Supply Operation ♦ Fully Assembled and Tested Ordering Information PART MAX3675EHJEVKIT MAX3676EHJEVKIT TEMP. RANGE -40°C to +85°C -40°C to +85°C IC PACKAGE 5mm 32 TQFP 5mm 32 TQFP __________________________________________________________________Component List DESIGNATION QTY DESCRIPTION C1–C4, C7–C10, C13, C21, C23, C25, C27 13 0.1µF, 25V ceramic capacitors C5, C6, C14 3 0.01µF, 25V ceramic capacitors C12 1 2.2µF ±20% X7R ceramic cap or 16V (min) tantalum capacitor C22, C24, C26, C28, C29, C30 6 100pF, 25V ceramic capacitors DESIGNATION QTY R10, R14, R18, R22 4 221Ω ±1% resistors DESCRIPTION R23 1 52.3Ω ±1% resistor (MAX3675EHJ) R23 1 0Ω resistor (MAX3676EHJ) R24 1 3kΩ ±5% resistor R25 1 3.3kΩ ±5% resistor R26 1 10kΩ potentiometer R27 1 20kΩ ±5% resistor R28, R32, R33 3 10kΩ ±5% resistors 0.047µF, 25V ceramic capacitor R29 1 120kΩ ±5% resistor 0.033µF, 25V ceramic capacitor R31 1 100kΩ potentiometer 1 33µF ±20% capacitor R30 1 0Ω resistor L1, L2 0 Not included. Use a 56nH inductor for additional power-supply decoupling, if needed. DDI+, DDI-, ADI+, ADI-, SDO+, SDO-, SCLKO+, SCLKO- 8 SMA connectors L3, L4 2 56nH inductors Coilcraft 0805HS-560TKBC VCC, JP1, JP2, GND 4 2-pin headers R2, R4, R9, R13, R17, R21 6 130Ω ±1% resistors JP4, JP5, JP6, JP7, JP9 5 Not Installed R1, R3 2 82.5Ω ±1% resistors JP8, JP10 2 3-pin headers R5, R6 2 49.9Ω ±1% resistors TP1–TP4 6 1-pin headers None 3 Shunts for JP2, JP8, and JP10 U1 1 MAX3675EHJ or MAX3676EHJ None 1 MAX3675 or MAX3676 data sheet C20 1 2.2µF, 25V ceramic capacitor C11, C16 0 Open C15 1 C17 1 C19 R7, R11, R15, R19 4 24.3Ω ±1% resistors R8, R12, R16, R20 4 27.4Ω ±1% resistors ________________________________________________________________ Maxim Integrated Products 1 For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Evaluate: MAX3675/MAX3676 General Description The MAX3675/MAX3676 evaluation kits (EV kits) simplify evaluation of the MAX3675/MAX3676 622Mbps clockrecovery and data-retiming IC with limiting amplifier. The EV kits enable testing of all MAX3675/MAX3676 functions. They provide selectable analog or digital data inputs, as well as differential PECL-compatible data and clock outputs. The differential data and clock outputs have 50Ω attenuators on-board to allow direct connection to a highspeed oscilloscope. The MAX3675/MAX3676 EV kits come configured for +3.3V operation and consume approximately 120mA. Evaluate: MAX3675/MAX3676 MAX3675/MAX3676 Evaluation Kits _______________Detailed Description The MAX3675/MAX3676 EV kits are fully assembled and factory tested. They enable testing of all MAX3675/ MAX3676 functions. Test Equipment Required • • • • +3.3V power supply with 200mA current capability Signal-source, 622Mbps BER test set Jitter analyzer capable of 622Mbps performance Oscilloscope with at least 1GHz performance Connections The digital inputs (DDI+, DDI-) have on-board AC-coupling capacitors followed by Thevenin-equivalent 50Ω terminations. The analog inputs (ADI+, ADI-) are equipped with DC 50Ω loads followed by AC-coupling capacitors. Remember that the analog inputs to the MAX3675/MAX3676 must be AC-coupled. All of the MAX3675/MAX3676 data and clock outputs (SDO+, SDO-, SCLKO+, SCLKO-) are terminated on-board with 50Ω, PECL, 2X attenuators. Configured in this way, these outputs can be directly connected to the 50Ω inputs of a high-speed oscilloscope for analysis. Setup 1) Select either the PECL (DDI ENABLE) or the analog (ADI ENABLE) inputs with jumper JP10. 2) Verify that the shunt across jumper JP2 is in place. 3) Verify that the shunt is across pins 2 and 3 of jumper JP8. 4) Verify that resistor R23 is 52.3Ω (MAX3675) or 0Ω (MAX3676). 5) Connect the +3.3V power supply to the appropriate terminals marked on the EV kit and apply power. 6) Connect a 622Mbps PRBS NRZ signal to the selected inputs with 50Ω cables. 7) Connect the outputs to a 50Ω high-speed oscilloscope. Jitter analysis and product performance can also be observed by appropriately interfacing the EV kit with a bit-error-rate tester (BERT) and a jitter analyzer. Interfacing with ECL Test Equipment Not all jitter analyzers and BERTs can easily interface with the EV kits’ PECL output signal levels. If your test equipment requires standard ECL levels, then bias tees are required (Figure 1). For example, if using an HP BERT, you must do the following: 2 VCC -2V DC SDO+ RF & DC MAX3675EHJ MAX3676EHJ EVKITS 50Ω BIAS-T RF BERT SDOOUTPUT ATTENUATORS REMOVED ON SDO+ AND SCLKO+ 50Ω SCLKO+ VCC -2V RF & DC DC 50Ω BIAS-T RF CLOCK IN DATA IN ERROR DETECTOR SCLKO50Ω Figure 1. ECL Interface to Test Equipment 1) Remove the data and clock output attenuators for those signal lines you intend to observe. For example, if you intend to observe SDO+, then open R9 and R10, and short R7 and R8. 2) Use a 50Ω bias tee to bias the MAX3675/MAX3676 outputs. Adjustments, Jumpers, and Test Points Two adjustments are available on the MAX3675/ MAX3676 EV kits: VTH ADJ (R31) and PHADJ (R26). VTH ADJ is used to set the loss-of-power threshold level for the LOP monitor. PHADJ, although not required, can be used to shift the sampling edge of the recovered clock relative to the center of the data eye. Be sure to remove jumper JP2 if you intend to adjust PHADJ. See Table 1 for jumper functions. The following high-impedance test points are provided for signal monitoring: • RSSI, used to monitor the received-signal-strength indicator output • LOP, used to monitor loss of power • LOL, used to monitor loss of lock • VTH, used to monitor the threshold voltage level _______________________________________________________________________________________ MAX3675/MAX3676 Evaluation Kits NAME TYPE DESCRIPTION JP1 2-Pin Disables the MAX3675/ MAX3676 loop filter JP2 2-Pin Disables the phase adjustment (R26) Not supplied. The PC JP4, JP5, board trace between 2-Pin JP6, JP7 jumper pads can be cut open if analysis requires NORMAL POSITION Open (enabled) MAX3675/MAX3676 performance can be greatly affected by circuit board layout and design. Use good highfrequency design techniques, including minimizing ground inductances and using fixed-impedance transmission lines on the data and clock signals. Shorted (disabled) Shorted JP8 3-Pin Disables VTH adjustment (R31) Pins 2 and 3 shorted (enabled) JP10 Used to select between the digital inputs (DDI 3-Pin ENABLE) and the analog inputs (ADI ENABLE) of the MAX3675/MAX3676 — _______________________________________________________________________________________ 3 Evaluate: MAX3675/MAX3676 Layout Considerations Table 1. Jumper Functions ADI+ ADI- DDI- DDI+ Figure 2. MAX3675/MAX3676EHJ EV Kits Schematic _______________________________________________________________________________________ R3 82.5Ω C4 0.1µF R2 130Ω DDI ENABLE C6 R6 49.9Ω 0.01µF C11 OPEN JP1 FILTER DISABLE VCCVCO JP8 2 3 1 R27 20k C13 0.1µF JP2 PHASE ADJ DISABLE GND GND VCC DDI+ SDO+ DDIMAX3675EHJ SDOINSEL MAX3676EHJ VCC ADISCLKO+ ADI+ SCLKOVCC VCC CFILT VTH TEST RSSI C17 0.033µF C15 0.047µF R29 120k R24 3k PHASE R26 ADJ 10k 25 26 27 28 29 30 VCCPA 31 32 C12 R23 NOTE 1 2.2µF ADI ENABLE +3.3V C5 R5 49.9Ω 0.01µF JP10 R4 130Ω NOTE 1: R23 = 52.3Ω (MAX3675) R23 = 0Ω (MAX3676) C2 0.1µF C1 0.1µF R1 82.5Ω C3 0.1µF +3.3V 2 2 24 22 23 21 20 19 18 17 GND FIL+ FILVCC PHADJ+ PHADJVCC LOL R32 10k GND +3.3V R30 0Ω 1 R31 100k R33 10k JP9 C20 2.2µF 3 VTH ADJ VTH VCCOUT VCCOUT C19 33µF LOP GND 16 15 14 13 12 11 10 9 LOL C14 0.01µF VCCOUT R28 10k R25 3.3k VCCPLL C16 OPEN OLC+ OLCRSSI GND INV VTH LOP GND 1 2 3 4 5 6 7 8 1 3 3 +3.3V 2 4 1 JP7 JP6 JP5 JP4 R21 130Ω R17 130Ω R13 130Ω C27 0.1µF C25 L4 0.1µF 56nH C23 L3 0.1µF 56nH L2 SHORT C21 0.1µF L1 SHORT +3.3V +3.3V +3.3V +3.3V R9 130Ω C28 100pF C26 100pF C24 100pF C22 100pF C10 0.1µF R19 24.3Ω C9 0.1µF R15 24.3Ω C8 0.1µF R11 24.3Ω C7 0.1µF R7 24.3Ω C29 100pF R22 221Ω SCLK- SCLK+ SDO- SDO+ C30 100pF VCCPA VCCPLL VCCVCO R20 27.4Ω R18 221Ω R16 27.4Ω R14 221Ω R12 27.4Ω R10 221Ω R8 27.4Ω VCCOUT Evaluate: MAX3675/MAX3676 MAX3675/MAX3676 Evaluation Kits MAX3675/MAX3676 Evaluation Kits Evaluate: MAX3675/MAX3676 1.0" 1.0" Figure 3. MAX3675/MAX3676 EV Kits Component Placement Guide 1.0" Figure 4. MAX3675/MAX3676 EV Kits PC Board Layout— Component Side 1.0" Figure 5. MAX3675/MAX3676 EV Kits PC Board Layout— Ground Plane Figure 6. MAX3675/MAX3676 EV Kits PC Board Layout— Power Plane _______________________________________________________________________________________ 5 Evaluate: MAX3675/MAX3676 MAX3675/MAX3676 Evaluation Kits 1.0" Figure 7. MAX3675/MAX3676 EV Kits PC Board Layout— Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 6 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.