19-2376; Rev 0; 4/02 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package The MAX9180 has fail-safe circuitry that sets the output high for undriven open, short, or terminated inputs. The MAX9180 operates from a single 3.3V supply and consumes only 10mA over a -40°C to +85°C temperature range. Refer to the MAX9129 data sheet for a quad bus LVDS (BLVDS) driver, and to the MAX9181 data sheet for a low-jitter, low-noise 400Mbps LVPECL-toLVDS level translator in an SC70 package. Features ♦ Tiny SC70 Package ♦ Ultra-Low Jitter 23psP-P Added Deterministic Jitter (223 - 1 PRBS) 0.6psRMS Added Random Jitter ♦ 0.5ns (min) Transition Time Minimizes Radiated Noise ♦ 400Mbps Guaranteed Data Rate ♦ Fail-Safe Circuit Sets Output High for Undriven Inputs (Open, Terminated, or Shorted) ♦ Low 10mA Supply Current ♦ Low 6mA Supply Current in Fail-Safe ♦ Conforms to ANSI/EIA/TIA-644 LVDS Standard ♦ High-Impedance Inputs and Outputs in Power-Down Mode Ordering Information PART TEMP RANGE PINPACKAGE MAX9180EXT-T -40°C to +85°C 6 SC70-6 ABC Pin Configuration Applications Cellular Phone Base Stations TOP MARK TOP VIEW DSLAMs Digital Cross-Connects Add/Drop Muxes Network Switches/Routers MAX9180 OUT- 1 6 OUT+ GND 2 5 VCC IN- 3 4 IN+ Multidrop Buses Cable Repeaters Typical Operating Circuit appears at end of data sheet. SC70 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9180 General Description The MAX9180 is a 400Mbps, low-voltage differential signaling (LVDS) repeater, which accepts a single LVDS input and duplicates the signal at a single LVDS output. Its low-jitter, low-noise performance makes it ideal for buffering LVDS signals sent over long distances or noisy environments, such as cables and backplanes. The MAX9180’s tiny size makes it especially suitable for minimizing stub lengths in multidrop backplane applications. The SC70 package (half the size of a SOT23) allows the MAX9180 to be placed close to the connector, thereby minimizing stub lengths and reflections on the bus. The point-to-point connection between the MAX9180 output and the destination IC, such as an FPGA or ASIC, allows the destination IC to be located at greater distances from the bus connector. Ultra-low, 23ps P-P added deterministic jitter and 0.6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-anddata recovery, PLLs, serializers, or deserializers. The MAX9180’s switching performance guarantees a 400Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time. MAX9180 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package ABSOLUTE MAXIMUM RATINGS VCC to GND ...........................................................-0.3V to +4.0V IN+, IN- to GND.....................................................-0.3V to +4.0V OUT+, OUT- to GND .............................................-0.3V to +4.0V Short-Circuit Duration (OUT+, OUT-) .........................Continuous Continuous Power Dissipation (TA = +70°C) 6-Pin SC70 (derate 3.1mW/°C above +70°C) ..............245mW Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Operating Temperature Range ...........................-40°C to +85°C ESD Protection Human Body Model, IN+, IN-, OUT+, OUT- ....................±8kV Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = 3.0V to 3.6V, RL = 100Ω ±1%, |VID| = 0.05V to 1.2V, VCM = |VID / 2| to 2.4V - |VID / 2|, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25°C.) (Notes 1, 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX 7 50 -50 -7 0.05V ≤ |VID| ≤ 0.6V -15 -2.5 +15 0.6V < |VID| ≤ 1.2V -20 -3.5 +20 0.05V ≤ |VID| ≤ 0.6V, VCC = 0V -15 +1.3 +15 0.6V < |VID| ≤ 1.2V, VCC = 0V -20 +2.6 +20 UNITS LVDS INPUT Differential Input High Threshold VTH Differential Input Low Threshold VTL Input Current IIN+, IIN- Power-Off Input Current IIN+, IIN- mV mV µA µA Input Resistor 1 RIN1 VCC = 3.6V or 0V, Figure 1 67 232 kΩ Input Resistor 2 RIN2 VCC = 3.6V or 0V, Figure 1 267 1174 kΩ VOD Figure 2 250 360 450 mV ∆VOD Figure 2 0.008 25 mV 1.25 1.375 V 0.005 25 mV 1.44 1.6 V LVDS OUTPUT Differential Output Voltage Change in VOD Between Complementary Output States Offset (Common-Mode) Voltage VOS Figure 2 Change in VOS for Complementary Output States ∆VOS Figure 2 Output High Voltage VOH Output Low Voltage VOL 1.125 Fail-Safe Differential Output Voltage VOD+ IN+, IN- shorted, open, or parallel terminated Power-Off Output Leakage Current IOOFF VCC = 0V Differential Output Resistance RODIFF VCC = 3.6V or 0V Output Short Current ISC 0.9 1.08 +250 +360 V +450 OUT+ = 3.6V, other output open -10 +0.02 +10 OUT- = 3.6V, other output open -10 +0.02 +10 100 260 400 VID = 50mV, OUT+ = GND -5 -15 VID = -50mV, OUT- = GND -5 -15 mV µA Ω mA POWER SUPPLY 2 Supply Current ICC Output loaded 10 15 mA Supply Current in Fail-Safe ICCF Output loaded, input undriven 6 8 mA _______________________________________________________________________________________ 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package (VCC = 3.0V to 3.6V, RL = 100Ω ±1%, CL = 10pF, |VID| = 0.15V to 1.2V, VCM = |VID / 2| to 2.4V - |VID / 2|, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25°C.) (Notes 3, 4, 5) (Figures 3, 4) PARAMETER SYMBOL Differential Propagation Delay High to Low Differential Propagation Delay Low to High Added Deterministic Jitter Added Random Jitter Differential Part-to-Part Skew Switching Supply Current CONDITIONS MIN TYP MAX UNITS tPHLD 1.3 2.0 2.8 ns tPLHD 1.3 2.0 2.8 ns 23 100 psP-P psRMS tDJ 400Mbps 223- 1 PRBS data pattern (Notes 6, 11) tRJ fIN = 200MHz (Notes 7, 11) 0.6 2.9 tSKPP1 (Note 8) 0.16 0.6 ns tSKPP2 (Note 9) 1.5 ns 12.2 18 mA Rise Time ICCSW tTLH 0.5 0.67 1.0 ns Fall Time tTHL 0.5 0.66 1.0 ns Input Frequency fMAX (Note 10) 200 MHz Note 1: All devices are 100% tested at TA = +25°C. Limits over temperature are guaranteed by design and characterization. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground except VTH, VTL, VOD, and ∆VOD. Note 3: Guaranteed by design and characterization. Note 4: Signal generator output (unless otherwise noted): frequency = 200MHz, 50% duty cycle, RO = 50Ω, tR = 1.5ns, and tF = 1.5ns (0% to 100%). Note 5: CL includes scope probe and test jig capacitance. Note 6: Signal generator output for tDJ: VOD = 150mV, VOS = 1.2V, tDJ includes pulse (duty-cycle) skew. Note 7: Signal generator output for tRJ: VOD = 150mV, VOS = 1.2V. Note 8: tSKPP1 is the magnitude difference of any differential propagation delays between devices operating over rated conditions at the same supply voltage, input common-mode voltage, and ambient temperature. Note 9: tSKPP2 is the magnitude difference of any differential propagation delays between devices operating over rated conditions. Note 10: Device meets VOD DC specification and AC specifications while operating at fMAX. Note 11: Jitter added to the input signal. _______________________________________________________________________________________ 3 MAX9180 AC ELECTRICAL CHARACTERISTICS Typical Operating Characteristics (VCC = 3.3V, RL = 100Ω ±1%, CL = 10pF, |VID| = 0.2V, VCM = 1.2V, TA = +25°C, unless otherwise noted. Signal generator output: frequency = 200MHz, 50% duty cycle, RO = 50Ω, tR = 1.5ns, and tF = 1.5ns (0% to 100%), unless otherwise noted.) SUPPLY CURRENT 9 6 3 12.25 12.00 11.75 11.50 11.25 0 -40 25 50 75 100 125 150 175 200 225 250 MAX9180 toc03 5.06 -15 10 35 60 85 3.0 3.1 3.2 3.3 3.4 3.6 3.5 3.6 SUPPLY VOLTAGE (V) FAIL-SAFE SUPPLY CURRENT VS. SUPPLY VOLTAGE OUTPUT LOW VOLTAGE VS. SUPPLY VOLTAGE OUTPUT HIGH VOLTAGE VS. SUPPLY VOLTAGE 1.10 1.09 1.08 1.07 5.7 1.06 5.5 3.2 3.3 3.4 3.5 3.6 MAX9180 toc06 1.500 1.475 1.450 1.425 1.400 1.375 1.05 3.1 1.525 OUTPUT HIGH VOLTAGE (V) 1.11 OUTPUT LOW VOLTAGE (V) 5.9 1.550 MAX9180 toc05 1.12 MAX9180 toc04 6.1 1.350 3.0 3.1 3.2 3.3 3.4 3.5 3.0 3.6 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) DIFFERENTIAL PROPAGATION DELAY VS. SUPPLY VOLTAGE DIFFERENTIAL PROPAGATION DELAY VS. TEMPERATURE VS. SUPPLY VOLTAGE 1.9 1.8 2.3 2.1 tPHLD 1.9 tPLHD 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) 3.5 3.6 tTHL 725 700 675 tTLH 650 625 600 1.7 575 550 1.5 1.7 750 TRANSITION TIME (ps) tPLHD TRANSITION TIME MAX9180 toc08 tPHLD 2.0 2.5 DIFFERENTIAL PROPAGATION DELAY (ns) MAX9180 toc07 2.1 3.0 3.5 TEMPERATURE (°C) 6.3 4 5.07 INPUT FREQUENCY (MHz) 6.5 3.0 5.08 5.05 11.00 0 5.09 MAX9180 toc09 12 12.50 5.10 OUTPUT SHORT-CIRCUIT CURRENT (mA) 12.75 SUPPLY CURRENT (mA) 15 MAX9180 toc02 18 SUPPLY CURRENT (mA) 13.00 MAX9180 toc01 21 SUPPLY CURRENT (mA) OUTPUT SHORT-CIRCUIT CURRENT VS. SUPPLY VOLTAGE SWITCHING SUPPLY CURRENT VS. TEMPERATURE VS. INPUT FREQUENCY DIFFERENTIAL PROPAGATION DELAY (ns) MAX9180 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package -40 -15 10 35 TEMPERATURE (°C) 60 85 3.0 3.1 3.2 3.3 3.4 SUPPLY VOLTAGE (V) _______________________________________________________________________________________ 3.5 3.6 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package (VCC = 3.3V, RL = 100Ω ±1%, CL = 10pF, |VID| = 0.2V, VCM = 1.2V, TA = +25°C, unless otherwise noted. Signal generator output: frequency = 200MHz, 50% duty cycle, RO = 50Ω, tR = 1.5ns, and tF = 1.5ns (0% to 100%), unless otherwise noted.) DIFFERENTIAL OUTPUT VOLTAGE VS. LOAD RESISTOR TRANSITION TIME VS. TEMPERATURE TRANSITION TIME (ps) 700 650 tTLH, tTHL 600 550 500 450 600 MAX9180 toc11 750 DIFFERENTIAL OUTPUT VOLTAGE (mV) MAX9180 toc10 800 500 400 300 200 100 0 400 -40 -15 10 35 60 85 TEMPERATURE (°C) Pin Description PIN NAME FUNCTION 1 OUT- Inverting LVDS Output 2 GND Ground 3 IN- 4 IN+ Noninverting LVDS Input 5 VCC Power Supply. Bypass VCC to GND with a 0.01µF ceramic capacitor. 6 OUT+ Inverting LVDS Input Noninverting LVDS Output Table 1. Function Table for LVDS Fail-Safe Input (Figure 2) INPUT, VID OUTPUT, VOD >50mV High <-50mV Low 50mV > VID > -50mV Indeterminate Undriven open, short, or terminated High Note: VID = (IN+ - IN-), VOD = (OUT+ - OUT-) High = 450mV ≥ VOD ≥ 250mV Low = -250mV ≥ VOD ≥ -450mV 25 50 75 100 125 150 LOAD RESISTOR (Ω) Detailed Description The LVDS interface standard is a signaling method intended for point-to-point communication over a controlled-impedance medium, as defined by the ANSI/ TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower voltage swing than other common communication standards, achieving higher data rates with reduced power consumption while reducing EMI emissions and system susceptibility to noise. The MAX9180 is a 400Mbps LVDS repeater intended for high-speed, point-to-point, low-power applications. The MAX9180 accepts an LVDS input and reproduces an LVDS signal at the output. This device is capable of detecting differential signals as low as 50mV and as high as 1.2V within a 0 to 2.4V input voltage range. The LVDS standard specifies an input voltage range of 0 to 2.4V referenced to ground. Fail-Safe Fail-safe is a feature that puts the output in a known logic state (differential high) under certain fault conditions. The MAX9180 outputs are differential high when the inputs are undriven and open, terminated, or shorted (Table 1). _______________________________________________________________________________________ 5 MAX9180 Typical Operating Characteristics (continued) MAX9180 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package Applications Information Supply Bypassing Bypass VCC with a high-frequency surface-mount ceramic 0.01µF capacitor as close to the device as possible. Differential Traces Input and output trace characteristics affect the performance of the MAX9180. Use controlled-impedance differential traces. Ensure that noise couples as common mode by running the traces within a differential pair close together. Maintain the distance within a differential pair to avoid discontinuities in differential impedance. Avoid 90° turns and minimize the number of vias to further prevent impedance discontinuities. Cables and Connectors The LVDS standards define signal levels for interconnect with a differential characteristic impedance and termination of 100Ω. Interconnects with a characteristic impedance and termination of 90Ω to 132Ω impedance are allowed, but produce different signal levels (see the Termination section). Use cables and connectors that have matched differential impedance to minimize impedance discontinuities. Avoid the use of unbalanced cables, such as ribbon or coaxial cable. Balanced cables, such as twisted pair, offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables tend to pick up noise as common mode, which is rejected by the LVDS receiver. differential characteristic impedance of the transmission line. For a multidrop bus driven at one end, terminate at the other end of the bus with a resistor that matches the loaded differential characteristic impedance of the bus. For a multidrop bus driven from a point other than the end, terminate each end of the bus with a resistor that matches the loaded differential characteristic impedance of the bus. When terminating at both ends, or for a large number of drops, a BLVDS driver is needed to drive the bus to LVDS signal levels. The MAX9180 is not intended to drive double-terminated multidrop buses to LVDS levels. The differential output voltage level depends upon the differential characteristic impedance of the interconnect and the value of the termination resistance. The MAX9180 is guaranteed to produce LVDS output levels into 100Ω. With the typical 3.6mA output current, the MAX9180 produces an output voltage of 360mV when driving a 100Ω transmission line terminated with a 100Ω termination resistor (3.6mA x 100Ω = 360mV). For typical output levels with different loads, see the Differential Output Voltage vs. Load Resistor curve in the Typical Operating Characteristics. Chip Information TRANSISTOR COUNT: 401 PROCESS: CMOS Termination For point-to-point links, the termination resistor should be located at the LVDS receiver input and match the 6 _______________________________________________________________________________________ 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package VCC OUT+ CL RIN2 IN+ PULSE GENERATOR 50Ω VCC - 0.3V IN+ RL IN- 50Ω OUT+ OUTCL OUT- RIN1/2 Figure 3. Transition Time and Propagation Delay Test Circuit RIN1/2 IN- Figure 1. LVDS Fail-Safe Input OUT+ 1.25V 1.20V 1.25V 1.20V RL/2 IN+ IN- VOD VOS RL/2 OUT- Figure 2. DC Load Test Circuit _______________________________________________________________________________________ 7 MAX9180 Test Circuit and Timing Diagrams 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package MAX9180 Test Circuit and Timing Diagrams (continued) VCM = ((IN+) + (IN-))/2 IN- VID OV (DIFFERENTIAL) OV (DIFFERENTIAL) IN+ tPHLD tPLHD OUTOV (DIFFERENTIAL) OV (DIFFERENTIAL) OUT+ 80% 80% OV (DIFFERENTIAL) 20% OV (DIFFERENTIAL) 20% VDIFF = (OUT+) - (OUT-) VDIFF tTLH tTHL Figure 4. Transition Time and Propagation Delay Timing Diagram Typical Operating Circuit 1/4 1/4 1/4 MAX9129 MAX9121 MAX9121 100Ω 100Ω MAX9180 MAX9180 STUB WITHOUT REPEATER STUB WITH REPEATER REPEATERS REDUCE ASIC OR FPGA STUB LENGTH ON A MULTIDROP BUS. 8 _______________________________________________________________________________________ 400Mbps, Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package SC70, 6L.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX9180 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)