ETC RTC6701

RTC6701
Preliminary
Data Sheet
DEC 2005
Rev.
Date
From
Description
V.002
V.003
10/3/2005
10/31/2005
R2200
R2200
Original
Modify the following items:
1. Add pin 17 PD_REG1D8 description; 1 for power down and 0 for
power on
2. Add Absolute Maximum Ratings
V.004
V.004
12/1/2005
12/2/2005
R2200
R2100
1.Add “SPI Digital Timing Diagram” and revised date code.
2.Update output power data.
3.Removed RX IF input in Absolute Maximum Ratings.
4.Add mini. Audio SNR.
R2200
Applicant:
R2200
Document Title:
Data Sheet
of
RTC6701
Approvals:
R2000: S.C. Wong
R2500: C.J. Chao
R2100: J.Y. Tsai
Marketing: Jack Chang Contents: 8
Attach: 0
Total Page: 9
File Format: Word
R2200: W.K. Deng
R2300: T.S. Liou
Document No.: RTC6701-DST-004
☆ Signature on file in DC ☆
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Specifications subject to change without notice
Rev V.004
Preliminary Confidential Proprietary
1
RTC6701
Preliminary
Data Sheet
DEC 2005
RTC6701 CMOS 2.4GHz FM/FSK Transmitter
Product Description
The RTC6701 is a FM/FSK transmitter intended for application on 2.4GHz ISM band analog FM
or digital FSK transmission. The chip includes a RF modulator, two channels of audio modulator
and a power amplifier with up to +11.5dBm power output. The RF modulator block, which is
frequency-synthesizer based with an integrated 2.4GHz VCO, generates the 2.4GHz FM signal
modulated from stereo audio L(left)/R(left) signals. On-chip two audio modulators with stereo
audio input signals provide the FM audio modulated signal at 6 MHz and 6.5MHz, respectively.
Monaural application is also possible by turning off one of two audio modulators.
Transmission frequency can be set by internal register via SPI programming, or by selecting
among 4 fixed channels using three dedicated pins. Output power of +1.5dBm or +11.5dBm can
be configured via pins 28 and 29 to fit CE/FCC requirement easily. The device is available in a
32-pin QFN package.
Features
3.3V power supply
2.4GHz ISM band FM modulator
FM/FSK transmitter operation
Simple three digital pins setting 4 fixed channels to eliminate external micro-controller
Output Power +1.5dBm or +11.5dBm, selected by pin connection
FM sound carriers at 6 and 6.5MHz
CMOS technology
On-chip VCO and PLL
Transmitter frequency programmability by SPI
32-pin leadless QFN package
Application
AV Sender
FSK transmitter
Baby Monitor
Wireless Camera
Wireless Audio
Wireless Earphone
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Specifications subject to change without notice
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Preliminary Confidential Proprietary
2
RTC6701
Preliminary
Data Sheet
DEC 2005
24
SPIDATA/CS2
23
SPILE/CS1
22
SPICLK/CS0
21
VDD33
20
XTAL2
19
XTAL1
18
PD_REG1D8
17
BX
25
PAOUT2
28
SYNVSS
PAOUT1
29
26
RFGND1
30
RFGND2
PAVDD
31
27
NC
1
VCOVDD
32
Block Diagram
REG1D8
PA2
PA1
R Counter
GND
N/A Counter
3
VT
2
RF VCO
AVT2
4
CP
5
Charge
Pump
PFD
SPI/
REGISTER_CONT
ACP2
6
AOUT2
7
Audio2_Syn
REGULATOR
(3.3V to 1.8V)
Audio1_syn
BC
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Specifications subject to change without notice
Rev V.004
15
16
BCR
14
VDD
SPI_SE
13
AVDD1
12
ACP1
11
AVT1
10
NC
AOUT1
9
8
AVDD2
Preliminary Confidential Proprietary
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RTC6701
Preliminary
Data Sheet
DEC 2005
Pin Descriptions
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
NAME
VCOVDD
VT
GND
CP
AVT2
ACP2
AOUT2
AVDD2
AOUT1
NC
AVT1
ACP1
AVDD1
VDD
SPI_SE
BCR
REG1D8
I/O
Supply In
Analog In
Analog GND
Analog Out
Analog In
Analog Out
Analog Out
Supply In
Analog Out
NC
Analog In
Analog Out
Supply In
Supply In
Digital In
Analog I/O
Analog Out
18
PD_REG1D8
Digital In
19
20
21
XTAL1
XTAL2
VDD33
CS0
SPICLK
CS1
SPILE
CS2
SPIDATA
BX
SYNVSS
RFGND2
PAOUT2
PAOUT1
RFGND1
PAVDD
NC
Analog I/O
Analog I/O
Supply In
Digital In
Digital In
Digital In
Digital In
Digital In
Digital In
Digital In
Digital GND
Analog GND
Analog Out
Analog Out
Analog GND
Supply In
NC
22
23
24
25
26
27
28
29
30
31
32
FUNCTION
VDD for VCO1
Vtune for VCO
Analog GND
Synthesizer charge pump output
Vtune for audio 2 PLL
Charge pump for audio 2
FM modulated audio 2 output
3.3V power supply for audio 2 modulator
FM modulated audio 1 output
NC
Vtune for audio1 PLL
Charge pump for audio 1
3.3V power supply for audio 1 modulator
3.3V Digital DC power supply
Switch mode or SPI selection (Internal pull high)
Reference current by connecting 10k resistor
Regulator OUT 1.8V regulator output
Power down for 1.8V regulator
1: Power Down; 0: Power On
Crystal connection
Crystal connection
3.3V DC power supply for digital circuits
Easy channel selection2 (Internal pull high)
SPI bus clock input
Easy Channel selection2(Internal pull high)
SPI bus latch enable input
Easy Channel selection2 (Internal pull high)
SPI bus data input
Alternative band selection2 (Internal pull high)
Digital GND for synthesizer
RF GND
Connect with PAOUT1 for +12dBm output
PA output for 0dBm
RF GND
3.3V VDD for PA ESD
NC
Note 1. Connect to 3.3V supply through a resistor. Nominal voltage at this pin=2.5V.
Note 2. Digital pins (15, 22, 23, 24, 25) with internal pull-high circuits can be left floating for logical high.
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Specifications subject to change without notice
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Preliminary Confidential Proprietary
4
RTC6701
Preliminary
Data Sheet
DEC 2005
ELECTRICAL SPECIFICATIONS
(1) Absolute Maximum Ratings
SYMBOL
Tstr
Totr
Vdd
Vlog
PARAMETER
Storage Temperature Range
Operating Temperature Range
Supply Voltage
Logic control signal
Ratings
UNIT
-65 to +150
-40 to +85
°C
°C
V
V
-0.5 to +5
-0.5 to +5
The maximum rating must not be exceeded at any time. Do not operate the device under conditions outside the above
ratings.
(2) DC Electrical Characteristics
SYMBOL
Tj
VDD
PARAMETER
CONDITION
MIN.
TYP.
MAX.
UNIT
-
-40
3.1
25
3.3
85
3.5
°C
V
mA
Temperature Range
TT 25C, 3.3V
49
I_module
Supply Voltage
Power consumption for chip
(+12dBm output)
Power consumption for module
TT 25C, 3.3V
54
I_pd
Power down current leakage
TT 25C, 3.3V
1
I_RF
Fref
V_IH
V_IL
Oscillator operating frequency
High Level Input Voltage for Digital
Interface
Low Level Input Voltage for Digital
Interface
mA
10
8
V_IO=3V
0.7xV_IO
V_IO+0.3
-0.3
0.3xV_IO
uA
MHz
V
V
(3) Transmitter Specifications
SYMBOL
Fc
Pout_H*
Pout_L*
2ndH_H*
PN
PARAMETER
Frequency Range
Maximum output power at high
power mode
Maximum output power at low
power mode
nd
The 2 Harmonic referenced
with the fundamental signal at
high power mode
The phase noise at 2414GHz
CONDITION
MIN.
TYP.
2.37
Connect PAOUT1
and PAOUT2
Connect PAOUT1
only
MAX.
UNIT
2.51
GHz
10.5
11.5
12.5
dBm
0.5
1.5
2.5
dBm
With reference
filter design
-30
dBc
100KHz offset
1MHz offset
-85
-110
dBc/Hz
With reference
filter design
-40
dBc
With reference
filter design
-30
dBc
With reference
filter design
-40
dBc
rd
3rdH_H*
2ndH_L*
3rdH_L*
The 3 Harmonic referenced
with the fundamental signal at
high power mode
nd
The 2 Harmonic referenced
with the fundamental signal at
low power mode
rd
The 3 Harmonic referenced
with the fundamental signal at
low power mode
* All with proper match at the PA output, before further ceramic filtering.
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Specifications subject to change without notice
Rev V.004
Preliminary Confidential Proprietary
5
RTC6701
Preliminary
Data Sheet
DEC 2005
(3) Transmitter Specifications (continued)
SYMBOL
Video
Zin_video
Vin_video
Audio
VTAA
fau
Vin_audio
THD
F_corner
SNR_A
PARAMETER
Video input impedance (as
reference design)
Video peak to peak input voltage
(as reference design)
Video carrier to audio carrier
ratio (as reference design)
Audio carrier frequency
Audio peak to peak voltage at
audio Vtune pin
Total harmonic distortion
measurement by RTC6711
receiver
3dB corner frequency of
pre-emphasis (as reference
design)
Audio SNR (as reference
design,) With pre-emphasis/
de-emphasis,
CONDITION
MIN.
75 ohm load
No video and audio
signal in
Left sound
Right sound
@1KHz tone input
with ±25KHz
frequency deviation
@1KHz tone input
with ±25KHz
frequency deviation
@1KHz tone input
with ±25KHz
frequency deviation
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Specifications subject to change without notice
Rev V.004
24
TYP.
UNIT
75
Ω
1
Vpp
27
30
dBc
6
6.5
MHz
30
mVpp
0.6
45
MAX.
0.9
%
4
kHz
47
dB
Preliminary Confidential Proprietary
6
RTC6701
Preliminary
Data Sheet
DEC 2005
(4) SPI Digital Timing Diagram
1st data
2nd data
Control Bit Invalid Data
DATA
LSB
MSB
CLK
t1
t2
t3
t6
t7
LE
t4
t5
P a ra me t er
M in.
Ty p.
M a x.
Un it
t1
20
-
-
ns
t2
20
-
-
ns
t3
30
-
-
ns
t4
30
-
-
ns
t5
100
-
-
ns
t6
20
-
-
ns
t7
100
-
-
ns
Note:
1.) On the rising edge of the clock, one bit of data is transferred into the shirt register.
2.) LE should be *L* when the data is transferred into the shirt register.
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Specifications subject to change without notice
Rev V.004
Preliminary Confidential Proprietary
7
RTC6701
Preliminary
Data Sheet
DEC 2005
Channel Selection
There are two principle modes for channel selection.
SPI_SE (Pin 7)
High
Low
Mode
SPI Mode
Easy Channel Selection Mode
(1) Easy channel selection mode
When pin 15 (SPI_SE) is set at low (0V), the chip operates in easy channel selection mode.
Operation frequency can be selected by the pins 25(BX), 24(CS2), 23(CS1) and 22(CS0). The
selected channel frequencies are listed in the table below.
BX=0
Pin25 (BX) is pulled to low for normal ISM band, and operation frequency table show as
following Table.
BX
SPI_SE
011
0
0
2414MHz
Pin22/Pin23/Pin24
CS0/CS1/CS2
101
110
111
2432MHz 2450MHz 2468MHz
BX=1
Reserved for alternative band selection
(2) SPI mode
When pin 15 (SPI_SE) is set at high (3.3V), the chip works as in the SPI mode and the pins
24(SPIDATA), 23(SPILE) and 22(SPICLK) are used for ‘SPI’ inputs for 3-wire programming
interface. The BX is “don’t care”.
SPI REGISTER DEFINITION
Address 00: Synthesizer Register A
Bits
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Name
Syn_RF_R_Reg
Syn_RF_A_Reg
address
R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 A6 A5 A4 A3 A2 A1 A0
PIN
Default 0
0
0
0
0
0
1
1
0
0
1
0
0
0
0
0
1
1
1
1
0
0
0
0
Syn_RF_R_Reg : R counter divider ratio control register [14:0]
Syn_RF_A_Reg : A counter divider ratio control register [6:0]
R14=MSB, R0=LSB
For integer N Synthesizer, the RF LO frequency is calculated by (N*64+A)*fref/R, where fref is the frequency of
external reference oscillator (8 MHz). Ex for channel 1 operation (f = 2414MHz)
Default: R=400; N=1885; A=60
2414MHz=(1885*64+60)*8MHz/400
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Specifications subject to change without notice
Rev V.004
Preliminary Confidential Proprietary
8
RTC6701
Preliminary
Data Sheet
DEC 2005
Address 01: Synthesizer Register B
Bits
23
22
21
20
19
Name
18
17
16
15
14
13
12
11
10
Syn_RF_N_Reg
9
8
7
CP_RF
N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0
PIN
Default 0
0
1
1
1
0
1
0
1
1
1
0
1
0
0
6
5
SC
_trl
1
4
3
Not used
2
1
0
address
0
X
X
X
X
X
0
1
Syn_RF_N_Reg : N counter divider ratio control register [12:0] (default R ratio=400)
CP_RF [2:0] RF charge pump current control (from 50uA to 6mA, default=100uA)
SC_ctrl: external/internal SC_select control pin (LOW=internal). If set “1” in RTC67 series then charge pump will
enter the testing mode ----Only for internal testing
Address 10: Synthesizer Register C
Bits
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
PA_Bias address
Name
Not Used
Not Used
Mout
PRE_control
Not used
PIN
8
7
6
5
4
3
2
1
0
1
0
2
1
0
1
0
Default X X X X X X X X X X X X 0
0
1
0
1 X X X 1
0
1
0
Mout
: Multi-function output select
(00,01,11,10)=(gnd, lock in detect ,RF divider output, reference clk output)
PRE_control[2:0]: prescalar current control (20~140uA)
PA_Bias[1:0]: PA bias resistor selection
Address 11: Synthesizer Register D
Bits
23
22
21
20
Name
19
18
17
16
15
14
13
Not Used
X
X
X
X
X
X
X
11
10
9
8
PA_
VCOSC PD
PIN
Default
12
X
X
X
X
1
1
0
0
0
7
6
5
Audio_div
7
0
6
1
5
0
4
0
4
3
2
1
0
Not
use ACP address
d
3
2
1
0
1
0
0
0
1
1
VCOSC[1:0]: 2-bit RF VCO switch capacitor control in RTC6701
PA_PD 1: PA power down control, 0 for power on and 1 for power down
Audio_div[5:0]: Reference clock division ratio in audio carrier frequency synthesizer.
ACP[1:0]: Audio charge pump current control (default 00:20uA, 01:50uA, 10: 110uA, 11: 140uA)
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Specifications subject to change without notice
Rev V.004
Preliminary Confidential Proprietary
9
RTC6701
Preliminary
Data Sheet
DEC 2005
PACKAGE
QFN 5X5 32 pins
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Specifications subject to change without notice
Rev V.004
Preliminary Confidential Proprietary
10