WEDC ENH050Q1-XXX

White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
ENH050Q1-320/450/600 Color TFT-LCD Module Features
GENERAL DESCRIPTION
Panelview provides optically enhanced solutions to the
standard Sharp LQ5AW136 color active matrix LCD
module. The first enhancement is an index matching
(IM) film lamination to the front surface of the display
polarizer.
The IM film is available in two surface treatments - IM/Clear
and IM/110 (a 10% diffusion).The second enhancement is
the incorporation of a reflective polarizer (RP) to improve
brightness by up to 40%. The third enhancement is
the addition of prism films (RPp) further increasing the
brightness of the display. The module accepts full color
video signals conforming to the NTSC(M) and PAL(G-B)
system standards.
It can withstand an intense environment, the online
dimension is suitable for an automotive display, compact
size, compatible with 2DIN size.
Panelview assumes no responsibility for any damage
resulting from the use of the device which does not
comply with the instructions and the precautions specified
in these specification sheets. Panelview does assume the
responsibility for the warranty of the enhanced product.
FEATURES
Slim, lightweight and compact
1.
Active area/Outline area=70%
2.
Thickness: 16.5mm
3.
Mass: 185g (Max)
Built-in video interface circuit and control circuit
responsive to two sets of standard RGB analog
video signals.
Reduced refleciton as a resuld of low reflectance
Black-Matrix and Index Matching (IM) film
lamination. IM is available in two surface
treatments, IM/Clear (glossy) and IM/110 (10%
diffusion).
It is possible to use both the simultaneous and the
independent time sampling.
An external clock mode is available.
Optical viewing angle: wide view angle (6 o'clock
direction.) (Customer can use this module as a 12
o'clock viewing direction type by using a display
rotating function to rotate right/left and up/down
scanning direction electrically.)
This module includes a high luminance edge light
that is excellent at low temperature.
It is possible to use the dimming frequency (PWM)
for backlight.
Dual mode type. [NTSC(M) and PAL(B-G)
standards]
MBK-PAL enables the 234-scanning lines panel to
display a picture with virtually 273-scanning lines.
CONSTRUCTION AND OUTLINE
Outline dimensions of TFT-LCD module: See Fig. 3
TFT-active matrix-LCD drive system with high
contrast.
74,800 pixels (RBG Stripe configurations and full
color) 5" diagonal size.
The module consists of a TFT-LCD panel, driver
IC's control PWB mounted with electronic circuits,
edge light, frame, front and rear shielding cases.
(Backlight driving DC/AC inverter is not built in the
module.)
MECHANICAL SPECIFICATIONS
Parameter
Display Format
Active Area
Screen Size (Diagonal)
Dot Pitch
Dot Configuration
Outline Dimension (1)
Mass
Specifications
74,800
960 (W) x RGB x 234 (H)
102.2 (W) x 74.8 (H)
13 (5")
0.1065 (W) x 0.3195 (H)
RGB Stripe configuration
126.8 (W) x 89.6 (H) x 16.5 (D)
185 (Max)
Units
pixels
dots
mm
cm
mm
mm
g
Note: This measurement is typical, and see Fig. 3 for details.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
1
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
INPUT TERMINALS AND THEIR DESCRIPTIONS
TTL-LCD Panel Driving Section
(Hi means digital input voltage, Lo means GND.)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
Symbol
HSY
VSY
PWM
NTP
HRV
VRV
VSW
SAM
VCDC
VSH
VBS
BRT
VR1
I/O
I, O
I, O
O
I
I
I
I
I
I
I
I
I
I
14
VG1
I
Color video signal (Green) 1
15
VB1
I
Color video signal (Blue) 1
16
17
VSL
VR2
I
I
Negative power supply voltage
Color video signal (Red) 2
18
VG2
I
Color video signal (Green) 2
19
VB2
I
20
21
22
GND
CKC
CK
I
I
I, O
Description
Input/Output horizontal sync. signal (low active)
Input/Output vertical sync. signal (low active)
Terminal for output PWM of dimming back light
Terminal for display mode change of NTSC and PAL
Turning the direction of horizontal scanning
Turning the direction of vertical scanning
Selection signal of two sets of video signals
Terminal for sampling mode change
DC bias voltage adjusting terminal of common electrode driving signal
Positive power supply voltage
Composite video signal of sync. seperator
Brightness adjusting terminal
Color video signal (Red) 1
Remarks
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
Positive
(On when VSW=Hi.)
Positive
(On when VSW=Lo.)
Color video signal (Blue) 2
Ground
Change the input/output direction of CK, HSY and VSY.
Input/Output clock signal
(12)
(13)
Note:
1.
If CKC='Hi', this terminal outputs horizontal sync. signal in phase with VBS.
If CKC='Lo', this terminal will be external horizontal sync. input terminal.
2.
If CKC='Hi', this terminal outputs vertical sync. signal in phase with VBS.
If CKC='Lo', this terminal will be external vertical sync. input terminal.
3.
PWM signal is used for the PWM dimming frequency and it is easy to get PWM signal dimming by combining both HSY and PWM signals. But use this PWM signal in case of
input standard NTSC or PAL signal.
4.
This terminal is to switch the display mode, and it is NTSC mode when NTP is 'High' and is PAL mode when NTP is 'Low'.
5.
When this terminal is 'High', it will be normal and when it is 'Low', it will display reversely on the horizontal direction.
6.
When this terminal is 'High', it will be normal and when it is 'Low', it will display reversely on the vertical direction.
7.
This terminal is to switch input for groups of RGB color video signals, and Input 1 (No. 13 to 15) is selected when VSW is 'High' and Input 2 (No. 17 to 19) is selected when VSW
is 'Low'.
8.
This terminal switches to sampling mode. It is the independent data-sampling timing at RGB dot when SAM is 'High' and it is the simultaneous data-sampling timing at RGB dots
when SAM is 'Low'.
9.
This terminal is applicable to the DC bias voltage adjusting terminal of the common electrode driving signal. If power supply voltage is typical, it is not necessary to re-adjust it.
So, Use it in the open condition. However, in the case that the power supply voltage is changed, or power supply voltage is reduced, adjust it externally to get the best contrast
with a resistor that is added to this terminal, or semi-fixed resistor, VCDC in module. A recommended circuit is shown in Fig. 5.
10.
The sync. signal which will be input, is negative polarity and is applicable to standard composite sync. signal, negative one in the same pulse level.
11. DC voltage supplied to this terminal, makes the brightness of the screen adjustable, which is the black level of the video signal. Although this is adjusted in the time of delivery to
get the best display in the condition of the open terminal, it is also able to be re-adjusted externally with a resistor that can be added to this terminal, or a semi-fixed resistor, BRT,
in module. A recommended circuit is shown in Fig. 5.
12. CKC-'Hi', CK.HSY.VSY terminals are output mode. CKC='Lo': CK. HSY. VSY terminals are input mode.
13. If CKC='Hi', this terminal outputs the clock for sure drivers. If CKC='Lo', this terminal will be the external clock input terminal.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
2
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
FUNCTIONAL MACHINE AND INPUT/OUTPUT MODE
CKC="Hi"
Terminal
HSY
VSY
CK
SAM="Hi"
Output
Output
Output "Dot Clock"
CKC="Lo"
SAM="Lo"
Output
Output
Output "Pixel Clock"
SAM="Hi"
Input
Input
Input "Dot Clock"
SAM="Lo"
Input
Input
Input "Pixel Clock"
BACKLIGHT DRIVING SECTION
Terminal
CN1
No.
1
2
3
Symbol
VL1
NC
VL2
I/O
I
I
Function
Input terminal (Hi voltage side) [14]
Non connection
Input terminal (low voltage side)
Note:
14. Low Voltage side of DC/AC inverter for backlight driving connects with Ground of inverter circuit.
ABSOLUTE MAXIMUM RATINGS
GND = OV, tA = 25°C
Parameter
Positive power supply voltage
Negative power supply voltage
Analog input signals (1)
Digital input/output signals (2)
DC bias voltage of common electrode driving signal
Brightness adjusting terminal
Storage temperature (3)
Operating temperature (3, 4)
surface of panel
environment
Symbol
VSH
VSL
VI
VI
VCDC
VBRT
tSTG
Top1
Top2
MIN
-0.3
-6.0
-0.3
VSL
0
-30
-30
-30
MAX
+9.0
+0.3
2.0
+5.4
VSH
+5.1
85
85
60
Unit
V
V
Vp-p
V
V
V
°C
°C
°C
Notes:
1.
VBS, VR1, VG2, VB1, VR2, VG2, VB2 terminals (Video signal)
2.
NTP, HRV, VRV, SAM, VSW, HSY, VSY, CKC, CK terminals
3.
The temperature of all parts in module should not exceed this rating. Maximum wet-bulb temperature should be less than 58°C. No dew condensation.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
3
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
ELECTRICAL CHARACTERISTICS
RECOMMENDED OPERATING CONDITIONS
TFT-LCD PANEL DRIVING SECTION
GND=0V, tA=25°C
Parameter
Positive power supply voltage
Negative power supply voltage
Analog input voltage
Amplitude
Digital Input voltage
Digital output voltage
Output clock
Input horizontal sync.
component
DC component
High level
Low level
Histeresis
High level
Low level
Duty cycle
Drive capability
freq.
pulse
width
Input vertical sync.
component
Input clock
Input HSY
(Horizontal sync.)
Input VSY
(Vertical sync.)
Data set up time
Data hold time
Data set up time
Data hold time
NTSC
PAL
NTSC
PAL
rise time
fall time
freq.
NTSC
PAL
pulse
NTSC
width
PAL
rise time
fall time
frequency
High width
Low width
rise time
fall time
frequency
pulse width
rise time
fall time
frequency
pulse width
rise time
fall time
Symbol
VSH
MIN
+7.8
TYP
+8.0
MAX
+8.2
Unit
V
VSL
VBS
VI
VIDC
VIH
VIL
VH
VOH
VOL
Duty
IOH
IOL
fH (N)
fH (P)
tHI (N)
tHI (P)
trHI1
tfHI1
fV (N)
fV (P)
tVI (N)
tVI (P)
trVI1
tfVI1
fCLI
fCLI
tWH
tWL
trCLI
tfCLI
fHI
fHI
-5.2
0.7
-1.0
-3.7
0
0.4
+4.0
0
45/55
-0.28
15.13
15.03
4.2
4.2
fH/284
fH/344
18.2
6.0
20.0
20.0
fCLI/1230
fCLI/465
-5.0
1.0
0.7
0
50/50
15.73
15.63
4.7
4.7
fH/262
fH/312
3H
2.5H
18.9
6.8
fCLI/1200
fCLI/435
-4.8
2.0
-1.0
+5.1
+1.0
+5.5
+1.0
55/45
0.25
16.33
16.23
5.2
5.2
0.5
0.5
fH/258
fH/304
0.5
0.5
19.6
7.6
5.0
5.0
fCLI/1170
fCLI/405
V
Vp-p
Vp-p
V
V
V
V
V
V
mA
mA
kHz
kHz
µs
µs
µs
µs
Hz
Hz
µs
µs
µs
µs
MHz
MHz
ns
ns
ns
ns
Hz
Hz
tHI
trHI1
tfHI1
fVI
tVI (P)
trVI1
tfVI2
tSU1
tHO1
tSU2
tHO2
1.0
50
1H
25
25
1.0
1.0
4.7
fHI/262
3H
-
8.4
0.05
0.05
fHI/258
5H
0.5
0.5
-
µs
µs
µs
Hz
µs
µs
µs
ns
ns
µs
µs
Remarks
(1)
Input resistor is
over 10kΩ.
(2)
(3)
Input resistor is over 10kΩ. (4)
Load resister is over 60kΩ. (5)
CKC=High (6)
(7)
VOH=2.6V
VOL=2.3V
CKC=High
(8)
for VBS terminal
CKC=High, H=1/fH
(9)
for VBS terminal
SAM=High
SAM=Low
CKC=Low
(10)
for CK terminal
SAM=High
SAM=Low
CKC=Low
(11)
for CK terminal
(12)
CKC=Low
for VSY terminal
(13)
CKC=Low
(14)
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
4
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
TFT-LCD PANEL DRIVING SECTION
Parameter
DC bias voltage for common electrode driving signal
Terminal voltage applicable to brightness
Symbol
VCDC
VBRT
MIN
0
+2.0
Notes:
1.
Power supply voltage should not be changed after adjusting VCDC.
2.
VR1, VG1, VB1, VR2, VG2, VB2 terminal (Video signal)
3.
VBS, VR1, VG1, VB1, VR2, VG2, VB2 terminals
4.
HSY, VSY, NTP, VSW, HRV, VRV, SAM CKC, CK terminal
5.
HSY, VSY, CK terminals (output mode)
6.
CK terminals (output mode)
7.
Duty cycle is defined as follows.
TYP
+2.0
+2.3
8.
9.
10.
11.
12.
13.
14.
15.
Duty=tOL/tOH
tOH
tOL
MAX
+3.0
+2.4
Unit
V
V
Remark
DC component (15)
VBS (horizontal sync. component)
VBS (vertical sync. component)
CK (input mode)
HSY (input mode)
VSY (input mode)
In case of cKC='Lo', it shows the phase different from HSY to CK. In that case,
HSY will be taken at the rise timing of CK.
In case of CKC='Lo'. it shows the phase difference from VSY to HSY. In that
case, VSY will be taken at the rise timing of HSY.
Adjsuting the optimal voltage on every module at the typical value of power
supply voltage to get the maximum value of contrast. However, in the case that
the power supply voltage is changed, for example the level of power supply
voltage is reduced, adjust it externally to get the best contrast with a resistor you
add to this terminal, or semifixed resistor, VCDC, in module. A recommended circuit
is shown in Fig. 5.
BACKLIGHT DRIVING SECTION
Parameter
Lamp Voltage
Lamp current
Lamp frequency
Kickoff voltage
Symbol
VL7
IL
fL
VS
MIN
550
3.0
20
-
TYP
610
6.5
-
MAX
670
7.0
70
1450
1500
Unit
Vrms
mArms
KHz
Vrms
Vrms
Remark
IL=6.5mArms
normal operation
tA = +25°C
tA = -30°C
POWER COMSUMPTION
tA = 25°C
Parameter
Positive supply current
Negative supply current
Total
Lamp power consumption
16.
17.
Symbol
ISH
ISL
WS
WL
Conditions
VSH = +8.0V
VSL = -5.0V
normal driving
MIN
-
TYP
140
55
1.4
4.0
MAX
170
70
1.7
-
Unit
mA
mA
W
W
Remark
(16)
(17)
Excluding backlight section
Reference data by calculation (IL x VL x 1: number of lump)
Circuit Diagram
Input/Output Signal Waveforms (Fig. 6)
The circuit block diagram of TFT-LCD module is shown
in Fig. 4.
Caution: For the VBS signal, input standard composite
video (or sync.) signal applicable to the operating mode
which have NTSC (M) or PAL (B-G) and is selected by
the NTP signal.
BRT, VCDC, external adjusting recommended circuit is
shown in Fig. 5.
Caution: Turn the power supply on or off (VSH and VSL)
at the same time. Be careful to supply all power voltage
before inputting signals.
Dimming Backlight by PWM Timing Chart
If using PWM mode, refer to the timing chart shown in
Fig. 7.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
5
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
INPUT/OUTPUT SIGNAL TIMING CHART (FIG. 6)
(CKC=HIGH, NTSC: fH=15.7kHz, fV=60Hz/PAL: fH=15.6kHZ, fV=50Hz)
Parameter
Horizontal
sync. output
pulse
[HSY]
Symbol
tHS2
tPD
trHO
tfHO
tVS
tvHO
trVO
tfVO
tpV1
tpV2
fCLO
Min.
3.2
0.4
-
Typ.
3.9
1.1
4H
11.0
1H
0.5H
fH x 1201
2
Max.
4.6
1.8
0.5
0.5
28.0
2.0
2.0
-
Unit
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
MHz
PAL MODE
fCLO
-
fH x 1209
2
-
MHz
(22)
NTSC MODE
fCLO
-
fH x 1201
6
-
MHz
SAMC="Lo"
PAL MODE
fCLO
-
fH x 1209
6
-
MHz
(23)
pulse width
phase difference
rise time
fall time
pulse width
phase difference
rise time
fall time
odd field
even field
NTSC MODE
Vertical
sync. output
pulse
[VSY]
Vertical
phase difference
Clock
output frequency
[CK]
Reward
f=fH (18)
(19)
CL=10pF
1H=1/fH
(20)
CL=10pF
1H=1/fH
(21)
SAMC="Hi"
(Supply voltage conditions: VSH = +8.0V, VSL = 5.0V)
Notes:
18. Adjusted by variable resister (H-POS) in a module.
19. Variable by variable resister (H-POS) in a module.
adjustment : tpd = 1, 1 ± 0.7 µs
20. Synchronized with HSY, based on falling timing of HSY.
21. VSY signal delays
22. Independent sampling mode.
23. Simultaneous sampling mode.
Display Time Range
However, the video signals of
NTSC (M) mode (NTP=High, CKC=High)
Displaying the following range within video signals.
• Horizontally: 12.2 ~ 63 µs
12.3 ~ 62.9 µs
• Vertically: 20 ~ 253 H
(14n+17)H, (14n+23) H/Odd field (n=1, 2..., 20)
from the falling edge
of HSY. (SAM=High)
are not displayed on the module.
from the falling edge
of HSY. (SAM-Low)
• Horizontally: 205 ~ 1164 ck
from the falling edge
of VSY.
PAL(B-G) Mode (NTP-Low, CKC=High)
Displaying the following range within video signals.
• Horizontally: 13.0 ~ 63.8 µs
from the falling edge
of HSY. (SAM=High)
13.1 ~ 63.7 µs
from the falling edge
of HSY. (SAM-Low)
• Vertically: 26 ~ 298 H
(14n+12)H, (14n+20) H/Even field.
External Clock Mode (NTP=High, CKC='Lo')
84 ~ 403 ck
from the falling edge
of HSY. (SAM=High)
from the falling edge
of HSY. (SAM-Low)
(ck means input external clock.)
• Vertically: 20 ~ 253 H
from the falling edge
from the falling edge
of VSY.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
6
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
OPTICAL CHARACTERISTICS
tA=25°C
Parameter
Viewing Angle Range
Contrast Ratio
Response Time
Rise
Fall
Luminance
White Chromaticity
Lamp Life Time
+25’C
-30’C
Symbol
∆θ11
∆θ12
∆θ2
CRmax
tr
td
Y
x
y
-
Condition
CR>5
Optimal
θ = 0°
IL=6.5mArms
IL=6.5mtVms
IL=6.5mArms
Continuation
Intermission
Min
60
35
60
60
240
0.263
0.279
10,000
2,000
Typ
65
40
65
30
50
320
0.313
0.329
-
Max
60
100
0.363
0.379
-
Unit
° (degree)
° (degree)
° (degree)
ms
ms
cd/m2
hour
time
Remarks
(1,2)
(2,3)
(2,4)
(5)
(6)
(7)
DC/AC inverter for external connection shown in following. Harison Electric Co., Ltd, HIU-288.
Notes:
1.
Viewing angle range is defined as follows.
Fig. 1: Definition of Viewing Angle
Normal line
∆θ2
∆θ2
∆ θ 12
∆ θ 11
6 o'clock direction
2.
3.
Applied voltage conditions:
a.
VCDC is adjusted so as to attain maximum contrast ratio.
b.
Brightness adjusting voltage (BRT) is open.
c.
Input video signal of standard black level and 100% white level.
Contrast ratio is defined as follows:
Contrast ratio (CR)=
Photodetector output with LCD being "white"
Photodetector output with LCD being "black"
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
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Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
4.
ENH050Q1-320/450/600
Response time is obtained by measuring the transition time of photodetector output, when input signals are applied so as to make the area
"black" from "white" and "white" from "black".
black
Photodetector output
(Relative Value)
white
white
100%
90%
10%
0%
td
tr
time
5.
6.
7.
Measured on th ecenter area of the panel at a viewing cone 1° by TOPCON luminance meter BM-7. (After 30 minutes operation) DC/AC inverter driving frequency : 49kHz
Lamp life time is defined as the time when either "a" or "b" occurs in the continuous operation under the condition of lamp current IL=3~7.
0mArms and PWM dimming 100%~5%. (tA=25°C)
a.
Brightness becomes 50% of the original value.
b.
Kick off voltage at tA=30°C exceeds maximum value, 1500Vrms.
The intermittent cycle is defined as a time when brightness becomes 50% of the original value under the condition of following cycle.
Ambient temperature: -30°C
HIGH (6.5mArms)
OFF
5 min. 5 min. 5 min. 5 min.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
8
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
Rev. 0
White
Electronic Designs
Display Systems Division
ENH050Q1-320/450/600
MECHANICAL CHARACTERISTICS
By applying pressure on the active area it is possible to
cause damage to the display.
Input/Output Connectors Performance
Input/Output connectors for the operation of LCD
module (FPC connector 22 pin)
-
Applicable FPC Shown in Fig. 3.
-
Terminal holding force: more than 0.9N/pin.
(Each terminal is pulled out at a rate of
25 ±3mm/min.)
23.0
1.0
21
+0.05
-0.05
1.0
+0.02
-0.02
0.7
+0.07
-0.05
+0.15
-0.15
(R0.5)
5 MIN
6 MIN
0.3
+0.1
-0.1
4
1
3
2
No.
Name
1
Base material
2
Copper foil
3
Cover lay
4
Reinforcing plate
Materials
Polyimide or equivalent material (25µm thick)
Copper foil (35µm thick) Solder plated in 2 to 12µm
Polyimide or equivalent material
Polyester polyimide or equivalent material (188µm thick)
(Fig. 3) FPC applied to input/output connector (1.0mm pitch)
I/O CONNECTOR OF BACKLIGHT DRIVING CIRCUIT
Symbol
CN1
Used Connector
BHR=02(8.0)VS-1N
Corresponding connector
SM02(8.0)B-BHS-TB (wire to board)
SM02(8.0)B-BHS-1N (wire to board)
BHMR-03V(wire to wire)
Manufacturer
JST
JST
JST
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Original specifications created by Sharp.
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DISPLAY QUALITY
The display quality of the color TFT-LCD module shall be
in compliance with the Incoming Inspection Standards.
ENH050Q1-320/450/600
a) Floor: Conductive treatment of 1MΩ or more on
the title (conductive amt of conductive paint on
the tile)
HANDLING INSTRUCTIONS
b) Clean room free from dust and with an adhansive
mat on the doorway
Mounting the module
c) Advisable humidity:50%~70%
The TFT-LCD module is designed to be mounted on
equipment using the mounting tabs in the four corners of
the module at the rear side. When mounting the module,
the M2.6 tapping screw (fastening torque is 0.3 through
0.5N•m) is recommended. Make certain to fix the module on
the same plane. Avoid warping or twisting the module.
PRECAUTIONS IN MOUNTING
Polarizer which is made of soft material and susceptible to
flaws must handled carefully. A protective film (Laminator)
is applied on the surface to protect it against scratches and
dirt. It is recommended to peel off the laminator immediately
before use, taking care of static electricity.
Precautions in peeling off the laminator
A) Working environment
When the laminator is peeled off, static electricity may
cause dust to stick to the polarizer surface. To avoid
this, the following working environment is desired.
Advisable temperature:15°C~27°C
d) Workers shall wear conductive shoes, conductive
work clothes, conductive gloves and an earth
band.
If the TFT-LCD module metal parts (shielding lid and rear
case) become soiled, wipe them with a soft dry cloth.
Wipe off water spots of finger grease immediately.
Prolonged contact with water may cause discoloration
or spots.
The TFT-LCD module uses glass which breaks or cracks
easily if dropped or bumped on a hard surface. Handle
with care.
Since CMOS LSI is used in this module, take care of static
electricity and ground one's body when handling.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
August 2003
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Precautions in Adjusting Module
Variable resistor on the rear face of the module has
been adjusted optimally before shipmetn. Therefore, do
not change any adjusted values. If adjusted values are
changed, the specifications described here may not be
satisfied.
Caution of Product Design
1. The LCD module shall be protected against water by
the waterproof cover.
Others
1. Do not expose the module to direct sunlight or
intensive ultraviolet rays for many hours; liquid crystal
is deteriorated by ultraviolet rays.
2. Store the module at a temperature near room
temperature. When stored at lower than the rated
storage temperature, liquid crystal solidifies, causing
the panel to be damaged. When stored at higher than
the rated storage temperature, liquid crystal turns into
isotropic liquid and may not recover.
ENH050Q1-320/450/600
SHIPPING REQUIREMENTS
Carton storage conditions:
Number of layers of carton in stack: 10 layers max
Environmental conditions:
Temperature:
0~40°C
Humidity:
60%RH or less (at 40°C)
No dew condensation at low temperature and high
humidity,
Atmosphere
Harmful gases such as acid and
alkali which corrode electronic
components and wires must not
be present.
Storage period
Approximately 3 months
Opening of package
To prevent TFT-LCD module from
being damaged by static electricity,
adjust the room humidity to 50%RH
of higher and make certain one is
grounded before opening the
package.
3. If LCD panel breaks, the liquid crystal could possibly
escape from the panel. Since the liquid crystal is
injurious, avoid contact with the eyes or mouth. Wash
with soap immediately if contact with the liquid crystal
occurs.
RELIABILITY TEST
4. Observe all other precautionary requirements in
handling general electronic components.
and should be strictly avoided. Image retention may occur
when a fixed pattern is displayed for a long time.
Reliability test conditions for the TFT-LCD module are
shown on page 12.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
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ENH050Q1-320/450/600
RELIABILITY TEST ITEMS FOR TFT-LCD MODULE
No.
1
2
3
4
5
6
7
8
Test items
High temperature storage test
Low temperature storage test
High temperature and high humidity
operating test
High temperature operating test
Low temperature operating test
Electrostatic discharge test
Shock test
Vibration test
9
Heat shock test
Test conditions
tP=-85°C
tP=-30°C
tP=-60°C, 90~95%RH
240h
240h
240h
tP=-85°C
tP=-30°C
=200V • 200pF(OΩ)
980m/s2 6ms.
Frequency Range: 8~33.3Hz
Stroke: 1.3mm
Sweep: 33.3Hz~400Hz
Acceletation: 28.4m/s2
Frequency: 15 minutes
2 hours for each direction of X, Z (1)
4 hours for direction of Y
(8 hours in total)
-30°C~-85°C/200 cycles
(0.5h)
(0.5h)
240h
240h
Once for each terminal
±X, ±Y, ±Z 3 times for each direction
(JIS C0041. A-7 Condition C)
tP=Panel temperature
Evaluation Result Criteria:
Note 1: Direction of X, Y, Z is defined as follows:
1 2 o' clock
direction
Z
X
6
Y
o' clock
direction
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Original specifications created by Sharp.
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ENH050Q1-320/450/600
OUTLINE DIMENSIONS
126.8 ± 0.3
13 +0.3
-0.2
13 +0.3
-0.2
Screen center
42.4
RG B RG
89.9 MAX
79.8 (Case open area)
89.6 ± 0.3
Screen size
(102.24 x 74.763)
Direction of best
viewing angle (6 o'clock)
107.4 (Case open area)
960H x 234V dots
13 +0.3
-0.2
0.2 +0.1
-0.1
+0.3
5
5
9.5
16.5 -0.2
3
3
datum line
11
89.2
2.2
31.2
2.2
datum line
03A
Rear View
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Rev. 0
Backlight
TFT-LCD panel
Gate driver
Control circuit
Backlight driving signal
Video interface circuit
Amplifying
polarity
inversion
Sync. separator
Fig. 4 Circuit block diagram of TFT-LCD module
LCD driving signal
Common driving signal (COM)
Gate driver
driving signal
Source driver
driving signal
FRP
HSY
VSW
Source driver
Gate driver
power supply
circuit
Regulator
SYN
Gate driver
power supply
+5.3V
VSH
VSL
VHL
VCDC
BRT
Power supply
for backlignt
RGB video signal 2
RGB video signal 1
VBS
VSW
NTP
HSY
VSY
CK
CKC
GND
Power supply
VSH, VSL
(Caution) * Not included in the module
Backlight *
driving
circuit
VSH
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Electronic Designs
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ENH050Q1-320/450/600
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Rev. 0
clock
vertical sync.
horizontal sync.
0
0
5V
0
5V
0
5V
A
G
D
B
(INPUT)
0.7VPP
(Note)
input impedance of A, B, D: >10kΩ
input impedance of C: >50kΩ
G:
F:
E:
D:
C:
5V
+8V
0.7VPP
B:
-5V
C
under HV
1VPP
E
F
GND
A:
(Gray scale)
I/O Signals
+5V
-5V
+8V
HSY
VSY
PWM
N/P
HRV
VRV
VSW
SAM
VCDC
VSH
VBS
BRT
VRI
VGI
VBI
VSL
VR2
VG2
VB2
GND
CLKC
CLK
1kΩ
I
1kΩ
8.2kΩ
560Ω
560Ω
560Ω
560Ω
560Ω
560Ω
560Ω
C-MOS LSI
0.01xF
0.01xF
0.01xF
0.01xF
0.01xF
0.01xF
+5.3V
IC
C-MOS LSI
C-MOS LSI
C-MOS LSI
IC
10kΩ
2kΩ
15kΩ
8.2kΩ
50kΩ
Driver ICs
COM
-5V
+8V
Driver ICs
IC
47kΩ
+5.3V
TFT-LCD Module
Regulator
+5.3V
10kΩ
Fig. 5 Recommended Circuit
SW
SW
I/O Connector
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Electronic Designs
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ENH050Q1-320/450/600
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trHO
t f HO
Fig. 6-A Input/Output signal waveforms (CKC= "High")
tVHO
tpv2
19H (NTSC)
25H (PAL)
Vertical display period:
HSY
HSY
VIDEO
(R,G,B)
VSY
VBS
0.7 Vp-p
tpv1
3H (NTSC)
2.5H (PAL)
tvs
VSY
detailed
tVHO
trVO
16.7ms (NTSC)
20ms (PAL)
234H (NTSC)
273H (PAL)
1.0 Vp-p
odd field
even field
tfVO
ENH050Q1-320/450/600
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Rev. 0
Video signal
VR1~VB1
or
VR2~VB2
HSY
VBS
50%
50%
12.3 µs (NTSC, SAM Low)
13.0 µs (NTSC, SAM High)
13.4 µs (NTSC, SAM Low)
12.2 µs (NTSC, SAM High)
tHS2
tpd
tHS1
tfH0
90%
10%
Fig. 6-B Input/Output signal waveforms (CKC="High")
Horizontally display area 50.6µs (SAM "Low")
Horizontally display area 50.8µs (SAM "High")
1H=63.5µs (NTSC)
1H=64.0µs (PAL)
trH0
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HSY
INDEPENDENT
SAMPLING MODE
(DOT CLOCK)
SIMULTANEOUS
SAMPLING MODE
(PIXEL CLOCK)
SYSTEM
CLOCK
PAL MODE
HSY
INDEPENDENT
SAMPLING MODE
(DOT CLOCK)
SIMULTANEOUS
SAMPLING MODE
(PIXEL CLOCK)
SYSTEM
CLOCK
NTSC MODE
1185
1185
1190
1195
1195
1200
RESET
1200
0
1205
Fig. 6-C Input/Output signal waveforms (CLKC="High")
1190
RESET
5
0
52.9 ns
10
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HSY
tH01
1H
trVO
tfCLI
HSY
VSY
HSY
HSY
VSY
tHI
trCLI
CK
Fig. 6-D Input/Output signal waveforms (external clock mode NTP="High", CKC="Low")
tH02
tSU1
tWL
tfH12
tWH
trH12
tfVO
tSU2
ENH050Q1-320/450/600
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Fig. 7 PWM signal waveform for dimming backlight
Period of DC/AC inverter oscillation
nH
89H (PAL)
PWM
1/2H 1/2H
HSY
VSY
1H
magnify TIME range
89H
(PAL)
PWM
(NTSC)
PWM
VSY
105H
nH
105H (NTSC)
525H (NTSC)
625H (PAL)
Period of stop DC/AC inverter oscillation
ENH050Q1-320/450/600
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ADJUSTING METHOD OF OPTIMUM COMMON
ELECTRODE DC BIAS VOLTAGE
Normal line
Photodetector
(including luminosity factor)
To obtain optimum DC bias voltage of common electrode
driving signal (VCDC). Photo-electric devices are very
effective, and the accuracy is within 0.1V. (In visual
examination method, the accuracy is about 0.5V because
of the difference amoung individuals.)
To gain optimum common electrode DC bias voltage,
there is the following method which uses the photoelectric
device.
θ
(Measurement of flicker)
Polarizing filter
Frame
DC bias voltage is adjusted so as to minimize NTSC: 60Hz
(30Hz) PAL: 50Hz (25Hz) flicker.
Photo-electric
device
Output voltage
Backlight
(Plane source)
LCD panel
VCDC
LCD
Oscilloscope
(X-Y recorder)
Brightness: Less than 5000cd/m2
Wave length: To be cut less than 400nm
Fig. 9 Optical characteristics
Fig. A Measurement system
Photo-electric output voltage is measured by an
oscilloscope at a system shown in Fig. A.
DC bias voltage must be adjusted so as to minimize the
NTSC:60Hz(30Hz) PAL:50Hz(25Hz) flicker with DC bias
voltage changing slowly. (Fig. B)
DC bias: Optimum
DC bias: Optimum + 1V
Fig. B Waveforms of flicker
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Original specifications created by Sharp.
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