19-3953; Rev 0; 2/06
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
``````````````````````````````````` ᄂቶ
NBY4532F! VTCᅪ0ᓍ૦఼ᒜ۞೫Ⴥᎌܘገࡼၫᔊ
൝ਜ਼ෝผ࢟വLjభဣሚ९ VTC! 3/1 ਖपࡼཝႥ
VTCᅪཝႥ0ࢅႥᓍ૦ăดᒙࡼཝႥ၃खᎌ±26lW
ࡼFTEۣઐLj݀ᄋభࡼ߈ܠVTCೌਜ਼ࣥఎถăดݝ
TJF )ࠈቲా༺*ࠀಯށVTCፇࡼᇼஂLjಿྙࡇތ
ଶዩਜ਼ᔐሣᒮ၂ăNBY4532FಽጙᔝࡀᐱఎᔫLj
ᄰਭጙৈᔢᔫႥൈࡉ37NI{ࡼTQJ UN ాభጲषᆰᑚ
ቋࡀăಽ଼ࡼ4ሣ5ሣTQJాLjকୈభጲ
ྀੜTQJᓍ఼ᒜ)ᆈࠀಯĂBTJDĂETQࢀ*ᐐଝVTCᅪ
ᓍ૦ถă
♦ ࣖೂ᎖ᆈࠀಯࡼVTCऱښ
ࡩᔫᆐVTCᓍ૦ᔫဟLjNBY4532FဧࡍࡼVTCᅪถ
৫ᆐྀੜᆈࠀಯĂBTJDETQჅăጲ࢛ࡵ࢛ऱښᆐ
ಿLjభጲᆐ༊ྜྷါᇹᄻᐐଝVTCၡాܪLjݷᔫ
NBY4532Fࡼৼୈభጲऻ଼ޟLjፐᆐᒑኊᑽߒৈܪ
۸ă
ᎅ᎖ด߅ૹݝ೫࢟ຳᓞધLjTQJ ాభᔫ᎖ 2/5W ᒗ
4/7Wࡼᇹᄻ࢟ኹăVTCࢾဟݷᔫᏴNBY4532Fดݝᅲ߅Lj
ᅲ߅ઁᄋᒦࣥLjᑚዹᇄኊᐴTQJᓍ఼ᒜࡼࢾဟ
൸ᔗVTCࢾဟገཇăNBY4532Fથᄋڭᄟᄰၒྜྷਜ਼ၒ
߲ాLjፐࠥLjࡩᆈࠀಯݧJ0P୭ဣሚTQJాဟLjᔐ
ࡼJ0Pాሣିݙनᐐă
♦ ྟୈରྏ᎖TQJాࡼVTCᅪ఼ᒜNBY4531F
♦ ९VTC! 3/1ਖप)ཝႥ23NcqtᅪLj
ཝ0ࢅႥ23Ncqt02/6Ncqtᓍ૦*
♦ ૹ߅VTC၃ख
♦ ৼୈ0፮ୈ఼ᒜดݝE,౯࢟ᔜ)ᅪෝါ*ਜ਼
E,0E.ሆ౯࢟ᔜ)ᓍ૦ෝါ*
♦ భ߈ܠ4ሣ5ሣ37NI{! TQJా
♦ ૹ߅࢟ຳᓞધਜ਼ࣖࡼWM ၒྜྷᏤဧࣖೂࡼ
ᇹᄻా࢟ኹ
♦ Ᏼᔈ࢟ᅪ።ᒦᎅด୷܈ݝଶހWCVT
♦ E,ĂE.ਜ਼WCDPNQᄋFTEۣઐ
♦ ᒦࣥၒ߲୭)࢟ຳభܟ߈ܠዘ߿खෝါ*ဣሚއኯ
ᒦࣥདࣅࡼTQJా
♦ ڭৈᄰၒྜྷాLjڭৈᄰၒ߲ా
♦ ᎖ᄰၒྜྷ୭ࡼᒦࣥቧLjభܟ߈ܠዘቶ
♦ ᒝถVTC! TJF
♦ ᔈࣅࠀಯVTCഗ఼ᒜਜ਼ၷદࡀ
NBY4532Fᔫ᎖ਓࡼ.51°Dᒗ,96°DᆨࣞपᆍLj۸ᎌ43
୭URGQॖᓤ)6nn y 6nn*ਜ਼43୭URGOॖᓤ)6nn y
6nn*ă
♦ ࠀಯށVTCቧᇼஂ
``````````````````````````````````` ።
♦ ஂဏహମࡼᇄURGQਜ਼URGOॖᓤ)6nn! y! 6nn*
༊ྜྷါᇹᄻ
გါവᎅ
ጛ೦۸
QMD
ᆈࠀಯਜ਼ETQ
૦ࢻਫ਼
ઓVTC۸
QEB
ሤ૦
NQ4݃ह
ጥܭ
♦ ᔈࡒࢾဟ൸ᔗVTCࢾဟገཇLjᇄኊTQJᓍ఼ᒜݬ
Ꭷࢾဟူୈ
``````````````````````````````` ࢾ৪ቧᇦ
PART
TEMP RANGE
PINPACKAGE
MAX3421EEHJ+
-40°C to +85°C
32 TQFP
MAX3421EETG+* -40°C to +85°C
32 TQFN-EP**
PKG CODE
H32-1
T3255-4
* ᆚޘອĊĊૡᓨౚ༿ೊޣऱă
**FQ! >! ൡLjೌᒗă
TQဵNpupspmb-! Jod/ࡼܪă
________________________________________________________________ Maxim Integrated Products
1
۾ᆪဵNbyjnᑵါ፞ᆪᓾ೯ࡼፉᆪLjNbyjn࣪ݙडፉᒦࡀᏴࡼތፊᎅࠥޘညࡼࡇᇙঌᐊă༿ᓖፀፉᆪᒦభถࡀᏴᆪᔊᔝᒅ
डፉࡇᇙLjྙኊཀྵཱྀྀੜࠤᎫࡼᓰཀྵቶLj༿ݬఠ Nbyjnᄋࡼ፞ᆪۈᓾ೯ă
Ⴣནॅዹອਜ਼ᔢቤࡼۈၫᓾ೯Lj༿षᆰNbyjnࡼᓍǖxxx/nbyjn.jd/dpn/doă
NBY4532F
``````````````````````````````````` গၤ
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
``````````````````````````` ᓍ૦ᔫᄂቶ
``````````````````````````` ᅪᔫᄂቶ
♦ ᏴᏇࡼNBY4531Fࡀᔝᒦᐐଝလጙৈࡀ
)S32–S42*఼ᒜᓍ૦ᔫෝါ
♦ ด࢛࣡ݝGJGP
FQ1ǖ఼ᒜ)DPOUSPM*! )75ᔊஂ*
FQ2ǖၒ߲)PVU*LjCVMLJOUFSSVQULj
3! y! 75ᔊஂ)ၷદߡ*
FQ3ǖၒྜྷ)JO*LjCVMLJOUFSSVQULj
3! y! 75ᔊஂ)ၷદߡ*
FQ4ǖၒྜྷ)JO*LjCVMLJOUFSSVQU! )75ᔊஂ*
♦ ᓍ఼ᒜᔫ᎖ཝႥࢅႥෝါ
♦ GJGP
TOEGJGP;! ख႙GJGPLjၷદߡĂ75ᔊஂ
SDWGJGP;! ၃GJGPLjၷદߡĂ75ᔊஂ
♦ ᔈࣅࠀಯEBUB10EBUB2߿खࡼޘညਜ਼ଶހ
♦ ᔈࣅࠀಯཝࠅݝ႙ਭ߈ࡼࡇᇙቅዩ
♦ ጲ2ntମᔈࣅޘညTPG )ཝႥ*0FPQ )ࢅႥ*
♦ ಽᑷဪ۞)TPG0FPQ*ᔈࣅᄴݛᓍ૦ࠅ႙
♦ భۨসᓍ૦༿ཇࡼஉਫ
♦ ᑽߒVTCૹሣ
♦ ၷદߡၫ࢛࣡ᏤTQJᓍ఼ᒜࡼၫࠅ႙ᎧVTC
ࠅ႙ᄴဟቲ
♦ ᒙ)TFUVQ*ၫᎌᔈࡼ9ᔊஂGJGPLj଼છ೫ৼୈ
``````````````````````````` ࢜ቯ።࢟വ
♦ ᑽߒJTPDISPOPVT )ᄴࠅ*ݛ႙
♦ ଼߈ܠ
TJFᔈࣅޘညᒲ໐ቶTPG )ཝႥ*FPQ )ࢅႥ*ᑷܪ
TQJᓍ఼ᒜᓤᏲၫLjᒙถᏄᒍĂ࢛࣡ਜ਼
ࠅ႙ಢቯLj݀ࣅࠅ႙
NBY4532Fጲᒦࣥਜ਼ࡔ൩ۨসᅪࡼሰ።
భᏴྀፀဟମଝᏲࠅ႙༿ཇ
TJFᎧᑷܪۣߒᄴݛ
࣪᎖ࣶ۞ࠅ႙LjTJFᔈࣅᆒઐ݀ଶއၫ߿ख
3.3V
REGULATOR
SPI
3, 4
USB
MAX3421E
INT
μP
ᅄ2/! NBY4532Fᄰਭ45ৈా୭ೌᒗྀੜᆈࠀಯ
NBY4532Fᄰਭ45ৈా୭ೌᒗྀੜᆈࠀಯ)ᅄ
2*ă࣪᎖ݙ፮ୈTQJాࡼ଼ᆈࠀಯLjభᄰਭᄰ
J0P୭ᓆᆡݷᔫࡼऱါቲᄰቧăNBY4532Fࡼڭৈ
HQJO )ᄰၒྜྷ*୭ਜ਼ڭৈHQPVU )ᄰၒ߲*୭ᄐࡔ
μQۻᄰቧాᐴࡼాሣઁ྆ᎌăႰNBY4532F
ࡼTQJాᎌࣖೂࡼၫၒྜྷ)NPTJLjᓍ߲࠭ྜྷ*ਜ਼ၫ
ၒ߲)NJTPLjᓍྜྷ߲࠭*୭Ljᎅ᎖TQJాࡼNPTJጐభ
ᒙᆐၷሶၫሣLjభጲဏሆጙৈా୭ă૾Ⴥᆣࡼ
ۍၷෝါă
2
_______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
3.3V
REGULATOR
POWER RAIL
SPI
3, 4
USB
MAX3421E
NBY4532Fࡼೝৈᄂቶဧऻޟጵ᎖ਜ਼BTJDਜ਼ETQᑚዹ
ࡼࡍਖෝĂႥበຢా)ᅄ3*ă၅ሌLjTQJాࡼႥࣞ
ࡉ37NI{ǗࠨLjࣖࡼWM ୭ਜ਼ด࢟ݝຳᓞધဧ
ᇹᄻాถ৫ᔫᏴ܈4/4WࡼWDD ৎࢅࡼ࢟ኹă
INT
ASIC,
DSP,
ETC.
ᅄ3/!NBY4532Fೌᒗࡍቯበຢ
LOCAL
POWER
3.3V
REGULATOR
USB
MAX3421E
I
S
O
L
A
T
O
R
S
MISO
INT
MICRO
ASIC
DSP
NBY4532FᆐVTCాࡼ࢟ಭᄋ೫ಯሯऱ)ښᅄ4*ă
VTCᎌഗ఼ᒜᄂቶLjᏴᆈࠀಯᅲ߅TQJ࣡ాࡼၫ
ࠅ႙ݷᔫ༄LjNBY4532F્ᔈࣅጲOBLᆻ၄۞።ࡊᓍ૦
༿ཇăᑚፀᆜᓹTQJాభᔫᏴᔢᒗ37NI{ࡼྀੜ
ຫൈሆăፐࠥLjଐᑗభᔈᎅኡᐋాࡼᔫຫൈLj݀
ো߅۾ਜ਼ቶถገཇኡᐋᔢᎁࡼ࢟Ắă
SCLK
MOSI
SS
LOCAL
GND
ᅄ4/! ಽNBY4532FဣሚVTCࡼ࢟ಭ
5V
ᅄ5߲೫NBY4532FᔫᏴVTCᓍ૦ෝါሆࡼᇹᄻౖᅄă
VTCᓍ૦።6W࢟ᏎVTC ĐBđቯೌࡼWCVT ୭Lj
ᆐVTCᅪ࢟ăᆐᅪ࢟ࡼᇹᄻኍᏴ࢟୭ݧ
ۣઐ࢟വLjጲᅪਭഗᇹᄻᐆ߅ႼăWCVT ఎਈ
)ಿྙNBY589:*భᄋൈ఼ᒜਜ਼ᅪೝሲถǖሢᒜ
ၒ႙ᅪࡼ࢟ഗ)ಿྙ311nB*Lj݀ሶTQJᓍ఼ᒜۨস
৺ᑇ)ਭഗ*ăNbyjnᄋࣶᒬݙᄴሢᒜ࢟ഗਜ਼ถࡼWCVT
ఎਈăሮ༽༿षᆰNbyjnᆀᐶă
VBUS
SWITCH
VBUS
POWER
ON/OFF
3.3V
REGULATOR
FAULT
MICRO,
ASIC,
DSP
VBUS
SPI
3, 4
MAX3421E
USB
"A"
D+
DGND
INT
USB
USB
"B" PERIPHERAL
4/4W ࢯஂ)ಿྙ NBY745:UM*ᆐ NBY4532F ᑗᇹᄻ
఼ᒜᄋ࢟Ꮞăྙਫᇹᄻ఼ᒜᔫᏴৎࢅ࢟ኹሆLj
NBY4532FࡼTQJਜ਼J0PాጐభᔫᏴৎࢅ࢟ኹሆLjᒑኊ
ᇹᄻ࢟ኹ)ಿྙ3/6W2/9W*ೌᒗNBY4532FࡼWM ୭ă
ᅄ5/! NBY4532F᎖༊ྜྷါᓍ૦።
_______________________________________________________________________________________
3
NBY4532F
```````````````````````````````````````````````````````````````````` ࢜ቯ።࢟വ)ኚ *
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
`````````````````````````````````````````````````````````````````````````` ถౖᅄ
RES
XI
XO
VCC
INTERNAL
POR
RESET
LOGIC
OSC
AND
4x PLL
1.5kΩ
POWER
DOWN
D+
D-
USB SIE
(SERIALINTERFACE
ENGINE)
FULL-SPEED/
LOW-SPEED
USB
TRANSCEIVER
ESD
PROTECTION
48MHz
15kΩ
15kΩ
SCLK
MOSI
MISO
SS
INT
ENDPOINT
BUFFERS
VBCOMP
VL
SPI SLAVE
INTERFACE
ESD
PROTECTION
VBUS_DET
VBUS
COMP
GPIN0
GPIN1
GPIN2
GPIN3
GPIN4
GPIN5
GPIN6
GPIN7
1V TO 3V
RIN
BUSACT/
INIRQ
SOF
OPERATE
0
MAX3421E
GND
4
RGPIN
1
2
3
MUX
GPX
_______________________________________________________________________________________
GPOUT0
GPOUT1
GPOUT2
GPOUT3
GPOUT4
GPOUT5
GPOUT6
GPOUT7
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
PIN
୭
NAME
߂
INPUT/
ၒྜྷ0
OUTPUT
ၒ߲
FUNCTION
ถ
1
GPIN7
Input
ၒྜྷ
General-Purpose Input. GPIN7–GPIN0 are connected to VL with internal pullup resistors.
ᄰၒྜྷăHQJO8–HQJO1ᄰਭดݝ౯࢟ᔜೌᒗWMăHQJO8–HQJO1ࡼ൝࢟ຳݬᑍ᎖WM ࢟ኹă
GPIN7–GPIN0 logic levels are referenced to the voltage
on VL.
2
VL
Input
ၒྜྷ
Level-Translator
Voltage Input.M ࡵ2/5Wᒗ4/7Wࡼᇹᄻ൝࢟Ꮞăጙᒑ1/2μG࢟ྏLjభถణதW
Connect VL to the system’s 1.4V to 3.6V logic-level power
࢟ຳᓞધ࢟ኹၒྜྷăೌW
M
୭വW
supply.
Bypass
VL to ground with a 0.1μF capacitor as close to VL as possible.
M ࡵă
3, 19
GND
Input
ၒྜྷ
Ground
ă
4
GPOUT0
5
GPOUT1
6
GPOUT2
7
GPOUT3
8
GPOUT4
9
GPOUT5
10
GPOUT6
11
GPOUT7
12
RES
13
SCLK
ၒ߲
Output
General-Purpose Push-Pull Outputs. GPOUT7–GPOUT0 logic levels are referenced to the
ᄰᅎᅴါၒ߲ăHQPVU8–HQPVU1ࡼ൝࢟ຳݬᑍ᎖WM ࢟ኹă
voltage on VL.
ၒྜྷ
Input
Device Reset. Drive RES low to clear all of the internal registers except for PINCTL (R17),
ୈআᆡăདࣅRESᆐࢅభ༹߹QJODUM! )S28*ĂVTCDUM! )S26*ਜ਼TQJ൝ᒄᅪࡼჅᎌดݝ
USBCTL
(R15), and SPI logic.
The logic level is referenced to the voltage on VL. (See the
ࡀă൝࢟ຳݬᑍ᎖W
M ࢟ኹă)ਈ᎖NBY4532Fࡼআᆡᄂቶሮୈআᆡݝॊă*
Device Reset section for a description of resets available on the MAX3421E.)
Input
ၒྜྷ
SPI Serial-Clock Input. An external SPI master supplies SCLK with frequencies up to 26MHz.
The
logic level is referenced to the voltage on VL. Data is clocked into the SPI slave interface
TQJࠈቲဟᒩၒྜྷăᅪݝTQJᓍ఼ᒜᄋকဟᒩLjຫൈᔢ37NI{ă൝࢟ຳݬᑍ᎖W
MăၫᏴ
TDMLࡼဍዘၒྜྷTQJ࠭ୈాăᏴTDMLࡼሆଢ଼ዘLjTQJ࠭ୈాၒ߲ၫă
on
the rising edge of SCLK. Data is clocked out of the SPI slave interface on the falling edge of
SCLK.
SPI Slave Select Input. The SS logic level is referenced to the voltage on VL. When SS is driven
TQJ࠭ୈኡᐋၒྜྷăSS൝࢟ຳݬᑍ᎖WMăࡩSSۻདࣅᆐဟLjTQJ࠭ୈాᆐऻኡࢾᓨზLj
high, the SPI slave interface is not selected,
the MISO pin is high impedance, and SCLK
NJTP୭ᆐᔜზLjTDMLᄢܤዘᎌᔫăጙࠨTQJࠅ႙ဪ᎖ᎅࡵࢅࡼSSᄢܤLj
transitions
are ignored. An SPI transfer begins with a high-to-low SS transition and ends with a
ᒫ᎖ᎅࢅࡵࡼSSᄢܤă
low-to-high SS transition.
14
SS
Input
ၒྜྷ
15
MISO
Output
ၒ߲
TQJࠈቲၫၒ߲)ᓍྜྷ߲࠭*ăNJTPᆐᅎᅴါၒ߲ăNJTPᏴۍၷෝါSS
>! 2ဟᆐྯზă
SPI
Serial-Data Output (Master-In Slave-Out). MISO is a push-pull output. MISO
is tri-stated in
NJTP൝࢟ຳݬᑍ᎖W
half-duplex
mode or when
MăSS = 1. The MISO logic level is referenced to the voltage on VL.
16
MOSI
Input
or
ၒྜྷ
Input/
ၒྜྷ0
ၒ߲
Output
SPI Serial-Data Input (Master-Out Slave-In). The logic level on MOSI is referenced to the
TQJࠈቲၫၒྜྷ)ᓍ߲࠭ྜྷ*ăNPTJ൝࢟ຳݬᑍ᎖WMăNPTJጐభᒙᆐၷሶNPTJ0NJTP
MOSI/MISO input and output.
voltage on VL. MOSI can also be configured as a bidirectional
ၒྜྷਜ਼ၒ߲ă)ݬᅄ26ă*
(See Figure 15.)
17
GPX
Output
ၒ߲
General-Purpose Multiplexed Push-Pull Output. The internal MAX3421E signal that appears on
ᄰᅎᅴါআၒ߲ăᄰਭቖࡀQJODUM!
GPX
is programmable by writing to the GPXB )S28*ᒦࡼHQYCਜ਼HQYB఼ᒜᆡጲૺࡀNPEF
and GPXA bits of the PINCTL (R17) register and
)S38*ᒦࡼTFQJSRᆡLjభኡᐋ߲ሚᏴHQY୭ࡼNBY4532FดݝቧăHQYభၒ߲ᇋᒬቧ
the SEPIRQ bit of the MODE (R27) register. GPX indicates one of five signals (see the GPX
ᒄጙ)ݬ HQY ݝॊ*ă
section).
18
INT
ၒ߲
Output
Interrupt Output. In edge mode, the logic level on INT is referenced to the voltage on VL and is
MLjᆐቶభࡼ߈ܠᅎᅴါၒ߲ă࢟ຳෝါሆLj
aᒦࣥၒ߲ăܟዘෝါሆJOU൝࢟ຳݬᑍ᎖W
push-pull output with programmable polarity.
In level mode, INT is open-drain and active low.
JOUᆐࢅᎌఎധၒ߲ăᒙᆡࡀDQVDUM! )S27*ᒦࡼJFᆡభဧถJOUă
Set the IE bit in the CPUCTL (R16) register to enable INT.
20
D-
Input/
ၒྜྷ0
ၒ߲
Output
USB
D- Signal. Connect D- to a)±2&*ࠈೊ࢟ᔜೌE.ᒗVTCೌăୈดݝᎌభ༤ધࡼ26lΩ
USB connector through a 33Ω ±1% series resistor. A
VTCᒄE.ቧăᄰਭጙᒑ44Ω
E.ሆ౯࢟ᔜă
switchable
15kΩ D- pulldown resistor is internal to the device.
_______________________________________________________________________________________
5
NBY4532F
`````````````````````````````````````````````````````````````````````````` ୭ႁී
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
```````````````````````````````````````````````````````````````````````` ୭ႁී)ኚ *
6
PIN
୭
NAME
߂
INPUT/
ၒྜྷ0
OUTPUT
ၒ߲
21
D+
Input/
ၒྜྷ0
ၒ߲
Output
FUNCTION
ถ
USB
D+ Signal. Connect D+ to)±2&*ࠈೊ࢟ᔜೌE,ᒗVTCೌăୈดݝᎌభ༤ધࡼ
a USB connector through a 33Ω ±1% series resistor. A
VTCᒄE,ቧăᄰਭጙᒑ44Ω
2/6lΩ E,౯࢟ᔜਜ਼26lΩ
switchable
1.5kΩ D+ pullupE,ሆ౯࢟ᔜă
resistor and 15kΩ D+ pulldown resistor is internal to the device.
22
VBCOMP
Input
ၒྜྷ
VBUS Comparator Input. VBCOMP is internally connected to a voltage comparator to allow the
WCVT
୷܈ၒྜྷăWCDPNQೌᒗጙৈด࢟ݝኹ୷܈Ljጲܣ᎖TQJᓍ఼ᒜଶ)އᄰਭᒦࣥ
SPI
master
to detect (through an interrupt or checking a register bit) the presence or loss of
ࡀᆡ*!
WCVT. ࡼଝ࢟ࢬ࢟ᓨზăጙᒑ2/1μGჿࠣ࢟ྏവWCDPNQࡵăWCDPNQۻS
JO
power
on VBUS
Bypass VBCOMP to ground with a 1.0μF ceramic capacitor. VBCOMP is pulled
ሆ౯ᒗ)ݬ Fmfdusjdbm! Dibsbdufsjtujdt*ă
down to ground with RIN (see Electrical Characteristics).
23
VCC
Input
ၒྜྷ
USB Transceiver and Logic Core Power-Supply Input. Connect VCC to a positive 3.3V power
VTC၃खਜ਼ดਖ਼൝࢟ᏎၒྜྷăೌWDD ᒗ4/4Wᑵ࢟Ꮞăጙᒑ2/1μGჿࠣ࢟ྏణத
ceramic capacitor as close to the VCC pin as
supply. Bypass VCC to ground with a 1.0μF
WDD ୭വWDD ࡵă
possible.
24
XI
Input
ၒྜྷ
Crystal
Oscillator Input. Connect XI to one side
of a parallel resonant 12MHz ±0.25% crystal
ᑩၒྜྷăೌYJࡵ݀ೊቕᑩຫൈᆐ23NI{!
±1/36&ࡼᄏࡼጙ࣡ਜ਼ጙᒑࡵHOEࡼঌᏲ࢟ྏă
ጐభጙৈݬᑍ᎖W
and
a load capacitorDD
toࡼᅪݝဟᒩདࣅYJă
GND. XI can also be driven by an external clock referenced to VCC.
25
XO
Output
ၒ߲
26
GPIN0
27
GPIN1
28
GPIN2
29
GPIN3
30
GPIN4
31
GPIN5
32
GPIN6
EP
GND
Crystal Oscillator Output. Connect XO to the other side of a parallel resonant 12MHz ±0.25%
ᑩၒ߲ăೌYPࡵ݀ೊቕᑩຫൈᆐ23NI{!
±1/36&ࡼᄏࡼጙ࣡ਜ਼ጙᒑࡵHOEࡼঌᏲ࢟ྏă
crystal
and a load capacitor to GND. Leave XO
unconnected if XI is driven with an external
ࡩYJᎅᅪݝᏎདࣅဟॳహYPă
source.
Input
ၒྜྷ
General-Purpose
Inputs. GPIN7–GPIN0 are connected
to VL with internal pullup resistors.
ᄰၒྜྷăHQJO8–HQJO1ᄰਭดݝ౯࢟ᔜೌᒗW
MăHQJO8–HQJO1ࡼ൝࢟ຳݬᑍ᎖W
M
࢟ኹă
GPIN7–GPIN0
logic levels are referenced to the voltage on VL.
Input
ၒྜྷ
Exposed Paddle, Connected to Ground. Connect EP to GND or leave unconnected. EP is
ൡഴLjೌᒗăೌFQࡵHOEॳహăFQᆡ᎖URGOॖᓤࡼݝăURGQॖᓤᎌൡഴ
located
on the bottom of the TQFN package. The TQFP package does not have an exposed
ă
paddle.
_______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
TQJᓍ఼ᒜᄰਭࣗቖNBY4532Fดࡼݝ37ৈࡀ)ᅪ
ෝါLjܭ2*34ৈࡀ)ᓍ૦ෝါLjܭ3*఼ᒜ
ᔫăᒙᆡNPEFࡀ)S38*ᒦࡼIPTUᆡభᒙNBY4532F
ᆐᓍᔫෝါăࡩᔫᆐVTCᅪဧဟLjNBY4532Fࡼ
ࡀରྏ᎖NBY4531FLjএଝถ᎖ܭ2ሆෂࡼᓖျ2c
ᒦăਈ᎖ᑚቋࡀดྏࡼᅲᑳႁීLjݬNbyjnᆀᐶ
ࡼ NBY4532F߈ܠᒎฉă
ጙࠨࡀषᆰ۞ೝৈࣤLj၅ሌဵTQJᓍ఼ᒜቖ఼
ᒜᔊஂLjஜᓹဵ࣪ჅኰᒍࡀࡼࣗቖݷᔫăჅ
ᎌTQJࠅ႙࣒ဵNTC )ᔢᎌᆡ*Ᏼሌăෘഎᔊஂ۞౪
ࡀᒍLjጙৈऱሶᆡ)ࣗ > 1Ljቖ > 2*Ljਜ਼BDLTUBUᆡ
)ᅄ6*ăTQJᓍ఼ᒜᏴෘഎᔊஂࡼSfh5ᒗSfh1ᆡቖྜྷࡀ
ܠ࣪።ࡼऔᒜ൩Lj૾భኰᒍ࣪።ࡼNBY4532Fดݝ
ࡀăಿྙLjገषᆰJPQJOT2ࡀ)S31*LjSfh5ࡵSfh1
భᒙྙሆǖSfh5 >2LjSfh4 > 1LjSfh3 >2LjSfh2> 1LjSfh1 > 1ă
EJS )ऱሶ*ᆡࢾၫࠅ႙ࡼऱሶăEJS > 2ፀᆜᓹၫ
ۻቖྜྷࡀLjEJS > 1 ፀᆜᓹၫ߲ࣗۻࡀă
BDLTUBUᆡࢾFQTUBMMTࡀ)S:*ᒦBDLTUBUᆡࡼ
ᓨზ)ஞ᎖ᅪෝါ*ăTQJᓍ఼ᒜকᆡᒙᆡීܭጯ
ᅲ߅ጙࠨDPOUSPMࠅ႙ăᎅ᎖কᆡ્ۻຫथࡵLj
हᏴෘഎᔊஂᒦభᄋৼୈൈăᓍෝါሆBDLTUBUᆡ
ۻăᏴཝၷTQJෝါᒦLjۋႲᓹෘഎᔊஂࡼ႙ྜྷLj
NBY4532Fᄴဟ႙߲ڭৈVTCᓨზᆡ)ᅄ7Ă8*ăᏴۍၷ
ෝါᒦLjభږᑍषᆰጙۅࡀᆡࡼऱါषᆰᑚቋᓨზᆡă
༄ᇋৈࡀ)S1–S5*षᆰᅪਜ਼ᓍ૦ෝါሆࡼGJGPă
ᒮআषᆰᑚቋࡀဟดݝࡀᒍࣉۻஉLjᑚዹLj
భጲᏴᄴጙৈTQJषᆰᒲ໐ᒦ)SSۣߒᆐࢅ*ᄰਭGJGPቖྜྷ
߲ࣶࣗৈᔊஂăषᆰࡀS6–S2:ဟLjᏴጙࠨTQJषᆰ
ᒲ໐ᒦႲᓹඛৈᔊஂࡼࠅ႙Ljดݝࡀᒍభᔈࣅ
ᐐăषᆰS31ဟLjᒍࣉஉ᎖কࡀLjऎ࣪᎖S32–S42
ࡼषᆰጐ્ဧดݝᒍᐐLjᒮআषᆰS42ဟᒍࣉஉ᎖
S42ă
ܭ2ਜ਼ܭ3ᒦࡼࡀ፯ስ߲೫ᅪਜ਼ᓍ૦ෝါሆး
ࡼࡀᆡăݙး᎖෭ᒬෝါࡼࡀᆡመာᆐഃă
ᑚቋࡀᆡ߲ࣗဟᆐഃLjݙ።ඣቖᆐ൝2ă
ᅪෝါࡀ፯ስ
ࡩᔫ᎖VTCᅪෝါဟ)NBY4532FࡼIPTUᆡۻᒙ1 )෦
ཱྀ**LjNBY4532FۣߒᎧNBY4531Fࡀࡼରྏቶăᆐ
NBY4531FቖࡼৼୈᇄኊࢯᑳభᏥቲ᎖NBY4532Făᆐ
೫ᑽߒNBY4532FࡼቤᄂቶLjࡀᔝᒦ۞೫ጙቋቤࡼ
ᆡLjᏴܭ2ࡼݝᓖျ2cᒦᎌჅහၤă
ᓍ૦ෝါࡀ፯ስ
ᑵྙܭ3ჅာLjᏴᓍ૦ෝါሆ)IPTU > 2*LjᎌቋNBY4531F
ࡀۻᒮቤෘ)ಿྙS2ܤᆐSDWGJGP*Ljᎌቋᎌဧ
)መာᆐഃ*Ljऎᎌቋ྆း᎖ᓍ૦ෝါăࠥᅪLjᎌ22
ৈࡀ)S32–S42*ᓜ᎖VTCᓍ૦ถă
b7
b6
b5
b4
b3
b2
b1
b0
Reg4
Reg3
Reg2
Reg1
Reg0
0
DIR
ACKSTAT*
*BDLTUBUᆡᏴᓍ૦ෝါሆۻă
ᅄ6/! TQJෘഎᔊஂ
STATUS BITS (PERIPHERAL MODE)
b7
b6
b5
b4
b3
b2
b1
b0
SUSPIRQ
URESIRQ
SUDAVIRQ
IN3BAVIRQ
IN2BAVIRQ
OUT1DAVIRQ
OUT0DAVIRQ
IN0BAVIRQ
ᅄ7/! ᅪෝါሆLjVTCᓨზᆡႲᓹඛࠨࠅ႙ࡼ၅ৈᔊஂۻ႙߲)ஞཝၷෝါ*
STATUS BITS (HOST MODE)
b7
b6
b5
b4
b3
b2
b1
b0
HXFRDNIRQ
FRAMEIRQ
CONNIRQ
SUSDNIRQ
SNDBAVIRQ
RCVDAVIRQ
RSMREQIRQ
BUSEVENTIRQ
ᅄ8/! ᓍ૦ෝါሆLjVTCᓨზᆡႲᓹඛࠨࠅ႙ࡼ၅ৈᔊஂ႙߲)ஞཝၷෝါ*
_______________________________________________________________________________________
7
NBY4532F
ࡀႁී
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
ܭ2/! ᅪෝါሆ)IPTU > 1*ࡼNBY4532Fࡀ፯ስ)ᓖ2bĂ2c*
REG
NAME
b7
b6
b5
b4
b3
b2
b1
b0
acc
b6
b5
b4
b3
b2
b1
b0
RSC
R0
EP0FIFO
b7
R1
EP1OUTFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R2
EP2INFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R3
EP3INFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R4
SUDFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R5
EP0BC
0
b6
b5
b4
b3
b2
b1
b0
RSC
R6
EP1OUTBC
0
b6
b5
b4
b3
b2
b1
b0
RSC
R7
EP2INBC
0
b6
b5
b4
b3
b2
b1
b0
RSC
R8
EP3INBC
0
b6
b5
b4
b3
b2
b1
b0
RSC
R9
EPSTALLS
STLEP1OUT
STLEP0OUT
0
ACKSTAT
STLSTAT
STLEP3IN
STLEP2IN
EP3DISAB
EP2DISAB
EP1DISAB
CTGEP3IN
CTGEP2IN CTGEP1OUT
R11 EPIRQ
0
0
R12 EPIEN
0
0
SUDAVIE
IN3BAVIE
IN2BAVIE
OUT1DAVIE
OUT0DAVIE
URESDNIRQ
VBUSIRQ
NOVBUSIRQ
SUSPIRQ
URESIRQ
BUSACTIRQ
RWUDNIRQ OSCOKIRQ RC
SUSPIE
URESIE
BUSACTIE
RWUDNIE
SIGRWU
0
0
RSC
R10 CLRTOGS
R13 USBIRQ
URESDNIE
VBUSIE
NOVBUSIE
R15 USBCTL
HOSCSTEN
VBGATE
CHIPRES
R16 CPUCTL
PULSEWID1 PULSEWID0
EP3INAK
EP2INAK
STLEP0IN RSC
0
RSC
SUDAVIRQ IN3BAVIRQ IN2BAVIRQ OUT1DAVIRQ OUT0DAVIRQ IN0BAVIRQ RC
R14 USBIEN
R17 PINCTL
0
PWRDOWN CONNECT
IN0BAVIE
RSC
OSCOKIE RSC
0
0
0
0
0
IE
RSC
EP0INAK
FDUPSPI
INTLEVEL
POSINT
GPXB
GPXA
RSC
R18 REVISION
0
0
0
0
0
0
0
1
R
R19 FNADDR
0
b6
b5
b4
b3
b2
b1
b0
R
R20 IOPINS1
GPIN3
GPIN2
GPIN1
GPIN0
GPOUT3
GPOUT2
GPOUT1
GPOUT0
RSC
R21 IOPINS2
GPIN7
GPIN6
GPIN5
GPIN4
GPOUT7
GPOUT6
GPOUT5
GPOUT4
RSC
R22 GPINIRQ
GPINIRQ7
GPINIRQ6
GPINIRQ5
GPINIRQ4
GPINIRQ3
GPINIRQ2
GPINIRQ1
GPINIRQ0 RSC
R23 GPINIEN
GPINIEN7
GPINIEN6
GPINIEN5
GPINIEN4
GPINIEN3
GPINIEN2
GPINIEN1
GPINIEN0 RSC
R24 GPINPOL
GPINPOL4 GPINPOL3
GPINPOL2
GPINPOL1
GPINPOL0 RSC
0
0
GPINPOL7
GPINPOL6
GPINPOL5
R25 —
0
0
0
R26 —
0
0
0
0
0
0
0
R27 MODE
0
0
0
SEPIRQ
0
0
0
R28 —
0
0
0
0
0
0
0
0
—
R29 —
0
0
0
0
0
0
0
0
—
R30 —
0
0
0
0
0
0
0
0
—
R31 —
0
0
0
0
0
0
0
0
—
0
0
ᓖ2bǖbdd! )bddftt*ܭာTQJᓍ఼ᒜषᆰࡀࡼऱါă
S! >! ࣗǗSD! >! ༹ࣗ߹ǗSTD! >! ࣗLjᒙᆡ༹߹ă
࣪S )ᒑࣗ*ࡀቖ્ݙᎌྀੜᔫă
࣪SDᆡ)༹ࣗ߹*ቖ2༹߹কᆡă
࣪SDᆡቖഃ્ݙᎌྀੜᔫă
8
_______________________________________________________________________________________
0
—
0
—
HOST = 0 RSC
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
ܭ3/! ᓍ૦ෝါሆ)IPTU > 2*ࡼNBY4532Fࡀ፯ስ)ᓖ3*
REG
b7
b6
b5
b4
b3
b2
b1
b0
acc
R0
—
NAME
0
0
0
0
0
0
0
0
—
R1
RCVFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R2
SNDFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R3
—
0
0
0
0
0
0
0
0
—
R4
SUDFIFO
b7
b6
b5
b4
b3
b2
b1
b0
RSC
R5
—
0
0
0
0
0
0
0
0
—
R6
RCVBC
0
BC6
BC5
BC4
BC3
BC2
BC1
BC0
RSC
R7
SNDBC
0
BC6
BC5
BC4
BC3
BC2
BC1
BC0
RSC
R8
—
0
0
0
0
0
0
0
0
—
R9
—
0
0
0
0
0
0
0
0
—
R10 —
0
0
0
0
0
0
0
0
—
R11 —
0
0
0
0
0
0
0
0
—
R12 —
0
0
0
0
0
0
0
0
—
R13 USBIRQ
0
VBUSIRQ
NOVBUSIRQ
0
0
0
0
OSCOKIRQ
RC
R14 USBIEN
0
VBUSIE
NOVBUSIE
0
0
0
0
OSCOKIE
RSC
0
0
CHIPRES
PWRDOWN
0
0
0
0
RSC
0
0
0
0
0
IE
RSC
R15 USBCTL
R16 CPUCTL
R17 PINCTL
R18 REVISION
R19 —
R20 IOPINS1
PULSEWID1 PULSEWID0
EP3INAK
EP2INAK
EP0INAK
FDUPSPI
INTLEVEL
POSINT
GPXB
GPXA
RSC
0
0
0
0
0
0
0
1
R
0
0
0
0
0
0
0
0
—
GPIN3
GPIN2
GPIN1
GPIN0
GPOUT3
GPOUT2
GPOUT1
GPOUT0
RSC
R21 IOPINS2
GPIN7
GPIN6
GPIN5
GPIN4
GPOUT7
GPOUT6
GPOUT5
GPOUT4
RSC
R22 GPINIRQ
GPINIRQ7
GPINIRQ6
GPINIRQ5
GPINIRQ4
GPINIRQ3
GPINIRQ2
GPINIRQ1
GPINIRQ0
RC
R23 GPINIEN
GPINIEN7
GPINIEN6
GPINIEN5
GPINIEN4
GPINIEN3
GPINIEN2
GPINIEN1
GPINIEN0
RSC
R24 GPINPOL
GPINPOL7
GPINPOL6
GPINPOL5
GPINPOL4
GPINPOL3
GPINPOL2
GPINPOL1
GPINPOL0
RSC
R25 HIRQ
HXFRDNIRQ
FRAMEIRQ
CONNIRQ
SUSDNIRQ
SNDBAVIRQ
RCVDAVIRQ
RSMREQIRQ
BUSEVENTIRQ
RC
R26 HIEN
HXFRDNIE
FRAMEIE
CONNIE
SUSDNIE
SNDBAVIE
RCVDAVIE
RSMREQIE
BUSEVENTIE
RSC
R27 MODE
DPPULLDN
DMPULLDN
DELAYISO
SEPIRQ
SOFKAENAB
HUBPRE
SPEED
HOST = 1
RSC
0
b6
b5
b4
b3
b2
b1
b0
RSC
R29 HCTL
SNDTOG1
SNDTOG0
RCVTOG1
RCVTOG0
SIGRSM
BUSSAMPLE
FRMRST
BUSRST
LS
R30 HXFR
HS
ISO
OUTNIN
SETUP
EP3
EP2
EP1
EP0
LS
R31 HRSL
JSTATUS
KSTATUS
HRSLT3
HRSLT2
HRSLT1
HRSLT0
R
R28 PERADDR
SNDTOGRD RCVTOGRD
_______________________________________________________________________________________
9
NBY4532F
ܭ2/! ᅪෝါሆ)IPTU > 1*ࡼNBY4532Fࡀ፯ስ)ᓖ2bĂ2c*! )ኚ*
ᓖ2cǖᅪෝါሆLjNBY4532F߹೫ሆᐐ༓ถᅪLjᒊቲᎧNBY4531Fሤᄴࡼถǖ
2*! S27ቤᐐQVMTFXJE1ਜ਼QVMTFXJE2ᆡ఼ᒜܟዘᒦࣥෝါሆࡼJOU൴ߡࣞ)ᅄ23*ăNBY4531Fᒦᑚቋᆡ෦ཱྀᒙᆐ21/7μtă
3*! S32ቤᐐ႐ৈHQJPᆡă
4*! S33ਜ਼S34ᄗଝᄰၒྜྷ୭ᒗᒦࣥᇹᄻăS35఼ᒜܟዘቶă
5*! S38఼ᒜᅪ0ᓍ૦ෝါਜ਼TFQJSRᆡă
6*! ࡩᆡ\HQYC;HQYB^ > \2;1^༦ᆡTFQJSR > 2! )S385ᆡ*ဟLjHQYၒ߲ࡼCVTBDUቧۻᄐધᆐऔৈJSRቧLjᓜ᎖HQJO୭
ޘညᒦࣥă
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
ܭ3/! ᓍ૦ෝါሆ)IPTU > 2*ࡼNBY4532Fࡀ፯ስ)ᓖ3*! )ኚ*
ᓖ3ǖbdd! )bddftt*ܭာTQJᓍ఼ᒜषᆰࡀࡼऱါă
S! >! ࣗǗSD! >! ༹ࣗ߹ǗSTD! >! ࣗĂᒙᆡ༹߹ǗMT! >! ଝᏲଶހă
࣪S )ᒑࣗ*ࡀቖ્ݙᎌྀੜᔫă
࣪SDᆡ)༹ࣗ߹*ቖ2༹߹কᆡă
࣪SDᆡቖഃ્ݙᎌྀੜᔫă
ቖMTࡀ᎖ࡀดྏࣅጙࠨᓍ૦ݷᔫă
`````````````````````````````````````````````````````````````````````````` ୭ᒙ
XI
VCC
VBCOMP
D+
D-
GND
INT
GPX
24
23
22
21
20
19
18
17
GPX
21
INT
D+
22
D-
VBCOMP
23
GND
VCC
24
20
19
18
17
XO 25
16
MOSI
XO 25
16
MOSI
GPIN0 26
15
MISO
GPIN0 26
15
MISO
GPIN1 27
14
SS
GPIN1 27
14
SS
13
SCLK
GPIN2 28
13
SCLK
12
RES
GPIN3 29
12
RES
11
GPOUT7
GPIN4 30
11
GPOUT7
10
GPOUT6
9
GPOUT5
GPIN2 28
MAX3421E
GPIN3 29
GPIN4 30
GPIN5 31
GPIN6 32
+
GPIN7
VL
GND
GPOUT0
GPOUT1
GPOUT2
GPOUT3
GPOUT4
1
2
3
4
5
6
7
8
GPOUT4
8
GPOUT3
7
GPOUT2
6
+
GPOUT1
5
GPIN6 32
GPOUT0
4
GPIN5 31
GPOUT5
GND
3
GPOUT6
9
MAX3421E
VL
2
10
*EP
GPIN7
1
TQFP
(5mm x 5mm)
10
XI
TOP VIEW
TOP VIEW OF BOTTOM LEADS
TQFN
(5mm x 5mm)
*EXPOSED PADDLE CONNECTED TO GROUND
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
Continuous Power Dissipation (TA = +70°C)
32-Pin TQFN (derate 21.3mW/°C above +70°C) .......1702mW
32-Pin TQFP (derate 13.1mW/°C above +70°C)........1047mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
)WDD >!,4W!up!,4/7W-!WM >!,2/5W!up!,4/7W-!UB >!UNJO up!UNBY-!vomftt!puifsxjtf!opufe/!Uzqjdbm!wbmvft!bsf!bu!WDD >!,4/4W-!WM >!,3/6WUB >!,36°D/*!)Opuf!4*
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
3.0
3.3
3.6
V
Logic-Interface Voltage VL
VL
1.4
3.6
V
VCC Supply Current
ICC
45
mA
2.35
10
mA
DC CHARACTERISTICS
Supply Voltage VCC
VL Supply Current
IL
VCC Supply Current During Idle
VCC Suspend Supply Current
VL Suspend Supply Current
ICCID
ICCSUS
ILSUS
Continuously transmitting on D+ and D- at
12Mbps, CL = 50pF on D+ and D- to GND,
CONNECT = 0
SCLK toggling at 20MHz, SS = low,
GPIN7–GPIN0 = 0
D+ = high, D- = low
CONNECT = 0, PWRDOWN = 1 (Note 4)
CONNECT = 0, PWRDOWN = 1
8.7
15
mA
0.031
5
mA
20
50
μA
LOGIC-SIDE I/O
MISO, GPOUT7–GPOUT0, GPX,
INT Output High Voltage
MISO, GPOUT7–GPOUT0, GPX,
INT Output Low Voltage
VOH
ILOAD = +1mA
VL - 0.4
ILOAD = +5mA, VL < 2.5V (Note 5)
VL - 0.45
ILOAD = +10mA, VL ≥ 2.5V (Note 5)
VL - 0.4
ILOAD = -1mA
VOL
0.4
ILOAD = -20mA, VL < 2.5V (Note 5)
0.6
ILOAD = -20mA, VL ≥ 2.5V (Note 5)
0.4
SCLK, MOSI, GPIN7–GPIN0, SS,
RES Input High Voltage
VIH
SCLK, MOSI, GPIN7–GPIN0, SS,
RES Input Low Voltage
VIL
SCLK, MOSI, SS, RES Input
Leakage Current
IIL
-1
RGPIN
10
GPIN7–GPIN0 Pullup Resistor to VL
V
2/3 x VL
V
V
20
0.4
V
+1
μA
30
kΩ
TRANSCEIVER SPECIFICATIONS
Differential-Receiver Input
Sensitivity
|VD+ - VD-|
0.2
V
______________________________________________________________________________________
11
NBY4532F
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
VCC ......................................................................... -0.3V to +4V
VL .............................................................................-0.3V to +4V
VBCOMP .................................................................-0.3V to +6V
D+, D-, XI, XO ............................................-0.3V to (VCC + 0.3V)
SCLK, MOSI, MISO, SS, RES, GPOUT7–GPOUT0,
GPIN7–GPIN0, GPX, INT ..........................-0.3V to (VL + 0.3V)
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
ELECTRICAL CHARACTERISTICS (continued)
)WDD >!,4W!up!,4/7W-!WM >!,2/5W!up!,4/7W-!UB >!UNJO up!UNBY-!vomftt!puifsxjtf!opufe/!Uzqjdbm!wbmvft!bsf!bu!WDD >!,4/4W-!WM >!,3/6WUB >!,36°D/*!)Opuf!4*
PARAMETER
SYMBOL
CONDITIONS
Differential-Receiver CommonMode Voltage
MIN
TYP
0.8
Single-Ended Receiver Input Low
Voltage
VIL
Single-Ended Receiver Input
High Voltage
VIH
MAX
UNITS
2.5
V
0.8
V
2.0
Single-Ended Receiver
Hysteresis Voltage
V
0.2
D+, D- Output Low Voltage
VOL
RL = 1.5kΩ from D+ to 3.6V
D+, D- Output High Voltage
VOH
RL = 15kΩ from D+ and D- to GND
Driver Output Impedance
Excluding External Resistor
(Note 5)
D+ Pullup Resistor
D+, D- Pulldown Resistor
2.8
V
0.3
V
3.6
V
2
7
11
Ω
REXT = 33Ω
1.425
1.5
1.575
kΩ
REXT = 33Ω
14.25
15
15.75
kΩ
D+, D- Input Impedance
300
kΩ
ESD PROTECTION (D+, D-, VBCOMP)
Human Body Model
1μF ceramic capacitors from VBCOMP and
VCC to GND
±15
kV
IEC 61000-4-2 Air-Gap Discharge
1μF ceramic capacitors from VBCOMP and
VCC to GND
±12
kV
IEC 61000-4-2 Contact Discharge
1μF ceramic capacitors from VBCOMP and
VCC to GND
±8
kV
Thermal-Shutdown Low-to-High
+160
°C
Thermal-Shutdown High-to-Low
+140
°C
THERMAL SHUTDOWN
CRYSTAL OSCILLATOR SPECIFICATIONS (XI, XO)
XI Input High Voltage
VCC
V
XI Input Low Voltage
2/3 x VCC
0.4
V
XI Input Current
10
μA
XI, XO Input Capacitance
3
pF
VBCOMP COMPARATOR SPECIFICATIONS
VBCOMP Comparator Threshold
VTH
VBCOMP Comparator Hysteresis
VHYS
VBCOMP Comparator Input
Impedance
12
RIN
1.0
2.0
375
100
______________________________________________________________________________________
3.0
V
mV
kΩ
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
)WDD >!,4W!up!,4/7W-!WM >!,2/5W!up!,4/7W-!UB >!UNJO up!UNBY-!vomftt!puifsxjtf!opufe/!Uzqjdbm!wbmvft!bsf!bu!WDD >!,4/4W-!WM >!,3/6WUB >!,36°D/*!)Opuf!4*
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
USB TRANSMITTER TIMING CHARACTERISTICS (FULL-SPEED MODE)
D+, D- Rise Time
tRISE
CL = 50pF, Figures 8 and 9
4
20
ns
D+, D- Fall Time
tFALL
CL = 50pF, Figures 8 and 9
4
20
ns
Rise-/Fall-Time Matching
CL = 50pF, Figures 8 and 9 (Note 5)
90
110
%
Output-Signal Crossover Voltage
CL = 50pF, Figures 8 and 9 (Note 5)
1.3
2.0
V
USB TRANSMITTER TIMING CHARACTERISTICS (HOST LOW-SPEED MODE)
D+, D- Rise Time
tRISE
200pF ≤ CL ≤ 600pF, Figures 8 and 9
75
300
ns
D+, D- Fall Time
tFALL
200pF ≤ CL ≤ 600pF, Figures 8 and 9
75
300
ns
Rise-/Fall-Time Matching
200pF ≤ CL ≤ 600pF, Figures 8 and 9
80
120
%
Output-Signal Crossover Voltage
200pF ≤ CL ≤ 600pF, Figures 8 and 9
1.3
2.0
V
SPI BUS TIMING CHARACTERISTICS (VL = 2.5V) (Figures 10 and 11) (Note 6)
VL > 2.5V
38.4
VL = 1.4V
77.7
ns
Serial Clock (SCLK) Period (Note 7)
tCP
SCLK Pulse-Width High
tCH
17
ns
SCLK Pulse-Width Low
tCL
17
ns
SS Fall to MISO Valid
tCSS
20
ns
SS Leading Time Before the First
SCLK Edge
tL
30
ns
SS Trailing Time After the Last
SCLK Edge
tT
30
ns
Data-In Setup Time
tDS
5
ns
Data-In Hold Time
tDH
10
ns
SS Pulse High
tCSW
200
ns
SCLK Fall to MISO Propagation
Delay
tDO
14.2
ns
SCLK Fall to MOSI Propagation
Delay
tDI
14.2
ns
SCLK Fall to MOSI Drive
tON
3.5
ns
SS High to MOSI High
Impedance
tOFF
20
ns
SUSPEND TIMING CHARACTERISTICS
Time-to-Enter Suspend
PWRDOWN = 1 to oscillator stop
Time-to-Exit Suspend
PWRDOWN = 1 to 0 to OSCOKIRQ (Note 8)
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
5
3
μs
ms
Parameters are 100% production tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Redesign in progress to meet USB specification.
Guaranteed by bench testing. Limits are not production tested.
At VL = 1.4V to 2.5V, derate all the SPI timing characteristics by 50%. Not production tested.
The minimum period is derived from SPI timing parameters.
Time-to-exit suspend is dependent on the crystal used.
______________________________________________________________________________________
13
NBY4532F
TIMING CHARACTERISTICS
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
`````````````````````````````````````````````````````````````````` ހ၂࢟വਜ਼ဟኔᅄ
TEST
POINT
tFALL
tRISE
MAX3421E
33Ω
D+ OR D-
VOH
90%
CL
15kΩ
10%
VOL
ᅄ:/! E,0E.ୣഗހဟࡼঌᏲ༽ౚ
ᅄ9/! ဍਜ਼ሆଢ଼ဟମ
tL
tCSS
SS
tCSW
tCH
tCL
2
1
8
10
9
tT
16
SCLK
tDS
tCP
MOSI
tDH
tDO
HIGH
IMPEDANCE
MISO
HIGH
IMPEDANCE
ᅄ21/! TQJᔐሣဟኔᅄ)ཝၷෝါLjTQJෝါ)1-1**
tL
tCSW
SS
tCL
2
1
8
tCH
10
9
tT
16
SCLK
tCP
tDS
HI-Z
MOSI
tDH
MISO
tON
tDI
HIGH
IMPEDANCE
tOFF
HIGH
IMPEDANCE
NOTES:
1) DURING THE FIRST 8 CLOCKS CYCLES, THE MOSI PIN IS HIGH IMPEDANCE AND THE SPI MASTER DRIVES DATA ONTO THE MOSI PIN. SETUP AND HOLD TIMES ARE THE SAME AS
FOR FULL-DUPLEX MODE.
2) FOR SPI WRITE CYCLES, THE MOSI PIN CONTINUES TO BE HIGH IMPEDANCE AND THE EXTERNAL MASTER CONTINUES TO DRIVE MOSI.
3) FOR SPI READ CYCLES, AFTER THE 8TH CLOCK-FALLING EDGE, THE MAX3421E STARTS DRIVING THE MOSI PIN AFTER TIME tON. THE EXTERNAL MASTER MUST TURN
OFF ITS DRIVER TO THE MOSI PIN BEFORE tON TO AVOID CONTENTION. PROPAGATION DELAYS ARE THE SAME AS FOR THE MOSI PIN IN FULL-DUPLEX MODE.
ᅄ22/! TQJᔐሣဟኔᅄ)ۍၷෝါLjTQJෝါ)1-1**
14
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
MAX3421E toc01
EYE DIAGRAM
4
D+ AND D- (V)
3
2
1
0
-1
0
10
20
30
40
50
60
70
80
TIME (ns)
``````````````````````````````` ሮᇼႁී
NBY4532F۞೫ဣሚVTC 3/1ܪᓰཝႥVTCᅪLj
ཝ0ࢅႥᓍ૦ჅኊࡼჅᎌၫᔊ൝ਜ਼ෝผ࢟വăᄰਭቖ
NPEFࡀ)S38*ᒦࡼIPTUᆡLjభጲኡᐋNBY4532F
ᔫᏴᓍ૦ᅪऱါăNBY4532Fดᒙᎌ၃खLj݀Ᏼ
E,ĂE.ਜ਼WCDPNQ୭ૹ߅೫±26lWࡼFTEۣઐăE,
ሣૹ߅೫భ༤ધࡼ2/6lΩ౯࢟ᔜLjE,ਜ਼E.ሣૹ߅೫
భ༤ધࡼ26lΩሆ౯࢟ᔜăྀੜTQJᓍ఼ᒜ࣒భᄰਭTQJ
࠭ୈాᎧNBY4532Fᄰቧ)ᔫ᎖TQJෝါ)1-1*)2-2**ă
TQJᓍ఼ᒜᄰਭࣗቖNBY4532Fดࡼݝࡀ࣪ቲ
षᆰăገᅲ߅ጙࠨ࢜ቯࡼၫࠅ႙Lj၅ሌኊገቖጙৈᔊ
ஂࢾࡀᒍਜ਼ࠅ႙ऱሶLjઁဵገ߲ࣗቖ
ྜྷܪࡀดݝGJGPࡼၫᔊஂă
ᏴᅪෝါሆLjNBY4532F۞495ᔊஂࡼ࢛࣡દߡࡀ
Lj᎖ጲሆ࢛࣡ǖ
• FQ1ǖ75ᔊஂࡼၷሶDPOUSPM࢛࣡
• FQ2ǖ3! y! 75ᔊஂࡼၷદࡀCVML0JOU! PVU࢛࣡
• FQ3ǖ3! y! 75ᔊஂࡼၷદࡀCVML0JOU! JO࢛࣡
• FQ4ǖ75ᔊஂCVML0JOU! JO࢛࣡
ኡᐋFQ2ĂFQ3ĂFQ4ᔫᆐCVMLથဵJOUFSSVQU࢛࣡Ljᅲ
ཝན᎖ඒਭ߈ᒦTQJᓍ఼ᒜऩૄVTCᓍ૦ࡼ࢛࣡
හၤ९ă
Ᏼᓍ૦ෝါሆLjNBY4532F ۞ 367 ᔊஂࡼख႙ਜ਼၃
GJGPࡀǖ
• TOEGJGPǖख႙GJGPĊĊၷદߡ75ᔊஂGJGP
• SDWGJGPǖ၃GJGPĊĊၷદߡ75ᔊஂGJGP
ᓍ૦GJGPถ৫ጲཝႥࢅႥሶᅪख႙TFUVQĂCVMLĂ
JOUFSSVQUਜ਼JTPDISPOPVT༿ཇăNBY4532Fถ৫ฃ
ᒇྜྷᄰਭVTCૹሣྜྷࡼࢅႥ۸ăᎅ᎖ࡍݝॊ
ดݝಯྀᇗᎅNBY4532Fᅲ߅Ljྏޟऻ߈ܠጵăTQJ
ᓍ఼ᒜᔫᆐጙৈ࢜ቯᓍ૦ࡼݷᔫ଼છᆐǖᒙ۸
ᒍਜ਼࢛࣡Ljख႙ጙৈ۞݀ࢀࡗීܭᅲ߅ࡼᒦࣥăઁ
ଶࠅއ႙உਫܪᒔᆡጲཀྵࢾᅪࡼሰ።ăᔈࣅည߅ᑷ
ܪဤ)ཝႥTPG۞ࢅႥۣߒ൴ߡ*Lj݀Ᏼሤ࣪᎖ᑚቋܪᒔ
ࡩࡼဟరॊख۞ă
NBY4532Fࡼࡀᔝਜ਼TQJాږᑍଢ଼ࢅTQJᄰቧࡼ
ܪቲ೫ᎁછăࡩኊገTQJᓍ఼ᒜᄋVTCॲᇗဟLjᒦ
ࣥၒ߲JOUሶख߲ቧLjಿྙࡩᎌ۞ࡵࡉĂᎌ۞ख߲
ᓍ૦ਂૂআᔐሣࣅဟăၷદߡGJGPᏤVTCਜ਼TQJ
ాᄴဟࠅ႙ၫLjᎌᓐ᎖ۣᑺࡒă
______________________________________________________________________________________
15
NBY4532F
`````````````````````````````````````````````````````````````````````` ࢜ቯᔫᄂቶ
(VCC = +3.3V, VL = +3.3V, TA = +25°C.)
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
WDD
ဗଝ4/4W࢟Ꮞ᎖WDDLjጲདࣅVTC၃खᔫăణத
WDD ୭Ljጙᒑ2/1μGࡼჿࠣ࢟ྏവWDD ࡵHOEă
WM
WM ဵTQJాਜ਼Ⴥᎌၫᔊၒྜྷૺၒ߲ࡼݬఠ࢟ຳăభ
WM ೌࡵᇹᄻࡼ൝࢟Ꮞăᎅ᎖ด࢟ݝຳᓞધਜ਼WM
୭ࡼࡀᏴLjTQJాਜ਼Ⴥᎌᄰၒྜྷૺၒ߲ถ৫ᔫᏴ
2/5Wᒗ4/7Wࡼᇹᄻ࢟ኹሆă
WCDPNQ
NBY4532Fด߅ૹݝ೫ጙৈWCVT ଶހLjWCDPNQဵকଶ
ހࡼၒྜྷăWCDPNQ୭భߌ၊ࡉ7Wࡼၒྜྷ࢟ኹă
ጙᒑ2/1μGჿࠣ࢟ྏവWCDPNQࡵHOEăWCDPNQᏴ
በຢดೌۻݝᒗጙৈ࢟ኹ୷܈LjጲܣTQJᓍ఼ᒜଶ
)ހᄰਭᒦࣥއኯࡀᆡ*! WCVT ࡼଝ࢟༽ౚăWCDPNQ
ݙᔫᆐྀੜNBY4532Fด࢟ݝവࡼ࢟ᏎăWCDPNQᄰਭ
SJO ሆ౯ᒗ) Fmfdusjdbm! Dibsbdufsjtujdt*ă
ᅪෝါሆࡼWCDPNQ
WCDPNQᏴበຢดೌۻݝᒗጙৈ࢟ኹ୷܈LjጲܣTQJ
ᓍ఼ᒜଶހWCVT ࡼଝ࢟༽ౚăোVTC! 3/1ਖपLjᔈ
࢟ࡼVTC۸ᏴVTCᓍ૦ਈܕWCVT ࢟ᏎઁLjܘኍ༤ࣥE,
ࡼ 2/6lΩ ౯࢟ᔜăಽ VTCDUM ࡀ)S26*ᒦࡼ
WCHBUFᆡLjNBY4532Fดݝ൝భጲኡᐋᔈࣅ༤ࣥE,
ࡼ2/6lΩ౯࢟ᔜăVTCDUMࡀ)S26*ᒦࡼWCHBUFਜ਼
DPOOFDUᆡLjᏳଝWCDPNQ୷܈ࡼၒ߲)WCVT`EFU*Lj
ྯᑗৢᄴ఼ᒜᓹᑚৈWDD ਜ਼E,ମࡼ౯࢟ᔜLjྙܭ4ਜ਼
ถౖᅄ ჅာăᓖፀLjྙਫWCHBUF > 2༦WCVT`EFU > 1Lj
กඐᇄ൙DPOOFDUᆡࡼᒙྙੜLj౯࢟ᔜ્࣒ࣥۻఎă
ྙਫNBY4532FჅᏴࡼ۸ဵᎅᔐሣ࢟ࡼ)ᄰਭೌᒗ
WDD ࡼ,4/4Wᆮኹ*LjNBY4532FࡼWCDPNQၒྜྷభᔫᆐ
ᄰၒྜྷဧăᎌਈᑚᒬजࡼሮ༽༿።ቧᇦݝॊă
16
ܭ4/! ᅪෝါሆดݝ౯࢟ᔜࡼ఼ᒜ
CONNECT
VBGATE
VBUS_DET
PULLUP
0
X
X
Not Connected
1
0
X
Connected
1
1
0
Not Connected
1
1
1
Connected
ᓍ૦ෝါሆࡼWCDPNQ
NBY4532FᏴᓍ૦ෝါဟᇄኊଶހWCVTᓨზăᏴࠥ༽
ౚሆLjWCDPNQၒྜྷభᔫᆐᄰၒྜྷဧă
E,ਜ਼E.
ดݝVTCཝ0ࢅႥ၃खᄰਭၷሶၫ୭E,ਜ਼E.߲ă
ᑚቋ୭ૹ߅೫±26lW FTEۣઐăE,ਜ਼E.።ᄰਭ44Ω
±2&ࠈೊ࢟ᔜೌࡵĐCđቯVTCೌă
ᅪෝါሆࡼE,ਜ਼E.
ᅪෝါሆE,ਜ਼E.ᄰਭࠈೊ࢟ᔜೌࡵĐCđቯVTCೌ
ăభ༤ધࡼ2/6lΩ౯࢟ᔜᏴበຢดೌݝᒗE,ă
ᓍ૦ෝါሆࡼE,ਜ਼E.
ᓍ૦ෝါሆE,ਜ਼E.ᄰਭࠈೊ࢟ᔜೌࡵĐBđቯVTCೌ
ăభ༤ધࡼ26lΩሆ౯࢟ᔜᏴበຢดೌݝᒗE,ਜ਼E.ă
NPEFࡀ)S38*ᒦࡼEQQVMMEOਜ਼ENQVMMEOᆡ఼ᒜ
ᓹE,ਜ਼E.ࡵHOEᒄମࡼೌăᔫᆐᓍ૦ဧဟLjᑚቋ
ᆡᆐ2Ljᄰሆ౯࢟ᔜăࡩᎌᅪྜྷۻ߹ގဟLjᓍ
૦ᒦࣥᆡDPOOJSRభሶTQJᓍ఼ᒜख߲সவă
YJਜ਼YP
YJਜ਼YP୭ጙৈᅪࡼݝ23NI{ᄏೌᒗดݝᑩ
࢟വăYJဵᄏᑩࡼၒྜྷLjYPဵၒ߲ă23NI{
±1/36&ࡼ݀ೊቕᑩᄏࡼጙ࣡ೌᒗYJLjጙ࣡ᒗYPă
ᏴYJਜ਼YP࣪ೌঌᏲ࢟ྏ)ᔢࡍ31qG*ăጐభጙৈ
ᅪࡼݝ23NI{ ±1/36&ဟᒩདࣅYJăྙਫᅪݝဟᒩདࣅYJLj
ᐌॳహYPăᅪݝဟᒩܘኍ൸ᔗ Fmfdusjdbm Dibsbdufsjtujdt ܭᒦ
Ⴥහၤࡼ࢟ኹᄂቶăดݝ൝ဵዘ߿खࡼăᅪݝဟᒩ
።কᎌຳ61&ࡼᐴహ܈ă
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
CLEAR
IRQ
FIRST IRQ
ACTIVE
CLEAR
FIRST IRQ,
SECOND
,
IRQ STILL
ACTIVE
ܭ5/! ᎅQVMTFXJE2ਜ਼QVMTFXJE1ᒙࡼ
JOUၒ߲൴
CLEAR
LAST
PENDING
IRQ
INTLEVEL = 1
POSINT = X
INT
INTLEVEL = 0
POSINT = 0
INTLEVEL = 0
POSINT = 1
INT
(1)
(2)
INT
(1) WIDTH DETERMINED BY TIME TAKEN TO CLEAR THE IRQ.
(2) WIDTH DETERMINED BY PULSEWID1 AND PULSEWID0 BITS IN CPUCTL (R16) REGISTER.
ᅄ23/! ݙᄴJOUMFWFMਜ਼QPTJOUᆡᒙဟJOU୭ࡼܭሚ
SFT
དࣅRESᆐࢅభ߿खNBY4532Fࡼበຢআᆡăበຢআᆡ
߹QJODUM )S28*ĂVTCDUM )S26*ਜ਼TQJ൝ᒄᅪࡼჅᎌ
ࡀᒙᆐᔈࡼ෦ཱྀᓨზăበຢআᆡ໐ମჅᎌGJGPࡼด
ྏᆚᒀăདࣅRESᆐ࢟ຳభဧNBY4532Fᅙಭበຢআᆡă
RES൴ߡᔢభᒗ311otăਈ᎖NBY4532Fࡼআᆡᄂቶݬ
ୈআᆡጙஂă
JOU
ࡩᎌVTCူୈखညLjኊገTQJᓍ఼ᒜᓖፀဟLjNBY4532F
ᄰਭJOUၒ߲୭ख߲ᒦࣥቧăથభጲJOUᒙᆐࡩ
ᎌྀੜᄰၒྜྷ)HQJO1–HQJO8*߿ۻखဟ)ሮ༽༿
HQJO8–HQJO1 ݝॊ*ख߲ᒦࣥăTQJ ᓍ఼ᒜܘኍ
DQVDUMࡀ)S27*ᒦࡼJFᆡᒙᆡऱభ૮JOUถăྦ
JFᆡ༹ۻഃLjJOUݙᔫ)࢟ຳෝါሆᆐఎവLjঌዘෝါᆐ
Ljᑵዘෝါᆐࢅ*ăJOUᏴ࢟ጟဪበຢআᆡઁጐࠀ᎖
ݙᔫᓨზ)JF > 1*ă
JOU୭భጲᒙᆐᅎᅴါധఎവၒ߲ăᒙᆡQJODUM
ࡀ)S28*ᒦࡼJOUMFWFMᆡభJOU߈ܠᆐࢅ࢟ຳᎌ
ࡼധఎവၒ߲ăᑚᒬᒙኊገᅪࡵݝW M ࡼ౯࢟ᔜă
Ᏼ࢟ຳෝါሆLjྦᎌྀੜᒦࣥܪᒔۻᒙᆡLjNBY4532F
્དࣅJOUᆐࢅăྙਫᎌࣶৈᒦࣥࡿۻLjᐌJOUᒑᎌᏴ
TQJᓍ఼ᒜ༹߹೫ᔢઁጙৈᎌࡼᒦࣥ༿ཇઁܤ્ݣᆐ
ᇄ)ᅄ 23*ăᏴ࢟ຳෝါሆLjQJODUM ࡀ)S28*ᒦࡼ
QPTJOUᆡ࣪᎖JOUᎌᔫă
PULSEWID1
PULSEWID0
INT PULSE WIDTH (μs)
0
0
10.6
0
1
5.3
1
0
2.6
1
1
1.3
༹ഃJOUMFWFMᆡᐌJOU߈ܠᆐܟዘෝါࡼᅎᅴါၒ߲ă
ᄰਭQJODUMࡀ)S28*ᒦࡼQPTJOUᆡభ߈ܠࢾᎌ
ዘăᏴܟዘෝါᒦLjྦᎌᒦࣥ༿ཇखညLjᑗ෭ৈᒦࣥ
༿ཇጯ߹༹ۻLjࡣ྆ࡀᏴჇࡿۻࡼᒦࣥ༿ཇLj
NBY4532F્ޘညጙৈݬᑍ᎖W M ࡼᄢܤዘ)ᅄ23*ăᏴ
QJODUMࡀ)S28*ᒦᒙᆡQPTJOUᆡᐌኡᐋJOUᆐဍዘ
ᎌLj༹ഃQPTJOUᆡᐌኡᐋሆଢ଼ዘᎌJOUăDQVDUM
ࡀ)S27*ᒦࡼQVMTFXJE2ਜ਼QVMTFXJE1ᆡభ఼ᒜܟዘෝ
ါሆJOU൴ߡࡼࣞLjྙܭ5Ⴥာă
HQJO8–HQJO1
TQJᓍ఼ᒜᄰਭࣗནࡀJPQJOT2 )S31*ࡼ8ᆡࡵ5
ᆡݧዹHQJO4–HQJO1ࡼᓨზăHQJO8–HQJO5ࡼᓨზᄰਭࣗ
ནࡀJPQJOT3 )S32*ࡼ8ᆡࡵ5ᆡቲݧዹăሶᑚ
ቋᆡቖၫ્ݙᎌྀੜᔫă
ᇄ൙ᅪਜ਼ᓍ૦ෝါLj࣒ᎅྯৈࡀ఼ᒜᔈ᎖HQJO8–
HQJO1ࡼڭৈᒦࣥ༿ཇăࡀHQJOJSR )S33*ᎌڭৈ
HQJOၒྜྷࡼᒦࣥ༿ཇܪᒔăࡀHQJOJFO )S34*ᎌڭ
ৈ HQJO ᒦࣥᔈࣖೂࡼᒦࣥဧถᆡăࡀ HQJOQPM
)S35*఼ᒜᓹڭৈHQJOᒦࣥࡼܟዘቶăڭৈHQJOᒦࣥۻ
ଝྜྷNBY4532FᒦࣥᇹᄻᒦLjࡩᎌဧถᒦࣥ߿ۻखဟLj૾
భ࠭JOUၒ߲୭ख߲ᒦࣥቧăથభጲHQJOᒦࣥॊಭ
߲LjࣖᄰਭHQY୭ၒ߲LjᒑኊᒙTFQJSR > 2૾భă
ᑚዹభጲିቃᒦࣥॲᇗࡼዓߕLjፐᆐHQYၒ߲ࡼᒦࣥᏎဵ
ጯᒀࡼLjᒑኊއኯHQJOJSRࡀܣభཀྵࢾᒦࣥᏎăᓖፀ
HQJOQPMᒦࡼᆡ఼ᒜဧดݝĐᒦࣥࡿđ߿खᒙᆡࡼ
HQJOᄢܤዘLjऎऻJOUၒ߲ăJOU୭ࡼၒ߲ᄂቶ၊఼
᎖JOUMFWFMਜ਼QPTJOUࡀᆡLjᑵྙNBY4531Fጙዹă
ࡩHQY୭ۻᒙ߅HQJO JOUဟLjၒ߲ᄂቶਜ਼JOU୭
ጙዹă
______________________________________________________________________________________
17
NBY4532F
SINGLE
IRQ
SECOND
IRQ
ACTIVE
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
HQPVU8–HQPVU1
TQJᓍ఼ᒜᄰਭቖࡀJPQJOT2 )S31*ࡼ4ᆡࡵ1ᆡ
఼ᒜHQPVU4–HQPVU1ࡼᓨზăHQPVU8–HQPVU5ࡼᓨზ
భᄰਭቖࡀJPQJOT3 )S32*ࡼ4ᆡࡵ1ᆡቲ఼ᒜă
HQPVU8–HQPVU1ࡼ൝࢟ຳጲWM ࢟ኹᆐݬఠăྙᅄ24Ⴥ
ာLjᏴࣗནHQPVU8–HQPVU1Ⴥ࣪።ࡼᆡဟLjऩૄࡼဵด
ݝࡀᆡࡼᓨზLj݀ऻဣଔ୭ࡼᓨზăᏴ࣪෭ၒ߲
୭ᒊቲĐࣗ.ኀখ.ቖđݷᔫဟ)ಿྙMFEࡼ࿑ႄ*কᄂ࢛
੪ᎌLjፐᆐၒ߲୭ࡼঌᏲ્ݙ፬ሰࡀࡼ൝
ᓨზă
GPOUT
WRITE
GPOUT
READ
ᅄ24/! HQPVU4–HQPVU1ࡼࣗቖݷᔫ
FULL-SPEED
TIME FRAME
1ms
HQY
HQYဵᅎᅴၒ߲Ljดݝᎅጙৈ႐ᄰࡸࣶവআኡᐋၒ
߲ቧăHQYࡼ൝࢟ຳጲWM ᆐݬఠăTQJᓍ఼ᒜᄰਭ
QJODUMࡀ)S28*ᒦࡼHQYBਜ਼HQYCᆡኡᐋᇋᒬดݝቧ
ᒄጙLjᄰਭHQY୭ၒ߲Ljྙܭ6Ⴥာă
ܭ6/! HQYၒ߲ᓨზਜ਼HQYCĂHQYBᆡࡼਈᇹ
GPXB
GPXA
0
0
0
1
VBUS_DET
1
0
BUSACT/INIRQ*
1
1
SOF
GPOUT
PIN
REGISTER BIT
USB
PACKETS
GPX
FULL-SPEED
TIME FRAME
1ms
SOF
SOF
SOF
~50%
ᅄ25/! TPGෝါሆࡼHQYၒ߲
GPX PIN OUTPUT
OPERATE (Default State)
* ྙਫTFQJSR > 2
MOSI
SPI
CONTROLLER
• PQFSBUFǖࡩNBY4532FᏴ࢟ઁRESআᆡઁྜྷ
ᔫᓨზဟকቧܤăPQFSBUFᏴRESၒྜྷᆐ༦
ดݝ࢟আᆡ)QPS*ቧࠀ᎖ऻ߿खᓨზဟᎌă
PQFSBUFဵHQYࡼ෦ཱྀၒ߲ă
• WCVT`EFUǖWCVT`EFUဵWCDPNQ୷܈ࡼၒ߲ă
ᄰਭকቧઓభጲᒇପ၁WCVT ࡼᓨზă
• CVTBDUǖVTCᔐሣࣅᓨზᒎာቧ)ᎌ*ăࡩ
VTCᔐሣᎌᄰቧဟকቧᎌăᒑገପࡵހTZODᎮLj
CVTBDUቧ૾ۻᒙᆡăCVTBDUᏴᔐሣআᆡ໐ମLj
ᑗள಼೫43ᆡࡼޠKᓨზઁࢅܤă
MISO
MAX3421E
FDUPSPI = 1
MOSI
SPI
CONTROLLER
MISO
MAX3421E
FDUPSPI = 0 (DEFAULT)
ᅄ26/! NBY4532F! TQJၫ୭Ᏼཝၷ)ᅄ*ਜ਼ۍၷ)ሆᅄ*
ෝါሆࡼᔫ༽ౚ
18
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
MISO
NBY4532F
SS
SPI MODE 0,0 OR 1,1
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
D1
D0
*
SCLK
MODE 0,0
SCLK
MODE 1,1
MOSI
D7
D6
D5
D4
D3
D2
*
*MSB OF NEXT BYTE IN BURST MODE (SS REMAINS LOW)
ᅄ27/! TQJဟᒩෝါ
• JOJSRǖࡩNPEFࡀ)S38*ᒦࡼTFQJSRᆡۻᒙᆡဟLj
CVTBDUቧ࠭ۻJOUၒ߲ᒦབྷࢬLjྙਫHQY\C;B^ > 21Lj
HQYۻᔫᆐᓜ᎖HQJOᒦࣥࡼJSRၒ߲୭ăᏴࠥෝ
ါሆLjHQJO ᒦࣥஞ߲ሚᏴ HQY ୭LjऎݙᏳ߲ሚ᎖
JOUၒ߲୭ă
• TPGǖऱ݆ቧLjᑵዘᒎာVTCᑷࡼဪ࢛)ᅄ25*ă
NPTJ! )ᓍ߲࠭ྜྷ*ਜ਼NJTP! )ᓍྜྷ߲࠭*
TQJ ၫ୭ NPTJ ਜ਼ NJTP ࡼᔫᓨზ၊఼᎖ࡀᆡ
GEVQTQJ! )ཝၷTQJ*ࡼᒙăᅄ26መာ೫ೝᒬGEVQTQJ
ᆡᒙჅ࣪።ࡼᒙă
ཝၷෝါሆ)GEVQTQJ > 2*LjNPTJ ਜ਼ NJTP ဵࣖೂࡼLj
NJTP୭ஞࡩSSᆐࢅဟݣᎌདࣅăᏴࠥෝါሆLjఎဪࡼ
ڭৈ T D M L ዘ ) SS > 1 ᒄ ઁ * ෘ എ ᔊ ஂ ᄰ ਭ N P T J ጤ ྜྷ
NBY4532FLjᄴဟLjڭৈ VTC ᓨზᆡᄰਭ NJTP ۻጤ߲
NBY4532FăྙਫဵTQJቖᒲ໐LjஜႲෘഎᔊஂᒄઁࡼჅ
ᎌᔊஂ࣒ᄰਭNPTJۻጤྜྷNBY4532FLjᄴဟLj࠭NJTPጤ
߲ഃăྙਫဵTQJࣗᒲ໐LjखᅲෘഎᒄઁLjၫᔊஂᄰਭ
NJTPጤ߲NBY4532FLjऎNPTJࡼၫۻăTQJᒲ໐
உၦઁ)SS > 2*LjNJTPၒ߲ܤᆐྯზă
ᏴۍၷෝါሆLjNPTJဵၷሶ୭LjNJTP୭ᆐྯზă
ᑚభጲᆐTQJాဏሆጙৈ୭ăᎅ᎖ৢၫ୭ࡼਈ
ᇹLjকෝါݙถႲᓹෘഎᔊஂ႙ྜྷNBY4532Fࡼᄴဟᄋ
ڭৈVTCᓨზᆡ)ᅄ7ਜ਼8*ăۍၷෝါሆNJTP୭భጲ
ॳహă
TDML! )ࠈቲဟᒩ*
TQJᓍ఼ᒜᆐNBY4532FᄋTDMLቧདࣅTQJాă
࣪TDMLᎌࢅຫሢᒜLjᔢຫൈభᒗ37NI{ăNBY4532F
ᏴTDMLࡼሆଢ଼ዘখܤၒ߲ၫ)NJTP*LjᏴTDMLࡼ
ဍዘݧዹၒྜྷၫ)NPTJ*ăࡩSSᆐဟNBY4532F
TDMLᄢܤዘăహሔဟࡼTDML࢟ຳభጲᆐࢅLjན
᎖TQJᔫෝါ)ᅄ27*ă
TT! )࠭ኡᐋ*
ஞࡩSSᆐࢅဟLjNBY4532FࡼTQJాݣྜྷᎌᓨზă
ࡩSSᆐဟLjNBY4532FᒙTQJၒ߲୭ᆐྯზLj݀আᆡ
ดݝTQJ൝ăྙਫSSᏴጙৈᅲᑳᔊஂۻጤྜྷᒄ༄ܤLj
กඐᑚৈݙᅲᑳࡼᔊஂࢬࣀۻăTQJᓍ఼ᒜభጲᏴख
ᅲጙৈ9ᆡၫ)ෘഎᔊஂ*ᒄઁᒫᒏTQJᒲ໐ăকᄂቶ
భጲᏴཝၷᇹᄻᒦནૄVTCᓨზᆡ)ᅄ7*Ljऎᇄኊ
ख႙၃TQJၫă
``````````````````````````````` ።ቧᇦ
TQJా
NBY4532FᔫᏴTQJ࠭ෝါăገषᆰดݝࡀLjTQJ
ᓍ఼ᒜኊ၅ሌቖጙৈTQJෘഎᔊஂLjႲઁభ࣪Ⴥኰᒍ
ࡼࡀቲࣗቖݷᔫ)ሮ ࡀႁී *ăჅᎌTQJࠅ
႙࣒ဵᆡᏴ༄ăဟᒩᎅᅪ ݝTQJ ᓍ఼ᒜᄋLjၒྜྷ
NBY4532FࡼTDML୭ăဟᒩຫൈభ᎖EDᒗ37NI{ମă
ᆡࠅ႙खညᏴTDMLࡼᑵዘăNBY4532FଐႯၒྜྷࡼᆡၫ
݀ચॊ߅ᔊஂăྙਫᏴSSܤဟၒྜྷࡼᆡၫݙᔗ9ᆡLj
NBY4532F્ࣀࢬᑚৈݙᅲᑳᔊஂă
______________________________________________________________________________________
19
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
NBY4532FࡼTQJాభጲᇄኊྀੜࢯᑳᔫᏴೝᒬTQJෝ
ါሆ)DQPM > 1ĂDQIB > 1*)DQPM > 2ĂDQIB > 2*ăᇄ
ኍᄰਭෝါᆡᏴᑚೝᒬෝါମቲኡᐋLjፐᆐೝᒬෝါ
ࡼဟᒩᎌዘ࣒ဵဍዘăᑚೝᒬဟᒩෝါာ᎖ᅄ 27ă
ᓖፀLjೝᒬෝါሆTDMLࡼహሔᓨზ࢟ຳဵݙᄴࡼăᅄ27
ჅာᆐཝၷෝါLjၫۻᄴဟጤྜྷਜ਼ጤ߲NBY4532Fă
ኍᏴሆጙࠨषᆰఎဪဟ)དࣅSSᆐࢅ*ཀྵۣTDMLࠀ᎖
హሔზăཝၷෝါሆLjNBY4532FᏴ࠭NJTPጤ߲ၫ
ဟNPTJࡼၫă
ቖTQJ࠭ా)NPTJ*
TQJ ᓍ఼ᒜږᑍጲሆݛᒾሶ NBY4532F ࠭ୈాቖ
ၫǖ
ۍၷਜ਼ཝၷTQJᔫෝါ
2*
NBY4532Fభ߈ܠۻᆐۍၷ)ጙᄟၷሶၫሣ*ཝၷ
)ጙᄟၫၒྜྷLjጙᄟၫၒ߲*ᔫෝါăTQJᓍ఼ᒜ
ᒙጙৈ߂ۻᆐGEVQTQJࡼࡀᆡᆐ2ኡᐋཝၷLjᆐ1
ᐌኡۍၷă࢟ဟࡼ෦ཱྀᓨზᆐۍၷă
TQJᓍ఼ᒜᒙဟᒩᆐహሔზăᎅ᎖SSᆐLjᓍ఼
ᒜభጲདࣅNPTJၒྜྷᆐྀፀᓨზă
3*
TQJᓍ఼ᒜདࣅSSᆐࢅLjኡࢾNBY4532FLjઁ
၅ৈၫᆡहࡵNPTJాሣă
4*
ཝၷ
ྦTQJᓍ఼ᒜᒙGEVQTQJ > 2LjTQJాဧࣖࡼၫ
୭)NPTJਜ਼NJTP*ख႙ਜ਼၃ၫăᎅ᎖ݧ೫ॊ
ಭࡼၫ୭Ljၫᆡభጲᄴဟۻጤྜྷਜ਼ጤ߲NBY4532Fă
NBY4532FಽকᄂቶLjᏴጤྜྷෘഎᔊஂࡼᄴဟጤ߲9ৈ
VTCᓨზᆡăᅄ28መာ೫ᅪෝါሆጤ߲ࡼᓨზᆡLjᅄ29
መာ೫ᓍ૦ෝါሆࡼᓨზᆡă
ᏴTDMLဟᒩ)ᎅTQJᓍ఼ᒜᄋ*ࡼဍዘLjTQJᓍ఼
ᒜෘഎᔊஂ႙ྜྷNBY4532FLjᄴဟLjVTCᓨზᆡ
ጐᄰਭNBY4532FࡼNJTP୭ၒ߲ăTQJᓍ఼ᒜᏴ
TDMLࡼሆଢ଼ዘখܤNPTJၫă
5*
ڭৈဟᒩᒲ໐ઁLjᓍ఼ᒜభདࣅSSᆐLjጲሾ
࣪᎖NBY4532Fࡼኡࢾă
6*
ྦߒኚۣߒSSᆐࢅLjᄰਭೌኚख႙SCLK൴ߡLjᓍ఼
ᒜభጲೌኚࣶৈၫᔊஂቖྜྷNBY4532F! )ᅃख
ෝါ*ăᓍ఼ᒜདࣅSSᆐᐌᒫᒏࠅၒਭ߈ăᏴሆ
ጙࠨषᆰఎဪဟ)དࣅ SS ᆐࢅ*Ljᓍ఼ᒜܘኊۣᑺ
TDMLࠀ᎖హሔზăཝၷෝါሆLjNBY4532FᏴ၅ৈ
9ᆡ)ෘഎᔊஂ*ࠅၒ໐ମሶNJTPၒ߲VTCᓨზᆡLjऎ
ሆᏴ TQJ ᓍ఼ᒜሶ NPTJ ႙ྜྷၫᔊஂဟLj
NJTPၒ߲ཝᆐഃă
ᎅTQJ࠭ాࣗནၫ)NJTP*
TQJᓍ఼ᒜږᑍጲሆݛᒾᄰਭNBY4532F࠭ୈాࣗ
ནၫǖ
2*
SSᆐဟᆚኡࢾNBY4532FLjNJTPၒ߲ᆐᔜă
3*
དࣅTDMLᒗహሔზઁLjTQJᓍ఼ᒜདࣅSSᆐࢅLjኡ
ᐋNBY4532FăNBY4532FࡌఎNJTPၒ߲દߡLj
݀၅ৈၫᆡ)R8*हࡵNJTPၒ߲)ᅄ27*ă
4*
TQJᓍ఼ᒜሶNBY4532FࡼNPTJ୭ጤྜྷෘഎᔊஂLj
ᄴဟ࠭NBY4532FࡼNJTP୭ጤ߲VTCᓨზᆡLjჅᎌ
ၫጤᆡखညᏴTDMLဟᒩࡼဍዘăNBY4532FᏴ
TDMLࡼሆଢ଼ዘখܤNJTPၒ߲ၫă
ۍၷ
Ᏼ࢟߱ဪLjᑗ TQJ ᓍ఼ᒜ༹߹ GEVQTQJ ᆡဟLj
NBY4532Fᔫ᎖ۍၷෝါăۍၷෝါሆLjNBY4532F
NJTP୭ᒙᆐྯზLjऎဧNPTJ୭ၷሶᔫLjᑚዹ
ஂဏ೫TQJాࡼጙৈ୭ăۍၷෝါሆభጲဧNJTP
୭ॳహă
5*
ڭৈဟᒩᒲ໐ઁLjᓍ఼ᒜభጲདࣅSSᆐLjནሿ
࣪NBY4532FࡼኡᐋLjဧᒙNJTPၒ߲ᆐྯზăဟ
ᒩࡼሆଢ଼ዘઁኚၫᔊஂࡼNTCहࡵNJTPၒ߲
)ᅄ27*ă
ᎅ᎖ۍၷෝါᒑᎌጙৈၫ୭LjཝၷෝါᒦႲᓹ
TQJᓍ఼ᒜख႙ෘഎᔊஂऎ߲ሚࡼVTCᓨზᆡݙᏳ߲ሚă
ۍၷෝါᒦLjᑚቋᓨზᆡᒑถᔫᆐጙࡼۅࡀᆡ
ቲषᆰă
6*
ྙਫۣߒSSᆐࢅLj݀ߒኚ႙TDML൴ߡNBY4532FLj
ᓍ఼ᒜభ߲ࣗࡀᒦࡼၫᔊஂ)ᅃखෝါ*ă
ᓍ఼ᒜདࣅSSᆐభᒫᒏࠅၒਭ߈ăᓍ఼ᒜܘ
TQJᓍ఼ᒜܘኊၷሶݷᔫNPTJ୭ăږጲሆऱါषᆰ
NBY4532Fดݝࡀǖ
20
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
MISO
NBY4532F
SS
SPI MODE 0,0 (CPOL = 0, CPHA = 0)
SUSPIRQ
URESIRQ
REG4
REG3
SUDAVIRQ
IN3BAVIRQ
IN2BAVIRQ
OUT1DAVIRQ OUT0DAVIRQ
IN0BAVIRQ
X
SCLK
MOSI
REG2
REG1
REG0
0
DIR
ACKSTAT
ᅄ28/! ཝၷෝါࡼTQJ࣡ా)ᅪෝါ*
SS
MISO
SPI MODE 0,0 (CPOL = 0, CPHA = 0)
HXFRDNIRQ
FRAMEIRQ
CONNIRQ
SUSDNIRQ
SNDBAVIRQ
RCVDAVIRQ
RSMREQIRQ BUSEVENTIRQ
X
SCLK
MOSI
REG4
REG3
REG2
REG1
REG0
0
DIR
ACKSTAT*
*ACKSTAT BIT NOT USED
ᅄ29/! ۍၷෝါࡼTQJ࣡ా)ᅪෝါ*
2*
TQJᓍ఼ᒜᒙဟᒩᆐహሔზăᎅ᎖SSᆐLjᓍ఼
ᒜభጲདࣅNPTJ୭ᆐྀፀᓨზă
3*
TQJᓍ఼ᒜདࣅSSᆐࢅLjኡᐋNBY4532FLjઁ
၅ৈၫᆡ)NTC*हࡵNPTJాሣă
4*
TQJᓍ఼ᒜࡌఎၒ߲དࣅLjᏴTDMLဟᒩࡼဍ
ዘෘഎᔊஂࡌྜྷNBY4532FăTQJᓍ఼ᒜᏴTDML
ࡼሆଢ଼ዘখܤNPTJၫă
5*
6*
ྙገሶTQJቖྜྷၫLjTQJᓍ఼ᒜభۣߒၒ߲དࣅ
ᆐఎᄰᓨზLjઁኚࡼၫᔊஂ႙ྜྷNPTJ୭ă
ྙገ࠭TQJࣗནၫLjڭৈဟᒩᒲ໐ઁTQJᓍ఼ᒜ
ၒ߲དࣅᒙᆐྯზLjఎဪ࠭NPTJ୭ࣗྜྷၫă
7*
TQJᓍ఼ᒜདࣅSSᆐLjᒫᒏTQJषᆰᒲ໐ă
ᅄ21ਜ਼22߲೫ཝၷਜ਼ۍၷᔫࡼဟኔᅄă
ڭৈဟᒩᒲ໐ઁLjᓍ఼ᒜ૾భདࣅSSᆐLjሾ
࣪᎖NBY4532Fࡼኡᐋă
______________________________________________________________________________________
21
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
• ߲ࡇઁᔈࣅᒮ၂
ᅪෝါᒦਂ
ᅪෝါሆLjࡩVTCᔐሣࠀ᎖ऻᎌᓨზ4ntઁLjNBY4532F
ᒙVTCJSRࡀ)S24*ᒦࡼTVTQJSRᆡLjྙਫTVTQJF >
2༦JF > 2Ljᑚ્߿खJOUၒ߲ăTQJᓍ఼ᒜܘኍݧནጙ
ቋܘገࡼဏ࢟ࡅဗLjઁᒙVTCDUMࡀ)S26*ᒦࡼ
QXSEPXOᆡăᑚ્എNBY4532Fྜྷࢬ࢟ᓨზLjମLj
ᒊቲጲሆݷᔫǖ
• VTC۞ࡼည߅
• ᄫᒏ23NI{ᑩ
• OS[Jၫࡼܠ൩ਜ਼ஊ൩
• ۣߒJOUၒ߲ᎌ)োQJODUM )S28*ࡀᒦᒙࡼ
ෝါ*
VTCࠈቲా༺
ࠈቲా༺)TJF*ᒊቲࡍݝॊ VTC ፇჅገཇࡼআᏭ
ᔫǖ
• VTC۞QJEࡼଶހᎧቅዩ
• DSDቅዩૺखည
• ᆡᄘߠૺབྷᄘߠ
• ପ၁VTC E,ሣࡼࢅ࢟ຳ
• VTCࡇᇙଶހ
• ପ၁TQJ࣡ాࡼࣅ
• VTCᔐሣআᆡĂਂਜ਼ታଶހ
• VTCਂ0ૂআቧ
• ᔈࣅഗ఼)OBL*
QMM
ጙৈดݝQMM23NI{ᑩቧ႐۶ຫઁࡻࡵ59NI{ด
ݝဟᒩăበຢࢬ࢟ဟᑩۻਈܕጲஂဏ࢟ถăᒮቤ
࢟ઁLjᑩਜ਼QMMኊገጙࢾࡼဟମᆮࢾਜ਼Ⴤሤăᄰਭ
PTDPLJSRᒦࣥᆡLjTQJᓍ఼ᒜభཀྵࢾဟᒩᇹᄻဵ॥ࡉ
ࡵᆮࢾ݀భᄾྜྷᔫă
ᏴVTCDUMࡀ)S26*ᒦᒙQXSEPXOᆡభਈܕᑩ
ਜ਼QMM )ݬਂݝॊ*ă
࢟Ꮞಯ
োVTC 3/1ਖपLjࡩVTCᓍ૦ᄫᒏሶ෭ৈᅪख႙ቧᇦ
ᒗ4ntLjকᅪܘኍྜྷࢬ࢟ᓨზLj߂ᆐTVTQFOE
)ਂ*ăጙࡡਂLjᅪથ።ۣߒᔗ৫ࡼดݝ൝ဤܰ
ᓍ૦ࡼૂআቧLjᑗLjྙਫᎌᏐ࣡ታถLjTQJᓍ
఼ᒜጐభखૂআቧăሆෂଂৈቃஂ)ܪᄌᆐਂਜ਼
ታਜ਼VTCૂআ*ႁීTQJᓍ఼ᒜྙੜᄴNBY4532Fဣ
ሚ࢟Ꮞಯă
ਂ
ࡩ VTC ᔐሣࠀ᎖ऻᎌᓨზ 4nt ઁLjVTC ᅪܘኍྜྷ
VTCਂᓨზLjݙถᇢནިਭ611μBࡼW CVT ࢟ഗă࣪᎖
ਂᓨზࡼࠀಯፐNBY4532Fᔫෝါ)ᓍ૦ᅪ*ࡼݙ
ᄴऎᎌჅཌܰă
ᓍ૦ෝါᒦਂ
ᓍ૦ෝါሆLjNBY4532FᄰਭࢾTPGLBFO > 1ਂᔐሣă
ᑚభጲᄫᒏඛ2ntᔈࣅޘညࡼᑷቧ)ཝႥဟᆐTPGLjࢅႥ
ဟᆐۣߒቧ*ă
22
ᓖፀLjᏴᔐሣࠀ᎖ऻᎌᓨზ4ntઁNBY4532F݀ݙᔈࣅ
ྜྷࢬ࢟ᓨზăᑚᏤTQJᓍ఼ᒜᒊቲጙቋࢬ࢟༄ࡼ
ࠀಯྀᇗLjઁᏳᒙQXSEPXO > 2LjෘഎNBY4532F
ྜྷࢬ࢟ᓨზă
ታਜ਼VTCૂআ
࣪᎖ታਜ਼VTCૂআࡼࠀಯፐNBY4532Fᔫෝါ)ᓍ૦
ᅪ*ࡼݙᄴऎᎌჅཌܰă
ᓍ૦ෝါᒦࡼታਜ਼VTCૂআ
ࡩᓍ૦ᄰਭᒙTPGLBFO > 1ਂᔐሣဟLjభೝᒬ
ऱါૂআᔐሣᄰቧǖ
2*
TQJ ᓍ఼ᒜᄰਭᒙᆡ TJHSTN > 2 ࣅᓍ૦ૂআ
ݷᔫăNBY4532Fख߲31ntࡼૂআቧLjઁᒙ
CVTFWFOUJSRᆡăႲઁTQJᓍ఼ᒜᒙTPGLBFO >
2Ljޘညମ2ntࡼᑷܪᒔLjۣߒᅪࠀ᎖ᔫᓨზă
3*
ᓍ૦ဤܰᔈ᎖ᅪࡼᏐ࣡ታቧăNBY4532Fᎌ
ጙৈᓜᆐࠥࡼᒦࣥᆡSTNSFRJSR )ૂআ༿ཇJSR*ă
ᅪෝါᒦࡼታਜ਼VTCૂআ
ᔫᆐᅪဟLjᎌྯᒬऱजభጲဧNBY4532F࠭ࢬ࢟ᓨზ
ታǖ
2*
TQJᓍ఼ᒜ༹߹VTCDUM )S26*ࡀᒦࡼ
QXSEPXOᆡ)በຢআᆡጐభဧ༹߹*ă
3*
ᄰਭᒙVTCDUM )S26*ࡀᒦࡼTJHSXVᆡLjTQJ
ᓍ఼ᒜख߲ VTC Ꮠ࣡ታቧăTJHSXV > 2 ဟLj
NBY4532Fࣅᑩ݀ࢀࡗᆮࢾăᑩᆮࢾઁLj
NBY4532Fሶᔐሣख߲SFTVNFቧ)21ntࡼLᓨზ*ă
কቧࡼࢾဟᎅNBY4532F఼ᒜLjፐࠥᇄኊTQJᓍ఼
ᒜቲறཀྵࢾဟăNBY4532FથถۣᑺஞᏴᔐሣ
ྜྷహሔᓨზᒗ6ntઁᏳखSFTVNFቧăNBY4532F
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
• ᄰၒ߲HQPVU8–HQPVU1ݙ၊፬ሰLjၒ߲ޘ્ݙည
ඇࠦă
ᓍ૦ૂআᔐሣࣅăᆐဧNBY4532Fถ৫ᎅᓍ૦ቧ
ታLjTQJᓍ఼ᒜኊᒙᆡVTCDUM )S26*ࡀᒦࡼ
IPTDTUFOᆡ)ᓍ૦ᑩࣅဧถ*ăᏴࠥෝါሆLj
ጙࡡNBY4532FପࡵހE,ᎅ2ࡵ1ࡼᄢܤLj્ೂ૾
ࣅᑩ݀ࢀࡗᆮࢾă
• ఼ᒜTQJాᔫࡼᆡݙ၊፬ሰǖGEVQTQJĂJOUMFWFM
ਜ਼QPTJOUă
ୈআᆡ
NBY4532Fᎌྯᒬআᆡऱါǖ
• ࢟আᆡăᑚဵᔢࡼআᆡ)Ⴥᎌดݝࡀᆡۻ
ᒙࡵጯᒀᓨზ*ă
• በຢআᆡăTQJᓍ఼ᒜభጲᄰਭᒙᆡDIJQSFT > 2߿ख
ጙࠨበຢআᆡLjਫਜ਼౯ࢅRES୭ሤᄴăᑚᒬআ
ᆡᒑ༹߹ጙݝॊࡀᆡLjჇݙ၊፬ሰă
• VTCᔐሣআᆡăVTCᔐሣআᆡဵ፬ሰෂᔢቃࡼጙᒬআᆡ
)ᒑ༹߹ᔢၫࡼᆡ*ă
ᓖፀǖ࢟በຢআᆡ્༹߹IPTUᆡLjဧNBY4532F
ྜྷᅪෝါă
• HQYၒ߲ኡᐋ)HQYCLjHQYB*ݙ၊፬ሰă
• ఼ᒜࢬ࢟ਜ਼ታݷᔫࡼᆡݙ၊፬ሰǖIPTDTUFOĂ
QXSEPXOਜ਼TJHSXVă
߹೫ ࢟আᆡ ጙஂᒦᄋࡵࡼྯৈᆡጲᅪLjჅᎌᆡ
༹ۻഃă
ᓖፀǖJSRਜ਼JFᆡጐᏴকআᆡᒦ߹༹ۻăᑚፀᆜᓹᏴள
಼೫ᑚᒬআᆡጲઁLj።কࢯᄂࢾࡼৼୈಿ߈ఎहᒦ
ࣥăበຢআᆡ໐ମHQPVU8–HQPVU1ۣߒܤݙăดݝ࢟
আᆡ)QPS*భጲඣ༹ഃă
ᅪෝါᒦࡼVTCᔐሣআᆡ
ྦNBY4532Fଶࡵހ32/44μtࡼTF1Lj߿खVSFTJSRᆡLj
݀෭ቋᄂࢾࡼᆡ༹ഃăᑚᒬআᆡဵྯᒬআᆡᒦ፬ሰෂ
ᔢቃࡼጙᒬăభጲۣߒ ࢟আᆡ ਜ਼ በຢআᆡ ೝஂᒦჅ
߲ࡼกቋᆡࡼᓨზܤݙLjᄴဟથဧጲሆᑚቋᆡᆒߒ
Ꮗᎌᓨზܤݙǖ
• FQGJGPࡀܤݙă
࢟আᆡ
࢟ᒄઁLj߹4ৈࡀᆡጲᅪLjჅᎌჇࡀᆡۻ
༹߹ăሆෂ4ৈᆡۻᒙᆐ2LjጲᒎာJO! GJGPభLjTQJᓍ
఼ᒜభᓤᏲၫࡵᒦ)CBW > દߡᎌ*ǖ
• JO4CBWJSR
• HQPVU8–HQPVU1ᆡܤݙă
• JFᆡܤݙă
• VSFTJF0JSRਜ਼VSFTEOJF0JSRܤݙLjጲܣTQJᓍ఼ᒜ
ଶއVTCᔐሣআᆡࡼᓨზă
• JO1CBWJSR
FQGJGPࡀᆒߒVTCᔐሣআᆡ༄ࡼᓨზᒑဵᆐ೫ᑧ
ࣥăᔐሣআᆡઁ።၁ᑚቋၫᆐᇄăGJGPᒦࡼဣଔၫ
፼Ꮠ߹༹ۻ્ݙă
በຢআᆡ
౯ࢅ RES ୭ᒙDIJQSFT > 2భጲ༹ഃࡍࣶၫ఼ᒜ
VTCᔫࡼᆡLjࡣ᎖఼ᒜTQJਜ਼୭ࡼᆡݙ၊፬ሰLjፐ
ࠥTQJᓍ఼ᒜਜ਼NBY4532Fࡼాݙ၊፬ሰăᎄဵǖ
ਜ਼በຢআᆡጙዹLjࡍࣶၫᒦࣥ༿ཇਜ਼ᒦࣥဧถᆡ߹༹ۻLj
ፀᆜᓹᔐሣআᆡઁ۸ৼୈܘኍᒮቤఎहৈᒦࣥăࡣ
ਜ਼ဣଔᔐሣআᆡሤਈࡼᒦࣥ߹ᅪLjܣ᎖TQJᓍ఼ᒜଶހ
ᓍ૦VTCᔐሣআᆡቧࡼ࢛ਜ਼ᒫ࢛ă
• DIJQSFTݙখܤăྙਫTQJᓍ఼ᒜᄰਭᒙDIJQSFT
>! 2߿खকআᆡLjกඐܘኍᒮDIJQSFT! >! 1ᅓ߲
আᆡă
ᓍ૦ෝါᒦࡼVTCᔐሣআᆡ
ᔫᆐᓍ૦ဟLjTQJᓍ఼ᒜᄰਭᒙIDUMࡀ)S3:*ᒦ
ࡼ CVTSTU ᆡෘഎ NBY4532F ख߲ VTC ᔐሣআᆡቧă
NBY4532FޘညᑵཀྵࢾဟࡼቧLj݀Ᏼஉၦဟ߿खIJSR
ࡀ)S36*ᒦࡼCVTFWFOUJSRᆡă
• JO3CBWJSR
• DPOOFDUݙ၊፬ሰLjྙਫDPOOFDU > 2Lj۸ଖኚۣ
ߒೌᓨზă
______________________________________________________________________________________
23
NBY4532F
4*
உၦSFTVNFቧઁLjᒙᆡVTCJSR )S24*ࡀᒦࡼ
SXVEOJSRᒦࣥܪᒔ)Ꮠ࣡ታᅲ߅ᒦࣥ༿ཇ*ăࠥဟLj
TQJᓍ఼ᒜ።༹߹TJHSXVᆡă
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
3.3V
REGULATOR
MAX6349TL
12MHz
1.0μF
CERAMIC
0.1μF
CXI
CXO
4.7μF
VCC
VBUS
XI
XO
INT
MOSI
33Ω
D+
USB
"B" CONNECTOR
VL
RES
D+
33Ω
D-
MISO
SCLK
MAX3421E
D-
μP
SS
GND
VBCOMP
GND
GPI
GPIN GPOUT
8
8
GPIO
ᅄ2:/! NBY4532FᏴᔐሣ࢟ࡼᅪ።ᒦ
ᄏࡼኡᐋ
NBY4532Fገཇࡼᄏਖৃྙሆǖ
ຫൈǖ23NI{! ±1/36&
DMPBEǖ29qG )ᔢࡍ*
DPǖ8qG )ᔢࡍ*
དࣅ࢟ຳǖ311μX
ࠈೊቕᑩ࢟ᔜǖ71Ω )ᔢࡍ*
ᓖፀǖࠈೊቕᑩ࢟ᔜဵᏴቕᑩࠀ᎖ࠈೊቕᑩᄟୈဟ
࢟ࡼࡵފᔜăᑚဵဝ፞ᄏᒜᐆளޟᄋࡵࡼݬၫLj߂
ᆐS2ăࡩቕᑩۻᏴ݀ೊቕᑩෝါਜ਼ᅪঌᏲ࢟ྏࡼ
ᄟୈሆဟ)ᑵྙNBY4532Fᑩ࢟വ*Ljᎌဟ્ᄋࡵᎌ࢟
ᔜăଝᏲᑩຫൈሆࡼᎌ࢟ᔜᆐǖ
R1 x ( 1 + (CO / CLOAD))2
࣪᎖࢜ቯࡼDP ਜ਼DMPBE ᒋLjᎌ࢟ᔜ્܈S2߲3۶ă
NBY4532FᏴᔐሣ࢟ࡼᅪ።ᒦ
ᆐ5/86Wᒗ6/36WLjኊገጙৈ4/4WᆮኹNBY4532F
࢟ăকᅄᒦࡼᆈࠀಯጐᎅ4/4W࢟LjWM ୭)൝࢟ຳ
ݬఠ࢟ኹ*ࡵۻWDDăፐࠥLjHQJP )ᄰၒྜྷ0ၒ߲*ࡼݬ
ఠ࢟ຳጾᆐ4/4Wă
VTCဵጙৈེڰރᇹᄻ)ࡩ۸ྜྷރۻဟWCVT ࠀ᎖ଝ࢟ᓨ
ზ*LjፐࠥLjጙৈੑࡼଐᇴਏဵဧ࢟আᆡ࢟വLjጲܣ
Ᏼ۸ྜྷރۻဟᇹᄻᄋጙৈছுࡼআᆡăNBY745:UM
భᔫᆐጙৈᎁኅࡼVTCᆮኹLjፐᎌऻࡼࢅޟஸზ࢟
ഗLjᄴဟดᒙᎌ࢟আᆡ)QPS*࢟വă
ᎅ᎖কଐݧᔐሣ࢟LjᇄኊଶހW CVT ࡼଝ࢟ᓨზă
ࠥဟLjᔐሣ࢟ኹଶހၒྜྷWCDPNQభᔫᆐጙৈ੪ੑࡼᄰ
ၒྜྷဧăWCDPNQၒྜྷᎌೝৈሤਈࡼᒦࣥLjWCVTJSR
ਜ਼OPWCVTJSRăಽᑚቋᒦࣥభጲଶހWCDPNQၒྜྷ
ࡼྀੜူୈă
ᅄ2:ᒦࡼᒙመာLjTQJాဧ೫ᔢࡍၫࡼTQJా
୭ăၫ୭NPTJਜ਼NJTPဵॊಭࡼLj݀༦NBY4532Fᄰ
ਭJOUၒ߲୭ሶμQᄋጙവᒦࣥቧLjጲܣᏴኊገμQ
ᓖፀࡼဟᄰᒀă
ᅄ2:መာ೫NBY4532FᏴጙৈᎅᔐሣ࢟ࡼᅪᒦࡼ።
ăকᒙࡼᎁ࢛ဵݙኊገᅪ࢟ݝᏎăW CVT ࡼऄࢾᒋ
24
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
NBY4532F
+2.5V
3.3V
REGULATOR
MAX6349TL
12MHz
1.0μF
CERAMIC
4.7μF
VCC
CXI
CXO
XI
VL
XO
RES
VBUS
INT
MOSI
33Ω
D+
USB
"B" CONNECTOR
0.1μF
D+
33Ω
D-
MISO
SCLK
MAX3421E
D-
μP
SS
GND
VBCOMP
1.0μF
CERAMIC
GND
GPIN GPOUT
8
8
GPIO
ᅄ31/! NBY4532FᏴᔈ࢟ࡼᅪ።ᒦ
NBY4532FᏴᔈ࢟ࡼᅪ።ᒦ
ᅄ31መာ೫ጙৈᔈ࢟ࡼᅪଐLjᒦࡼμQᎌᔈ
ࡼ࢟Ꮞăᑚဵ࢟ߔ࢟ࡼ၄ߒ۸ᒦ੪໋ᄰࡼጙᒬᒙă
ᅄ31ጐ߲೫ጙᒬ୭ၫᔢࡼTQJೌऱါăᒦݧ
ᄟၷሶၫሣLj݀ဏࢬ೫ᒦࣥೌሣăNBY4532Fࡼ
ࡀᆡGEVQTQJ᎖ᒙTQJాᆐၷሶᔫෝါă
ᅄᒦჅာࡼᇹᄻݾᎅ3/6W࢟LjဣଔLjNBY4532F
భጲ၊2/5Wᒗ4/7Wࡼా࢟ኹăᒑኊᇹᄻ࢟Ꮞ࢟ኹ
ᒗWMLjNBY4532Fด࢟ࡼݝຳᓞધభࢯஂHQJPਜ਼TQJᔐ
ሣቧLjဧጲWM ᆐݬఠLjᏴ۾ಿᒦᆐ3/6Wă
W CVT ଶހၒྜྷWCDPNQဵNBY4532Fࡼጙৈᒮገᄂቶă
ፐᆐLjᇄ൙VTC۸ྜྷރۻᎧ॥μQ࣒ᎌ࢟Ljፐࠥኊገ
෭ᒬऱါଶူྜྷރހୈăNBY4532Fดࡼݝጙৈ୷܈
ᄰਭWCDPNQପ၁ဵ॥खညᎌࡼWCVT ೌLj݀ሶμQᄋ
೫ጙৈೌᓨზᆡăጙࡡೌLjμQభጲዓߕᎧVTCᔐ
ሣࡼ൝ೌLjጲᒊቲܘገࡼ߱ဪછྀᇗLjઁᏴ
NBY4532FࡀVTCDUM )S26*ᒦᒙDPOOFDUᆡᆐ2ဣ
ሚೌăᑚဧดࡼݝ2/6lΩ࢟ᔜೌᏴE,ਜ਼4/4WମLjসႫ
ᓍ૦ᎌ۸ྜྷރă
ྙਫᏴᎌ۸ೌࡼ༽ౚሆᓍ૦ਈܕ೫WCVTLjVTC 3/1ਖप
ገཇᅪݙถE,ࡼ2/6lΩ౯࢟ᔜ࢟ăNBY4532F
ࡼೝৈᄂቶᎌᓐ᎖൸ᔗকገཇLj၅ሌLjOPWCVTJSRᆡᒎ
ာ W CVT ࢬ࢟ăࠨLjμQ భጲᒙጙৈ߂ۻᆐ WCHBUF
)WCVT ඡ఼*ࡼᆡLjෘഎNBY4532FጙࡡWCVT ࢬ࢟ೂ૾ࣥఎ
౯࢟ᔜLjऎܘݙఠDPOOFDUᆡࡼᒙă
NBY4532F᎖ᓍ૦።
ᅄ32መာ೫NBY4532FᏴጙৈ༊ྜྷါᓍ૦ᒦࡼ።ăᓍ૦
ኊገᅪᄋWCVT ࢟ᏎLjፐࠥক࢟വኊገጙৈᅪࡼݝ
6W࢟Ꮞăᆐᅪݝ۸ᄋ࢟Ꮞࡼ࢟വܘኍᎌൈۣઐ
ถ)ಿྙNBY58:4Ljభ࢟ഗሢᒜᏴ411nBᒗ511nB*Lj
ጲཀྵۣ࢟വᏴྜྷރ۸ਭഗ৺ᑇဟ྆ถଖኚᔫă
ሢഗఎਈࡼGMBHᒎာೌᒗNBY4532FࡼڭᄟHQJOၒྜྷ
ᒄጙLjHQY୭ۻᒙᆐऔৈNBY4532Fᒦࣥၒ߲Ljஞ
ࡩᎌ HQJO ୭ᓨზখܤဟ߿खăڭᄟ HQPVU ୭ᒦࡼ
ྀੜጙৈభᄰਈ ܕW CVT ఎਈăથॊܰᎌ 8 ৈ
NBY4532F! HQJOਜ਼HQPVU୭ᇹᄻဧă
______________________________________________________________________________________
25
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
5V
5V SWITCH WITH
CURRENT LIMIT
AND OC DETECT
ON
OUT
IN
3.3V
REGULATOR
WITH POR
FLAG
1.0μF
CERAMIC
4.7μF
VBUS
GPOUT
VCC VL
RES
D+
33Ω
D-
VCC
SCLK
MOSI
33Ω
D+
USB
"A" CONNECTOR
GPIN
0.1μF
D-
μP
SS
MISO
MAX3421E
INT
GND
GPX
VBCOMP
GND
XI
INT1
INT2
GND
XO
CXO
CXI
12MHz
ᅄ32/! NBY4532F᎖ᓍ૦۸
``````````````````````````````` വۣઐ
ཽᄏෝቯ
NBY4532Fถ৫ߌ၊WCVT ࡵE,ਜ਼E.44Ωࠈೊ࢟ᔜ)ణத
VTCೌጙݾ୭*ࡼവă
ᅄ33መာ೫ཽᄏෝቯLjᅄ34መာ೫ሶࢅᔜఝह࢟ဟޘည
ࡼ࢟ഗ݆ተăকෝቯ۞౪ጙৈ211qGࡼ࢟ྏLjࡵ࢟ߠۻኊ
ገހ၂ࡼFTE࢟ኹLjઁᄰਭጙৈ2/6lΩ࢟ᔜሶࡗހୈ
ह࢟ă
````````````````````````````````` FTEۣઐ
E,ĂE.ਜ਼WCDPNQ୭ૹ߅ᎌऄᅪࡼஸۣ࢟ઐLjభᆐ
ୈᄋࡉ±26lWࡼۣઐăকFTEஉ৩భᏴჅᎌᔫෝါ
ሆߌ၊FTEǖᑵޟᔫĂਂෝါਜ਼ࢬ࢟ෝါăWCDPNQ
ਜ਼W DD ୭ገཇణத୭ڔᓤࡵࡼ2μGჿࠣ࢟ྏă
E,ĂE.ਜ਼WCDPNQᄋጲሆᄟୈࡼۣઐǖ
• ±26lWLjݧཽᄏෝቯ
• ±9lWLjݧJFD 72111.5.3ਖࢾࡼ߿ह࢟ऱါ
• ±23lWLjݧJFD 72111.5.3ᇺऱါ
FTEހ၂ᄟୈ
JFD! 72111.5.3
JFD! 72111.5.3 ܪᓰဵᑣ࣪ᔢᒫ۸ࡼ FTE ހ၂ਜ਼ቶถ
ᒜࢾࡼLj݀ऻᓜᆐૹ߅࢟വਖࢾăཽᄏෝቯހ၂ਜ਼ JFD
72111.5.3ࡼᓍገཌܰဵJFD 72111.5.3ᎌৎࡼख़ᒋ࢟
ഗLjፐᆐઁᑗჅࡼࠈೊ࢟ᔜৎቃăፐࠥLjJFD! 72111.5.3
ࡼހ၂࢟ኹᄰࢅޟ᎖ཽᄏෝቯހ၂ऱजăᅄ35መာ೫JFD
72111.5.3ෝቯă߿ह࢟ऱါဵᏴყᄿ࢟ߠۻ༄
ೌࡵୈăᇺह࢟ހ၂ဵጙৈጯߠ࢟ࡼყᄿབྷణ
தୈă
FTEቶถᎧހ၂ᄟୈම༤ሤਈăభሶNbyjnჃནభణቶ
ۨসLjᒦ߲೫ހ၂ᓤᒙĂހ၂ऱजਜ਼ހ၂உਫă
26
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
CHARGE-CURRENTLIMIT RESISTOR
HIGHVOLTAGE
DC
SOURCE
Cs
100pF
RC
50MΩ to 100MΩ
DISCHARGE
RESISTANCE
CHARGE-CURRENTLIMIT RESISTOR
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
HIGHVOLTAGE
DC
SOURCE
Cs
150pF
NBY4532F
RD
1.5kΩ
RC
1MΩ
RD
330Ω
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
ᅄ33/! ཽᄏFTEހ၂ෝቯ
ᅄ35/! JFD! 72111.5.3! FTEހ၂ෝቯ
``````````````````````````````` በຢቧᇦ
IP 100%
90%
Ir
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
PROCESS: BiCMOS
AMPERES
36.8%
10%
0
0
TIME
tDL
CURRENT WAVEFORM
tRL
ᅄ34/! ཽᄏෝቯ࢟ഗ݆ተ
______________________________________________________________________________________
27
`````````````````````````````````````````````````````````````````````````` ॖᓤቧᇦ
(۾ၫᓾ೯ᄋࡼॖᓤᅄభถဵݙᔢதࡼਖৃLjྙኊᔢதࡼॖᓤᅪቯቧᇦLj༿އኯ www.maxim-ic.com.cn/packagesă)
QFN THIN.EPS
NBY4532F
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
D2
D
MARKING
b
CL
0.10 M C A B
D2/2
D/2
k
L
AAAAA
E/2
E2/2
CL
(NE-1) X e
E
DETAIL A
PIN # 1
I.D.
E2
PIN # 1 I.D.
0.35x45°
e/2
e
(ND-1) X e
DETAIL B
e
L1
L
CL
CL
L
L
e
e
0.10 C
A
C
0.08 C
A1 A3
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
COMMON DIMENSIONS
A1
A3
b
D
E
e
0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80
0
0.02 0.05
0
0.02 0.05
0
0.02 0.05
1
2
EXPOSED PAD VARIATIONS
PKG.
16L 5x5
20L 5x5
28L 5x5
32L 5x5
40L 5x5
SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX.
A
I
21-0140
0
0.02 0.05
0
0.02 0.05
0.20 REF.
0.20 REF.
0.20 REF.
0.20 REF.
0.20 REF.
0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 0.15 0.20 0.25
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
0.65 BSC.
0.50 BSC.
0.50 BSC.
0.40 BSC.
0.80 BSC.
0.25 - 0.25 - 0.25 - 0.25 - 0.25 0.35 0.45
0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 0.40 0.50 0.60
L1
- 0.30 0.40 0.50
40
N
16
20
28
32
ND
10
4
5
7
8
4
10
5
7
8
NE
WHHB
----WHHC
WHHD-1
WHHD-2
JEDEC
k
L
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
PKG.
CODES
T1655-2
T1655-3
T1655N-1
T2055-3
D2
3.00
3.00
3.00
3.00
3.00
T2055-4
T2055-5
3.15
T2855-3
3.15
T2855-4
2.60
T2855-5
2.60
3.15
T2855-6
T2855-7
2.60
T2855-8
3.15
T2855N-1 3.15
T3255-3
3.00
T3255-4
3.00
T3255-5
3.00
T3255N-1 3.00
T4055-1
3.20
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL
CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE
OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1
IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
L
E2
exceptions
MIN. NOM. MAX. MIN. NOM. MAX. ±0.15
3.10
3.10
3.10
3.10
3.10
3.25
3.25
2.70
2.70
3.25
2.70
3.25
3.25
3.10
3.10
3.10
3.10
3.30
3.20
3.20
3.20
3.20
3.20
3.35
3.35
2.80
2.80
3.35
2.80
3.35
3.35
3.20
3.20
3.20
3.20
3.40
3.00
3.00
3.00
3.00
3.00
3.15
3.15
2.60
2.60
3.15
2.60
3.15
3.15
33.00
33.00
3.00
3.00
3.20
3.10
3.10
3.10
3.10
3.10
3.25
3.25
2.70
2.70
3.25
2.70
3.25
3.25
3.10
3.10
3.10
3.10
3.30
3.20
3.20
3.20
3.20
3.20
3.35
3.35
2.80
2.80
3.35
2.80
3.35
3.35
3.20
3.20
3.20
3.20
3.40
**
**
**
**
**
0.40
**
**
**
**
**
0.40
**
**
**
**
**
**
DOWN
BONDS
ALLOWED
YES
NO
NO
YES
NO
YES
YES
YES
NO
NO
YES
YES
NO
YES
NO
YES
NO
YES
** SEE COMMON DIMENSIONS TABLE
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN
0.25 mm AND 0.30 mm FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR
T2855-3 AND T2855-6.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
13. LEAD CENTERLINES TO BE AT TRUE POSITION AS DEFINED BY BASIC DIMENSION "e", ±0.05.
-DRAWING NOT TO SCALE-
28
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
21-0140
I
2
2
______________________________________________________________________________________
TQJాࡼVTCᅪ0ᓍ૦఼ᒜ
32L TQFP, 5x5x01.0.EPS
PACKAGE OUTLINE, 32L TQFP, 5x5x1.0mm
21-0110
B
1
2
PACKAGE OUTLINE, 32L TQFP, 5x5x1.0mm
21-0110
B
2
2
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© 2006 Maxim Integrated Products
Printed USA
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