NTGD3133P Power MOSFET −20 V, −2.5 A, P−Channel, TSOP−6 Dual Features • • • • • Reduced Gate Charge for Fast Switching −2.5 V Gate Rating Leading Edge Trench Technology for Low On Resistance Independent Devices to Provide Design Flexibility This is a Pb−Free Device http://onsemi.com V(BR)DSS RDS(on) MAX ID MAX −20 V 145 mW @ −4.5 V −2.5 A Applications • • • • 200 mW @ −2.5 V Li−Ion Battery Charging Load Switch / Power Switching DC to DC Conversion Portable Devices like PDA’s, Cellular Phones, and Hard Drives S1 S2 G1 G2 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS −20 V Gate−to−Source Voltage VGS ±12 V ID −2.3 A Continuous Drain Current (Note 1) Power Dissipation (Note 1) Steady State TA = 25°C TA = 85°C −1.6 t≤5s TA = 25°C −2.5 Steady State PD Continuous Drain Current (Note 2) Steady State 1.3 TA = 25°C ID TA = 85°C Power Dissipation (Note 2) TA = 25°C Pulsed Drain Current tp = 10 ms A −1.6 −1.2 PD 0.56 W IDM ±7.0 A TJ, TSTG −55 to 150 °C Source Current (Body Diode) IS −0.8 A Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Operating Junction and Storage Temperature D2 P−CHANNEL MOSFET P−CHANNEL MOSFET MARKING DIAGRAM 1 W 1.1 TA = 25°C t≤5s D1 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 2. Surface Mounted on FR4 Board using the minimum recommended pad size. TSOP6 CASE 318G SC MG G SC = Specific Device Code 1 M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTION G1 1 6 D1 S2 2 5 S1 G2 3 4 D2 (Top View) ORDERING INFORMATION Device Package Shipping † NTGD3133PT1G TSOP6 (Pb−Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 0 1 Publication Order Number: NTGD3133P/D NTGD3133P THERMAL RESISTANCE RATINGS Symbol Max Unit Junction−to−Ambient – Steady State (Note 3) Parameter RqJA 115 °C/W Junction−to−Ambient – t ≤ 5 s (Note 3) RqJA 95 Junction−to−Ambient – Steady State Min Pad (Note 4) RqJA 225 3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces). 4. Surface Mounted on FR4 Board using the minimum recommended pad size. MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Unit −20 − − V − 14.4 − mV/°C TJ = 25°C − − −1.0 mA TJ = 85°C − − −10 − − 100 nA −0.6 −0.9 −1.4 V VGS = −4.5 V, ID = −1.9 A − 95 145 mW VGS = −2.5 V, ID = −1.6 A − 150 200 VDS = −5.0 V, ID = −2.5 A − 4.0 − S pF OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS VGS = 0 V VGS = 0 V, VDS = −16 V ID = −250 mA VDS = 0 V, VGS = ±12 V IGSS ON CHARACTERISTICS (Note 5) Gate Threshold Voltage VGS(TH) Drain−to−Source On Resistance RDS(on) Forward Transconductance VGS = VDS gFS ID = −250 mA CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS − 390 − Output Capacitance COSS − 75 − Reverse Transfer Capacitance CRSS − 37 − Total Gate Charge QG(TOT) − 3.7 5.5 Threshold Gate Charge QG(TH) − 0.7 − − 1.1 − VGS = 0 V, VDS = −10 V, f = 1.0 MHz VGS = −4.5 V, VDS = −10 V, ID = −2.2 A nC Gate−to−Source Charge QGS Gate−to−Drain Charge QGD − 1.2 − td(ON) − 6.7 − − 12.7 − − 13.2 − − 11 − − −0.8 −1.2 V − 7.4 − ns − 4.8 − − 2.6 − − 2.4 − SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr VGS = −4.5 V, VDD = −10 V, ID = −1.0 A, RG = 6.0 W td(OFF) tf ns DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, TJ = 25°C IS = −0.8 A VGS = 0 V, dISD / dt = 100 A/ms, IS = −1.0 A QRR 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 nC NTGD3133P 10 TJ = 25°C 4.5 V 3.5 V ID, DRAIN CURRENT (A) 10 ID, DRAIN CURRENT (A) 8 4.0 V 3.0 V 6 2.8 V 4 2.6 V 2.4 V 2 8 6 4 TC = 25°C 2 2.2 V TC = 125°C VGS = 2.0 V TC = −55°C 0 0 1 2 3 0 4 1 2 3 4 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.8 ID = 0.8 A 0.6 0.4 0.2 0 2 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 3 4 5 VGS = 2.5 V 0.6 VGS = 3.0 V VGS = 3.5 V 0.4 0.2 VGS = 4.5 V 0 0 2 4 6 8 ID, DRAIN CURRENT (A) Figure 3. On−Resistance versus Gate−to−Source Voltage Figure 4. On−Resistance versus Drain Current and Gate Voltage 1.6 5 0.8 VGS, GATE−TO−SOURCE VOLTAGE (V) 10 600 TJ = 25°C VGS = 0 V ID = 2.2 A VGS = 4.5 V 1.4 C, CAPACITANCE (pF) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 1.2 1 0.8 400 CISS 200 COSS CRSS 0 0.6 −50 −25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) 0 4 8 12 16 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Capacitance Variation http://onsemi.com 3 20 NTGD3133P 100 ID = 2.2 A TJ = 25°C VDS = 15 V ID = 30 A VGS = 4.5 V 4 t, TIME (ns) VGS, GATE−TO−SOURCE VOLTAGE (V) 5 3 2 tr 10 tf td(on) 1 0 0 1 2 3 1 4 10 100 RG, GATE RESISTANCE (W) Figure 7. Gate−to−Source and Drain−to−Source Voltage versus Total Charge Figure 8. Resistive Switching Time Variation versus Gate Resistance 10 VGS = 4.5 V Single Pulse TC = 25°C ID, DRAIN CURRENT (A) VGS = 0 V 1 TJ = 150°C TJ = 25°C 0.1 0.01 0.4 0.6 0.8 1 100 ms 1 1 ms 10 ms 0.1 RDS(on) Limit Thermal Limit Package Limit 0.01 0.2 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 QG, TOTAL GATE CHARGE (nC) 10 IS, SOURCE CURRENT (A) td(off) 1.2 0.1 dc 1 10 VSD, SOURCE−TO−DRAIN VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 9. Diode Forward Voltage versus Current Figure 10. Maximum Rated Forward Biased Safe Operating Area 100 1 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 0.0001 SINGLE PULSE 0.001 0.01 0.1 t, TIME (s) Figure 11. Thermal Response http://onsemi.com 4 1 10 100 NTGD3133P PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE S D 6 HE 1 5 4 2 3 E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. b e q c A 0.05 (0.002) L A1 DIM A A1 b c D E e L HE q MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10° − MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0° INCHES NOM 0.039 0.002 0.014 0.007 0.118 0.059 0.037 0.016 0.108 − MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10° SOLDERING FOOTPRINT* 2.4 0.094 1.9 0.075 0.95 0.037 0.95 0.037 0.7 0.028 1.0 0.039 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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