ZARLINK ZL40511LDG

ZL40511/15
Dual Output DVD and CD
4 Channel Laser Diode Drivers
Data Sheet
Features
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August 2006
Single 5 V supply (±10%)
150 mA low-noise read channel with 100 x
current gain
Three 500 mA write channels with 240 x gain
Combined channel output 700 mA
Dual output for DVD/CD laser
Rise and fall times 1 ns typical
Oscillator, 500 MHz, 100 mA with external
resistor control of frequency and amplitude
Power Up/Down control
CMOS control signals
> 2 kV ESD
Low Rth QFN package
Contact Zarlink for available Custom Gain and
Input Impedance options
19
20
ZL40511LDE
ZL40511LDF
ZL40511LDG
ZL40515LDE
ZL40515LDF
ZL40515LDG
Ordering Information
24 Pin QFN
Tubes, Bake & Drypack
24 Pin QFN
Tape & Reel
24 Pin QFN
Trays, Bake & Drypack
24 Pin QFN
Tubes, Bake & Drypack
24 Pin QFN
Tape & Reel
24 Pin QFN
Trays, Bake & Drypack
-40°C to +85°C
Applications
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DVD±RW/RAM
DVD±R
CD-RW
CD-R
Write optical drives
Laser Diode current switch
Supports double density DVD
PWR_UP
INR
GND
21
IN2
VCC_A
GND
22
IN3
OUTA
GND
GND
22
1
2
3
4
5
6
7
8
17
16
IN4
OUTB
24
18
GND_IN
GND
VCC_B
15
14
/EN2
N/C
/EN3
GND
/EN4
N/C
VCC_IN
OSCEN
RFA
RFB
9
10
RSA
SELA
RSB
11
12
13
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2006, Zarlink Semiconductor Inc. All Rights Reserved.
ZL40511/15
GND_IN
IN4
IN3
IN2
INR
PWR_UP
Data Sheet
24
23
22
21
20
19
/EN2
1
18
VCC_A
N/C
2
17
OUTA
/EN3
3
GND
4
/EN4
N/C
16
ZL40511
GND
13
SELA
7
8
9
10
11
12
RSB
6
RSA
VCC_B
RFB
14
RFA
5
OSCEN
OUTB
VCC_IN
15
Figure 2 - Pinout of 4x4 mm 24 pin QFN (top view)
Description
The ZL40511/15 are high performance laser drivers capable of driving two separate cathode grounded laser diodes
(e.g., 650 nm and 780 nm laser diodes).
The ZL40511/15 contain a 150 mA low-noise read channel (ChR), and three 500 mA write channels (Ch2, Ch3 and
Ch4). The read channel amplifies the positive current supplied at its reference input, INR, by a fixed factor of 100.
Write channels amplify the positive currents supplied at its reference inputs IN2, IN3, and IN4 by a fixed factor of
240.
An on-chip RF oscillator is provided for the reduction of laser mode hopping noise.
The ZL40511 offers higher tolerance performance.
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Zarlink Semiconductor Inc.
ZL40511/15
Data Sheet
Table of Contents
1.0 Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 Read and Write Channel Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 On-chip RF Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Electrical and Optical Pulse Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.5 Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40511/15 Evaluation Board. . 7
1.6 Application Layout Guide Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.7 ZLE40511 Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.0 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.0 Evaluation Boards From Zarlink Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.0 Optical Pulse Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.0 Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.0 Characteristic Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.0 I/O Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8.0 Timing Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
9.0 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
10.0 Example Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
10.1 Write Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
10.2 Oscillator Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
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Zarlink Semiconductor Inc.
ZL40511/15
Data Sheet
List of Figures
Figure 1 - Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2 - Pinout of 4x4 mm 24 pin QFN (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Figure 2 - Pulse Response Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3 - ZLE40511 Application Board Electrical Interconnect. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4 - Application Schematic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5 - Typical Optical Eye Diagram Response* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6 - Write Channel 2, 3 and 4 IP/OP Transfer Characteristic/Temp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 7 - Read Channel IP/OP Transfer Characteristic/Temp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 8 - Write Channel 2, 3 or 4 IP/OP Transfer Characteristic/Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 9 - Write Channel 2, 3 or 4 IP/OP Best Fit Line% Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 10 - Write Channel 2, 3 or 4 ∆ lout% Variation with Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11 - Write Channel 2, 3 or 4 ∆ lout% Variation with Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 12 - Oscillator Frequency/RF
Vcc = 5 V, Temp = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 13 - losc Out/Frequency/
RS = 1 K, 7.5 K, 11 K, Vcc = 5 V, Temp = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 14 - losc Amplitude mA pk-pk/RSA or RSB
Vcc = 5 V, Temp = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 15 - losc/Frequency
RS = 7.5 K, Vcc = 5 V, Temp = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 16 - ∆ Freq % Variation with Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 17 - Oscillator Noise Spectral Density
Vcc = 5 V, Temp = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 18 - CMOS/LVTTL Input (PWR_UP, OSCEN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 19 - Oscillator Resistors (RF, RS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 20 - Read Current Input (INR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 21 - Output (OUTA, OUTB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 22 - Write Current Input (IN2, IN3, IN4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 23 - LVDS Input (EN2, /EN2), (EN3, /EN3), (EN4, /EN4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 24 - Timing of Read or Write Channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 25 - Output Waveform Showing Addition of Read and Write Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 26 - Example of Write Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 27 - Example of Oscillator Waveform Superimposed on the Read Waveform . . . . . . . . . . . . . . . . . . . . . . 28
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Zarlink Semiconductor Inc.
ZL40511/15
1.0
Application Notes
1.1
Read and Write Channel Operation
Data Sheet
The read channel is activated by applying a 'High' signal to the PWR_UP pin. In this mode, the fast write channels
can be enabled by applying a 'Low' signal to the respective write enable pins (/EN2), (/EN3) or (/EN4). The output
currents of the four channels are summed together and output as a composite signal at either OUTA (if SELA select
is 'High') or OUTB (if SELA select is 'Low'). This provides the ability to drive two different laser diodes with just one
ZL40511/15.
Voltage control of the channel reference inputs (INR, IN2, IN3 and IN4) can be achieved quite easily using an
external resistor Rref in series with the reference channel input to convert a given reference potential Vref to an input
current, Iin:
I in =
Vref
Rref + Rin
,
where Rin is the input impedance of the respective reference channel.
1.2
On-chip RF Oscillator
An on-chip RF oscillator is enabled if OSCEN = 'High', and its output signal is added to the appropriate current
output (OUTA, if SELA select is 'High', or OUTB, if SELA select is 'Low'). The oscillator amplitude is set by an
external resistor from RSA or RSB to GND. Its frequency is set by an external resistor RFA or RFB to GND. RSA
and RFA are selected when SELA is ‘High’.
The oscillator signal is summed with the programmed Write and Read levels before amplification to the output. The
oscillator signal has zero DC level and +1_pt to –1_pt signal swing. Consequently, if the programmed DC level from
the Write and Read Channels is less than the PK level programmed for the Oscillator, the combined signal will be
clipped on the negative cycle of the signal. This will increase the harmonic content of the output signal and reduce
the pk to pk amplitude output.
1.3
Thermal Considerations
Package thermal resistance is 40°C/W under the EIA/JESD51-3 compliant PCB test board condition.
Users should ensure that the junction temperature does not exceed 150°C. Thermal resistance from junction to
case and to ambient is very much dependent on how the IC is mounted onto the board, on the PCB layout and on
any heat extraction arrangements.
Power consumption and system ambient operating temperature limits should be noted and careful thermal gradient
calculations undertaken to ensure that the junction temperature never exceeds 150°C.
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Zarlink Semiconductor Inc.
ZL40511/15
1.4
Data Sheet
Electrical and Optical Pulse Response
Lfix = 3nH
Iout
En
Vcc_A
2p
K
500
15
C_out
Lint
Lfix = 3nH
17p
K
C_bypass
Lint
OutA
ZL40510 Model
Cd
Lint=5nH , BW = 460MHz, Rd=7, Q=j20/(15+7) =0.9
Lint=5nH, BW = 460MHz, Rd=3, Q=j20/(15+3) = 1.11
Rd
Vd
Lint=7nH, BW = 411MHz, Rd=7, Q=j18/(15+7) = 0.8
Lint=7nH, BW = 411MHz, Rd=3, Q=j18/(15+3) = 1.0
Figure 2 - Pulse Response Model
Figure 3 illustrates a simplified model of the typical ZL40511/15 and the application. The ZL40511/15 consists of an
ideal switched current source and an equivalent model of the ZL40510/15 output stage. The Electrical Model for the
Laser Diode is a Voltage source Vd (V_on) in series with the On Resistance Rd all in parallel with the Junction
Capacitance Cd. This simplified model approximately represents the Laser Diode Electrical load when operated
beyond the Laser Threshold. To a first approximation, the Optical output is proportional to the current flow in the
Resistor Rd.
The Laser Diode and the ZL40511/15 are connected together buy interconnect tracks with the return current
passing through the supply decoupling bypass capacitor between ground and output Vcc.
The ZL40511/15 can be approximated to an ideal switched programmed current source with a propagation delay of
Iout_on (1.2 nS) and a switch transition time of 400 ps. The final output electrical pulse response parameters, Trise,
Tfall, Overshoot and Undershoot are determined by the combined electrical network as illustrated in Figure 3.
For example, the Rise Time and Fall time for large current steps can be slew rate limited by the combined
interconnect and fixed interconnect inductance. The Fixed Inductance represents that associated with packaging
and minimum interconnect distance. The Interconnect Inductance is that associated with the additional tracking
between Laser Diode and the ZL40511/15 to accommodate application physical limitations.
For example, if a pulse of 360 mA amplitude (40 mA to 400 mA) is to be switched in a time of 1 nS with the Vd =
1.6 V, then the maximum volt drop across the interconnect inductance is approximately 3.5 V (maximum Vpin for
500 mA output) – 1.6 V (Vdiode) = 1.9 V. Consequently, L*di/dt < 1.9 V. Hence, L < 1.9/ (0.36A/1 nS) = 5.3 nH.
Small current step size Rise and Fall Time will be determined by the Bandwidth of the combined network. This is
dominated by the Interconnect Inductance and the output Capacitance. Similarly, the overshoot and undershoot will
be determined by the Q of the network. This is a function of the Source Impedance from the ZL40511/15, the
Interconnect inductance and the Load impedance of the Laser Diode. Figure 3 includes example simplified
estimates of the Q and BW of the combined Laser Diode, ZL40511/15 and interconnect network for two different
interconnect inductance values (5 nH and 7 nH) and two different Diode On resistance (3 Ohm and 7 Ohm). This
simple analysis illustrates the change in BW and Q of the network depending on these parameters. This in turn
effects the Rise Time and Fall time and the Overshoot and Undershoot performance achieved in the application.
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Zarlink Semiconductor Inc.
ZL40511/15
1.5
Data Sheet
Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40511/15
Evaluation Board
The specified performance in the table are results based on the electrical measurements and simulations across
full process corners using the Zarlink Evaluation Board using a 3.9 Ohm resistive load to ground.
The track interconnect between ZL40511/15 and the 3.9 Ohm Resistor is 15 mm long and uses a 2 mm wide track
on single sided FR4 board. The return path is via two 2 mm wide tracks spaced 0.25 mm either side of the track
between output and the 3.9 Ohm resistor. The combined forward and return path forms a co planar transmission
line with a characteristic impedance of approximately 120 Ohms.
The tight coupled return paths carrying the return current reduce the effective series inductance (Leff) which can be
approximated to:
Leff = 2 * Lint * (1 - K) + 2 * Lfix * (1 - K).
The ZLE40510 board has two positions for the Laser Diode at two different distances. (15 and 30 mm).
•
The measured value of Leff is 7 nH
•
The estimated value of Leff = 2 * 8 (1 – 0.5) = 8 nH
The actual pulse response achieved in an application is thus dependent on the application.
1.6
Application Layout Guide Lines
Minimize interconnect inductance by:
a. Using Short Interconnect Distance
b. Use wide interconnect tracks
c. Keep the return path tightly coupled to the forward path.
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Zarlink Semiconductor Inc.
ZL40511/15
1.7
ZLE40511 Interconnect
Figure 3 - ZLE40511 Application Board Electrical Interconnect
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Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
2.0
Data Sheet
Application Diagram
750R
750R
750R
620R
10K
1nF
GND
GN
D_I
N
IN4 IN3 IN2 IN
R
P
W
R_
UP
24
19
23
22
21
20
/EN2
1
18
VCC_A
N/C
2
17
OUTA
/EN3
3
GND
4
/EN4
N/C
16
ZL40511
GND
15
OUTB
5
14
VCC_B
6
13
SELA
VCC
470nF
7
8
9
VC OS
RF
C_I CE A
N
N
10
11
12
RF
B
RS
A
RS
B
470nF
470uF
4R7
7k5
12k 12k 6k2
1nF
50R
GND
Figure 4 - Application Schematic Diagram
3.0
Evaluation Boards From Zarlink Semiconductor
Zarlink Semiconductor provide an LDD evaluation board. This is primarily for those interested in performing their
own assessment of the operation of the LDDs. Figure 5 shows a recommended application configuration. The
inputs are connected via side launch SMA connectors.
Please order as ZLE40511.
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Zarlink Semiconductor Inc.
ZL40511/15
4.0
Data Sheet
Optical Pulse Response
5nS
Figure 5 - Typical Optical Eye Diagram Response*
* (Measured using Sanyo DL-7140-201S Infra Red Laser Mounted on ZLE40510 Application Board)
(I read = 50 mA, I write =125 mA, at 15 mm with 200 MHz PRBS Pattern)
Figure 6 illustrates the typical optical response measured with the ZL40511/15 mounted on the ZLE40510
application board driving a Sanyo DL-7140-201S Infra Red Laser. The test condition is driving a PRBS pattern at
200 MHz clock rate which is representative of a 16X DVD write pattern using Block Write Strategy with minimum
write pulse of 2T duration.
The Sanyo DL-7140-201S Infra Red Laser Diode On resistance is typically 3 Ohms which is representative of the
On resistance of the Latest generation 250 mW pulsed High Power Red Laser Diodes that are targeted at 16X and
8X DVD.
The pulse is measured stepping from a low level which is above the laser threshold thus avoiding the laser turn on
transient which can distort the measured response.
The ZL40511/15 exhibits excellent pulse response characteristics when used with the optimum interconnect.
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Zarlink Semiconductor Inc.
ZL40511/15
5.0
Data Sheet
Pin List
Pin No.
Pin name
Type
Function
1
/EN2
LVDS
Digital control input for channel 2 (active low)
2
NC
LVDS
No internal connection
3
/EN3
LVDS
Digital control input for channel 3 (active low)
4
NC
LVDS
Ground
5
/EN4
LVDS
Digital control input for channel 4 (active low)
6
NC
LVDS
No internal connection
7
VCC_IN
supply
+5 V Input power supply
8
OSCEN
digital
Oscillator enable control input, high active (TTL)
9
RFA
analog
Resistor to GND sets oscillator frequency when SELA = ’High’
10
RFB
analog
Resistor to GND sets oscillator frequency when SELA = ’Low’
11
RSA
analog
Resistor to GND sets oscillator amplitude when SELA = ’High’
12
RSB
analog
Resistor to GND sets oscillator amplitude when SELA = ’Low’
13
SELA
digital
Output select input; 'High' selects OUTA, 'Low' selects OUTB (TTL)
14
VCC_B
supply
Output B Vcc
15
OUTB
analog
Current output source B
16
GND
supply
Ground
17
OUTA
analog
Current output source A
18
VCC_A
supply
Output A Vcc
19
PWR_UP
digital
Digital chip enable control input, high active (CMOS)
20
INR
analog
Current input, Rin = 400 Ohms to GND
21
IN2
analog
Current input, Rin = 250 Ohms to GND (Optional 500 Ohms)
22
IN3
analog
Current input, Rin = 250 Ohms to GND (Optional 500 Ohms)
23
IN4
analog
Current input, Rin = 250 Ohms to GND (Optional 500 Ohms)
24
GND_IN
supply
Ground for input circuit
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Zarlink Semiconductor Inc.
ZL40511/15
Data Sheet
Absolute Maximum Ratings
Characteristic
Min.
Typ.
Max.
Units
Supply voltage (VCC, VCC_IN)
-0.5
6.0
V
Input voltage (INR, IN2, IN3, IN4)
-0.5
6.0
V
Input voltage
(PWR_UP, EN2, /EN2, EN3, /EN3, EN4,
/EN4, OSCEN, SELA)
-0.5
(VCC_I
N + 0.5)
V
Output voltage (OUTA, OUTB)
-0.5
Vcc
V
150
°C
Max.
Units
5.5
V
Input voltage (INR)
0.7
V
Input voltage (IN2, IN3, IN4)
0.7
V
(VCCA,
B-0.9)
V
Junction temperature
Comments
Operating Range
Characteristic
Min.
Supply voltage (VCC, VCC_IN)
Typ.
4.5
Output voltage (OUTA, OUTB)
-0.3
Comments
RF
1
kΩ
External resistor to GND
RS
1
kΩ
External resistor to GND
Operating temperature range, junction
0
150
°C
Package Thermal Resistance
Junction to
Package Type
24 pin QFN
Case
RthJC
ambient
RthJA
40
Units
K/W
Comments
Exposed paddle soldered to multi-layer PCB
12
Zarlink Semiconductor Inc.
ZL40511/15
Data Sheet
Electrical Characteristics Vcc = 5 V, Tamb = 25°C, INR = 400 µA, IN2 = IN3 = IN4 = 160 µA, PWR_UP = High, Ch2, Ch3, Ch4 disabled,
OSCEN = Low, unless otherwise specified.
Characteristic
Min.
Typ.
Max.
Units
Comments
Type
Supply current, power down,
IccPD
80
220
µA
ENABLE = Low
A
Supply current, read mode,
oscillator disabled, IccR0
69
84
mA
INR = 400 µA
A
Supply current, read mode,
oscillator enabled, IccR1
70
85
mA
OSCEN = High, RF = 6.8 kOhm,
RS = 8.2 kOhm,
A
Supply current, write mode, IccW
210
250
mA
Ch2, Ch3, Ch4 enabled
B
Supply current, input off
18
mA
Ch2, Ch3, Ch4 enabled
INR = IN2 = IN3 = IN4 = 0
B
Supply Current (into VCC-pin)
/EN2, /EN3, /EN4, SelA & OscEn Digital Inputs
Logic low voltage
Logic high voltage
0.8
2.2
Threshold level
Logic low input current
1.68
A
V
A
V
Temperature stabilised
B
µA
Vin = 0 V
B
50
µA
Vin = 3.3 V
B
0.5
V
CMOS compatible level
A
-50
Logic high input current
V
Power_Up Digital Input
Logic low voltage
Logic high voltage
2.7
V
CMOS compatible level
A
Logic low input current
-50
µA
Vin = 0 V
B
µA
Vin = 3.3 V
B
Logic high input current
50
Note: A = 100% Tested
B = Guaranteed by Characterization and Design
C = Guaranteed by Simulation
13
Zarlink Semiconductor Inc.
ZL40511/15
Characteristic
Min.
Typ.
Output current, ChR
150
200
Output current, Ch2, Ch3, Ch4
Total output current
Max.
Units
Data Sheet
Comments
Type
Current Outputs (OutA & OutB)
mA
Vout ≤ 3.5 V
B
500
mA
Channel enabled,
INR = 0 µA, Vout ≤
3.5 V,Iin = 2.8 mA
A
700
mA
Ch2, 3, 4 enabled, Vout ≤ 3.5 V
A
Write Output current, zero input,
Iout0 (ZL40511)
12
mA
INR = IN2 = IN3 = IN4 = 0µA,
Ch2, or Ch3 or Ch4 enabled
A
Write Output current, zero input,
Iout0 (ZL40515)
15
mA
INR = IN2 = IN3 = IN4 = 0µA,
Ch2, or Ch3 or Ch4 enabled
A
Read Output current, zero input,
Iout0
2.5
mA
INR = IN2 = IN3 = IN4 = 0µA,
Ch2, 3,& 4 disabled,
A
Rin is to GND
B
Rin is to GND
B
Iout = 40 mA to 300 mA
B
Iout = 40 mA to 300 mA,
Iin temp coefficient = 0 ppm/°C
B
Iout = 50 mA InR = 500 µA
B
Input impedance (INR)
330
400
470
Input impedance (IN2, IN3, IN4)
205
250
295
W
+5
%/V
Iout supply sensitivity (any
channel)
-5
Iout temperature sensitivity
(any channel)
Iout current output noise
300
ppm/°
C
3
nA/
√Hz
Current Output OutA & OutB
Current gain, ChR, best fit
85
100
115
mA/m
A
Iout = 20 mA to 80 mA † Note 1
A
Current gain, Ch2, best fit
205
240
275
mA/m
A
Iout = 20 mA to 120 mA † Note 2
A
Current gain, Ch3, best fit
205
240
275
mA/m
A
Iout = 20 mA to 120 mA † Note 2
A
Current gain, Ch4, best fit
205
240
275
mA/m
A
Iout = 20 mA to 120 mA † Note 2
A
ZL40511
Output current offset, ChR, best
fit
-1
8
mA
Iout = 20 mA to 80 mA † Note 1
A
Output current offset, Ch2, best
fit
-4
12
mA
Iout = 20 mA to 120 mA † Note 2
A
Output current offset, Ch3, best
fit
-4
12
mA
Iout = 20 mA to 120 mA † Note 2
A
14
Zarlink Semiconductor Inc.
ZL40511/15
Characteristic
Min.
Output current offset, Ch4, best
fit
Typ.
Data Sheet
Max.
Units
Comments
Type
-4
12
mA
Iout = 20 mA to 120 mA † Note 2
A
Output current offset, ChR, best
fit. Note 3
-1
8
mA
Iout = 20 mA to 80 mA † Note 1
A
Output current offset, Ch2, best
fit. Note 4
-7
15
mA
Iout = 20 mA to 120 mA † Note 2
A
Output current offset, Ch3, best
fit. Note 4
-7
15
mA
Iout = 20 mA to 120 mA † Note 2
A
Output current offset, Ch4, best
fit. Note 4
-7
15
mA
Iout = 20 mA to 120 mA † Note 2
A
Output current linearity (any
channel). Note 3
-3.5
1.5
%
Iout = 20 mA to 120 mA † Note 2
A
Gain tracking, Ch2 to Ch3 to
Ch4
-2.5
+2.5
%
Iout = 20 mA to 120 mA † Note 2
A
ZL40515
ZL40511/15
Note: A = 100% Tested
B = Guaranteed by Characterization and Design
C= Guaranteed by Design
Note 1: Gain, offset and linearity of a channel are derived from a best fit line (linear regression graph) to the following three operating
points: Iout = 20 mA, 50 mA and 80 mA.
Note 2:
Gain, offset and linearity of a channel are derived from a best fit line (linear regression graph) to the following three operating
points: Iout = 20 mA, 70 mA and 120 mA.
Note 3:
Best Fit output line through 20mA, 50mA, 80mA
Note 4:
= Best Fit output line through 20mA, 70mA, 120mA
† Electrical measurement into 3.9 Ohm to Gnd
15
Zarlink Semiconductor Inc.
ZL40511/15
Data Sheet
Typ.
Max.
Units
Comments
Typ
e
Channel rise time, (10% to 90%),
tr2
1.0
1.3
ns
40 to 375 mA, Ch2, 3 or 4 pulsed
B
Channel fall time, (10% to 90%),
tf2
1.2
1.6
ns
40 to 375 mA, Ch2, 3 or 4 pulsed
B
Output current overshoot
(any write channel)
10
%
40 to 375 mA Ch2 3, 4 pulsed †
B
Output current undershoot
(any write channel)
10
%
40 to 375 mA Ch2 3, 4 pulsed †
B
Characteristic
Min.
Timing
Current Output OutA & OutB
†‡
† ‡
Channel to Channel Enable Skew
Tr
50
ps
B
Channel to Channel Enable Skew
Tf
25
ps
B
Iout ON propagation delay, tonCh
1.4
1.8
ns
50% En High-Low to 50% Iout,
any write channel
B
Iout OFF propagation delay, toffCh
1.2
1.6
ns
50% En Low-High to 50% Iout,
any write channel
B
Amplifier -3 dB bandwidth (ChR)
23
43
68
MHz
INR = 400 µA
C
Amplifier -3 dB bandwidth (Ch2,
3, 4)
6
11
16
MHz
IN2, IN3, IN4 = 400 µA
C
Power_Up time, ton
1.5
3.5
µs
50% Enable Low-High to 50%
Iout
C
Power_Up time, toff
20
33
ns
50% Enable High-Low to 50%
Iout
C
Output A select delay
5
8
ns
50% DVD/CD select Low-High to
50% IOUTA
C
Output A deselect delay
5
8
ns
50% DVD/CD select High-Low to
50% IOUTA
C
Power_Up & SelA
Note: A = 100% Tested
B = Guaranteed by Characterization and Design
C= Guaranteed by Design
† (EN2, /EN2), (EN3, /EN3), (EN4, /EN4) input pulse rise and fall time = 0.4 ns.
‡ Parameter is measured Electrical Pulse Response using 3.9 Ohm load to gnd and Zarlink Application Board. Pulse response performance
parameters Trise, Tfall, Overshoot and Undershoot can be limited by interconnect inductance. Optical Response is influenced by Laser Diode
response. See Application Notes.
16
Zarlink Semiconductor Inc.
ZL40511/15
Data Sheet
Electrical Dynamic Characteristics Vcc = 5 V, Tamb = 25°C, INR = 400 uA, IN2 = IN3 = IN4 = 160 µA, PWR_UP = High, Ch2, Ch3,
Ch4 disabled, OSCEN = Low, unless otherwise specified.
Characteristic
Min.
Typ.
Max.
Units
Comments
Type
250
MHz
RF = 16 kΩ, OSCEN = High
B
MHz
RF = 2 kΩ, OSCEN = High
B
Oscillator
Frequency adjust range Low
Frequency adjust range High
575
Frequency tolerance (ZL40511)
338
375
412
MHz
RF = 7.5 kΩ, OSCEN = High
A
Frequency tolerance (ZL40515)
322
375
428
MHz
RF = 7.5 kΩ, OSCEN = High
A
ppm/
°C
RF = 7.5 kΩ, OSCEN = High
C
mA pk
to pk
RS = 11 kΩ, OSCEN = High
RF=9 K (350 MHz) InR = 1 mA
B
mA pk
to pk
RS = 1 kΩ, OSCEN = High
RF = 9 K (330 MHz) InR = 1 mA
B
200
Frequency temperature coefficient
36
Amplitude adjust range Low
(RS=11KΩ)
Amplitude adjust range High
100
(RS=1KΩ)
Third Harmonic
-30
dBC
RS = 10 kΩ to 2 kΩ, OSCEN =
High
RF = 9 K (330 MHz)
InR = 400 uA
C
Second Harmonic
-20
dBC
RS = 10 kΩ to 2 kΩ, OSCEN =
High
RF = 9 K (330 MHz)
InR = 400 uA
C
%
Fosc= 250MHz to 450MHz,
OSCEN = High, RS 1%
C
42
mA pk
to pk
f = 375 MHz, RS = 7.5 kΩ,
OSCEN = High
C
4
dB
RS = 7.5 kΩ, RF = 9 kΩ to 4 kΩ
B
800
ppm/
°C
RF = 5.6 kΩ, OSCEN = High
C
Amplitude tolerance
Amplitude (RS = 7.5 K)
Amplitude flatness
Amplitude temperature coefficient
-20
0
20
Oscillator enable time, tonOsc
2
ns
50% OSCEN High-Low to 50%
Iout
B
Oscillator disable time, toffOsc
3
ns
50% OSCEN Low-High to 50%
Iout
B
Note: A = 100% Tested
B = Guaranteed by Characterization and Design
C= Guaranteed by Design
† (EN2, /EN2), (EN3, /EN3), (EN4, /EN4) pulse rise and fall time = 0.4 ns.
17
Zarlink Semiconductor Inc.
ZL40511/15
6.0
Characteristic Curves
Figure 6 - Write Channel 2, 3 and 4 IP/OP Transfer Characteristic/Temp
Figure 7 - Read Channel IP/OP Transfer Characteristic/Temp
18
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
Figure 8 - Write Channel 2, 3 or 4 IP/OP Transfer Characteristic/Vcc
Figure 9 - Write Channel 2, 3 or 4 IP/OP Best Fit Line% Error
19
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
Figure 10 - Write Channel 2, 3 or 4 ∆ lout% Variation with Temperature
Figure 11 - Write Channel 2, 3 or 4 ∆ lout% Variation with Vcc
20
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
Figure 12 - Oscillator Frequency/RF
Vcc = 5 V, Temp = 25°C
Figure 13 - losc Out/Frequency/
RS = 1 K, 7.5 K, 11 K, Vcc = 5 V, Temp = 25°C
21
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
Figure 14 - losc Amplitude mA pk-pk/RSA or RSB
Vcc = 5 V, Temp = 25°C
Figure 15 - losc/Frequency
RS = 7.5 K, Vcc = 5 V, Temp = 25°C
22
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
Figure 16 - ∆ Freq % Variation with Temperature
Figure 17 - Oscillator Noise Spectral Density
Vcc = 5 V, Temp = 25°C
23
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
7.0
Data Sheet
I/O Diagrams
VCC
300k
Figure 18 - CMOS/LVTTL Input (PWR_UP, OSCEN)
VCC
1.2V
Figure 19 - Oscillator Resistors (RF, RS)
VCC
Vref
Figure 20 - Read Current Input (INR)
24
Zarlink Semiconductor Inc.
ZL40511/15
VCC
Figure 21 - Output (OUTA, OUTB)
VCC
250R
Figure 22 - Write Current Input (IN2, IN3, IN4)
VCC
Figure 23 - LVDS Input (EN2, /EN2), (EN3, /EN3), (EN4, /EN4)
25
Zarlink Semiconductor Inc.
Data Sheet
ZL40511/15
8.0
Data Sheet
Timing Waveforms
Applying logic levels to the inputs, as shown in Table 1, gives the output waveform shown in Figure 26.
PWR_UP
EN2
EN3
EN4
OUTPUT
0
X
X
X
OFF
1
0
0
0
READ
1
1
0
0
LEVEL 2
1
1
1
0
LEVEL 3
1
1
1
1
LEVEL 4
Note: 1 = logic high, 0 = logic low and X = "don’t care"
Table 1 - Output Function for Set Logic Inputs
26
Zarlink Semiconductor Inc.
ZL40511/15
9.0
Data Sheet
Timing Diagrams
/EN(n)
EN(n)
Iout=In(n)*gain
Iout=0
t_on_ch
t_off_ch
Figure 24 - Timing of Read or Write Channels
PWR_UP
50%
/EN2
/EN3
/EN4
LEVEL 4
LEVEL 3
LEVEL 2
READ
OFF
tON_PWR_UP
tON2
tON3
tON4
tOFF4
tOFF3
tOFF2
tOFF_PWR_UP
Figure 25 - Output Waveform Showing Addition of Read and Write Levels
27
Zarlink Semiconductor Inc.
ZL40511/15
10.0
Example Waveforms
10.1
Write Waveform
Data Sheet
The Write output waveform may be produced as shown in example 1, Figure 26. The Erase level is set by switching
off both the Bias level and the Write level. The Write switching waveform is produced by switching off the Erase
level and Switching on the Bias level and then modulating that with the Write level. The peak of the Write waveform
is the sum of the Bias and the Write levels.
WRITE
INPUT
ERASE
BIAS
WRITE
ERASE
WRITE
OUTPUT
ERASE
BIAS
Figure 26 - Example of Write Waveform
NOTES:
1. Only the Write signal changes to modulate the output during the Write pulse.
2. Each of the Write Channels can provide up to 500 mA. It is not necessary to add together the output of more
than one Write Channel to achieve 500 mA.
10.2
Oscillator Waveform
The Oscillator may be enabled independently and is summed with the selected level.
PWR_UP
Osc_En
50%
READ
OFF
Osc_tON
Osc_tOFF
Figure 27 - Example of Oscillator Waveform Superimposed on the Read Waveform
NOTE: The amplitude of the Oscillator must be less than the programmed DC output level to avoid clipping and
subsequent increase in harmonic distortion.
28
Zarlink Semiconductor Inc.
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www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual
property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in
certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.
Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright Zarlink Semiconductor Inc. All Rights Reserved.
TECHNICAL DOCUMENTATION - NOT FOR RESALE