ZL70002/08/09/10 Medical Surge Protection Devices Data Sheet Features • • • • • July 2003 Extremely fast turn-on Very small size and very low leakage 5, 6 and 7 terminals available Standard delivery form: solder bumped die Facilitates compliance with EN-45502 and EN50061 Ordering Information ZL70002/UDJ Bumped Die, Waffle ZL70008/UDJ Bumped Die, Waffle ZL70009/UDJ Bumped Die, Waffle ZL70010/UDJ Bumped Die, Waffle 0 to +55°C Tray Tray Tray Tray Description Superior Quality • • • The ZL70002/08/09/10 family are high performance surge protection devices targeted for medical applications. QA procedures based on MIL-PRF-38535 Traceability for every chip to lot and wafer number 100% burn-in capability Applications • • Pacemakers, Implantable Cardioverter Defibrillators (ICDs), Neurostimulators, Bladder Control Devices Medical devices with electronics requiring protection against a high voltage surge Rb T1 Rb Rb Rb T2 T3 Rb T4 Figure 1 - ZL70010 Block Diagram 1 Zarlink Semiconductor Inc. Rb T5 T6 ZL70002/08/09/10 Rb Rb Rb Rb T1 Data Sheet T4 T3 T2 Rb Rb T5 Rb T7 T6 Figure 2 - ZL70002 Block Diagram Pin Description Table - ZL70010 and ZL70002 Pin # In/Output Name Description 1 I T1 Transient Surge Protection Terminal 1 2 I T2 Transient Surge Protection Terminal 2 3 I T3 Transient Surge Protection Terminal 3 4 I T4 Transient Surge Protection Terminal 4 5 I T5 Transient Surge Protection Terminal 5 6 I T6 Transient Surge Protection Terminal 6 7 I T7 Transient Surge Protection Terminal 7 (ZL70002 only) ZL70010 T1 T2 T3 T4 ZL70002 T5 T6 T1 T2 T3 T4 T5 Figure 3 - ZL70010 and ZL70002 Bumped Chip Appearance 2 Zarlink Semiconductor Inc. T6 T7 ZL70002/08/09/10 Data Sheet Rb Rb Rb T2 T1 T3 SUB1 Rb Rb SUB2 T5 T4 Figure 4 - ZL0008/ZL0009 Block Diagram Pin Description Table - ZL0008 and ZL0009 Pin # In/Output Name Description 1 I T1 Transient Surge Protection Terminal 1 2 I T2 Transient Surge Protection Terminal 2 3 I/O SUB1 Transient Surge Protection Substrate Connection 1 4 I T3 Transient Surge Protection Terminal 3 Doubled Area 5 I/O SUB2 Transient Surge Protection Substrate Connection 2 6 I T4 Transient Surge Protection Terminal 4 7 I T5 Transient Surge Protection Terminal 5 ZL70008 T1 T2 SUB1 T3 SUB2 ZL70009 T4 T5 T1 T2 SUB1 T3 SUB2 Figure 5 - ZL70008 and ZL70009 Bumped Chip Appearance 3 Zarlink Semiconductor Inc. T4 T5 ZL70002/08/09/10 1.0 Data Sheet Functional Description The ZL70002/08/09/10 is a family of transient surge suppressing devices designed specifically for implanted medical devices. The device terminals have an extremely low leakage during normal voltages and can therefore be connected in parallel with the pins of the device it protects. When the voltage rises to dangerous level it then rapidly turns on and limits the voltage by shunting the current through its thyristors. This makes the ZL70002/08/09/10 family an effective means of compliance with international regulations EN-45502, “Active implantable” and the EN50061 “Safety of Implantable Cardiac Pacemakers”. 1.1 ZL70010 ZL70010 is a six-branch device.The suppression is achieved by a self-triggering thyristor-diode device in parallel with a diode between each branch-input and a common node which also is the substrate of the device. The six branches of the device are reached through terminals T1, T2, T3, T4, T5 and T6. The electrical characteristic observed between any two of the terminals (T1, T2, T3, T4, T5 and T6) very much resembles that of a DIAC, see Figure 12. When a transient current is forced between two branch-input terminals, the positive terminal will be clamped to the common node by the diode of one branch and the negative terminal to the forward voltage of the thyristor-diode of the other branch. Due to the low on-state voltage of the thyristor that voltage will stay at a safe value during the transient. 1.2 ZL70002 ZL70002 is a seven-branch device with exactly the same electrical characteristics as ZL70010. 1.3 ZL70008 and ZL70009 ZL70008 and ZL70009 are five-branch transient surge suppressing with the same functionality as ZL70010. The only functional difference is that the substrate of the device is accessible through the two terminals SUB1 and SUB2. 4 Zarlink Semiconductor Inc. ZL70002/08/09/10 Data Sheet 2.0 Application According to the EN-45502 standard, all active medical devices intended for implantation in a human torso should not be permanently affected by an external defibrillation of the patient. Compliance is confirmed if the implanted device continues to meet device specification after being subjected to a sequence of 140 Volt pulses in series with a 300 Ohm resistor between each conductive part of the device including the device case (see EN-45502 for details). Using the ZL70002/08/09/10 protects the implantable device and is an effective means of compliance with the EN-45502 standard where the electronics, in almost all cases, would be destroyed if not protected. The same compliance tests are also described in EN-50061. In the application example shown in Figure 6, each of the dual chamber pacemaker's terminals and case are connected to a terminal on the protection device. If a defibrillation pulse causes the ventricular tip to begin to go positive, relative to the case, the ZL70008/9 thyristor structure rapidly becomes active and forms a low impedance path between T2 and T3 to absorb the current and limit the voltage. This provides an effective means of protection to the pacemaker chip. In actuality, the voltages and currents the implanted device is subjected to in an actual defibrillation can be higher than described in EN-45502/EN-50061 and has been taken into account when designing the ZL70002/08/09/10 family. Surge Protection Device ZL70008/09 T1 T2 T3 T4 Typical Dual Chamber Pacemaker T5 Analog chip Atrial tip lead Digital chip Charge Pump Atrial ring lead Stimulation and Sensing block Case Ventricular tip lead Voltage and Current Reference Ventricular ring lead Figure 6 - Pacemaker Application Example Terminals placed most remotely to others should get special attention since they effectively form a large pick-up coil and could therefore be exposed to a large amount of current. When implanted, the pacemaker case is placed beneath the collarbone and all other terminals are placed together inside the heart. For this reason, the largest current will pass through the surge protection terminal connected to the case of the pacemaker. For ZL70008/9, we recommend that the case be connected to T3 of the protection device which is designed to be able to withstand the largest amount of current. If device ZL700010 is used in a 5 terminal application, we recommend that 2 pins of the protection device be connected to the implantable device terminal with the largest current flow (typically the terminal for the device case). 5 Zarlink Semiconductor Inc. ZL70002/08/09/10 Mechanical Data - ZL70010 528 + 18 um 2.1 Data Sheet 185 + 5 um 650 + 5 um 300 + 25 um 270 + 25 um 4064 + 20 um 1840 + 20 um 1290 + 5 um 108 + 5 um Figure 7 - Size and Bump Placement of ZL70010 528 + 18 um Mechanical Data - ZL70002 185 + 5 um 650 + 5 um 300 + 25 um 270 + 25 um 4700 + 20 um 1290 + 5 um 1850 + 20 um 2.2 108 + 5 um Figure 8 - Size and Bump Placement of ZL70002 6 Zarlink Semiconductor Inc. ZL70002/08/09/10 Data Sheet 2.3 Mechanical Data - ZL70008 and ZL70009 Note that the bump pattern for ZL70008 and ZL70009 differ slightly as shown in Figure 5. Figure 9 depicts ZL70008. 186 + 5 um 342 + 5 um 516 + 5 um 559 + 5 um 372 + 35 um 235 + 35 um 4454 + 20 um 95 + 25/-20 um o 125 + 22 um Barrier layers Si3N4 AL o 66 um o 92 um Figure 10 - Bump Appearance of ZL70002/08/09/10 7 Zarlink Semiconductor Inc. 108 + 5 um Sn/Pb 63/37 1290 + 5 um 2285 + 5 um Figure 9 - Size and Bump Placement of ZL70008 and ZL70009 ZL70002/08/09/10 Data Sheet Absolute Maximum Ratings* Parameter Sym Min Max Units 125 °C 1 Storage Temperature range TS 2 Maximum junction temperature Tj 125 °C 3 Maximum surge current ITSM 8 A 4 Continuous power dissipation Pmax 300 mW -40 Test Conditions Test according to Figure 11. tp for flip mounted chips with underfill: 10 ms t>1 s *Exceeding these values may cause permanent damage. Functional operations under these conditions is not implemented Recommended Operating Conditions 5 Parameter Sym Min Typ1 Max Units Operating temperature range TOP 0 37 55 °C Test Conditions 1) Typical figures are at 37 degrees C and are for design only. DC Electrical Characteristics1 Sym Min Typ2 Max Units ZL70002/10 Vfz 9.0 10.1 11.0 V Iz=10µA ZL70008 Vfz 9.5 10.5 13.5 V Iz=10µA ZL70009 Vfz 9.0 9.5 12.2 V Iz=10µA ZL70008 Vfz 9.0 10.2 12.8 V Iz=10µA ZL70009 Vfz 8.5 9.2 11.5 V Iz=10µA ZL70002/10 Vbo 9.0 11.2 12.2 V Figure 12 ZL70008 Vbo 9.5 11.6 13.5 V Figure 12 ZL70009 Vbo 9.0 10.5 12.2 V Figure 12 ZL70008 Vbo 9.0 11.0 12.8 V Figure 12 ZL70009 Vbo 8.5 9.8 11.5 V Figure 12 Parameter 6 7 8 9 Test Conditions Forward breakdown voltage, Zener diode, terminal to terminal Forward breakdown voltage, Zener diode, terminal to substrate Breakover voltage, terminal to terminal Breakover voltage, terminal to substrate 8 Zarlink Semiconductor Inc. ZL70002/08/09/10 Data Sheet Parameter 10 12 Measured @2A Figure 12 ZL70008 Ibo 28 60 mA Figure 12 ZL70009 Ibo 15 40 mA Figure 12 mA Measured after a current pulse of Ip=0.2A for tp=1ms, RG<200 Ω Figure 13. Holding current Ih 1 On-state voltage terminal to terminal Von 2.2 3.0 V Measured with a 300 µs pulse, IT=1 A Ron 0.4 1 Ω Measured with a 300 µs pulse, dIT=1-2 A Von 1.0 3.0 V Measured with a 300 µs pulse, IT=1 A Id 10 100 nA Measured at 8.5 V (ZL70002/09/10) and at 9.0 V (ZL70008) Id 10 100 nA Measured at 8.5 V (ZL70008) and at 8.0 V (ZL70009) Cp 50 pF Cp 200 pF On-state dynamic resistance On-state voltage terminal to substrate Off-state current terminal to terminal Off-state current terminal to substrate Parasitic capacitance ZL70002/10 19 V mA ZL70008/09 18 Vfwd 60 ZL70002/08/09/10 17 2 Test Conditions 15 ZL70008/09 16 Units Ibo ZL70002/08/09/10 15 Max ZL70002/10 ZL70002/08/09/10 14 Typ2 Breakover current ZL70002/08/09/10 13 Min Forward diode voltage drop, substrate to terminal ZL70008/09 11 Sym Parasitic capacitance ZL70008/09 1) Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. 2) Typical figures are at 37 degrees C and are for design only 9 Zarlink Semiconductor Inc. ZL70002/08/09/10 Data Sheet AC Electrical Characteristics1 Parameter 20 21 Sym Min Typ2 Max Units Test Conditions Measured at 8.0 V (ZL70002/09/10) and at 8.5 V (ZL70008) and defined according to Figure 14. Turn-on delay ZL70002/10 t ond 500 700 ns ZL70008 t ond 140 200 ns ZL70009 t ond 60 100 ns ZL70002/08/10 Vpeak 13 15 V Measured at peak and defined according to Figure 14. ZL70009 Vpeak 11 13 V Measured at peak and defined according to Figure 14. Maximum voltage during surge 1) Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. 2) Typical figures are at 37 degrees C and are for design only. I Slewrate= 4 A/µs ITSM 0.9xITSM 0.1xITSM t tp Figure 11 - 10 ms Surge Current Waveform I IT Ibo Ih Id Ifz U Von Vd Vfz Vbo Figure 12 - Terminal to Terminal Characteristic 10 Zarlink Semiconductor Inc. ZL70002/08/09/10 Data Sheet Rg DUT Ip + Vg Figure 13 - Holding Current Circuit 1V VT Vpeak Ip= 4 A Vfzmin dI/dt = 4A/us t ond Figure 14 - Turn-on Delay Definition 11 Zarlink Semiconductor Inc. t For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request. Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE