19-2327; Rev 1; 7/02 LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL translator that operates at a typical speed of 3GHz. The MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator that operates at a typical speed of 1.3GHz. Both devices can be used to drive either LVECL devices or standard ECL devices with a negative supply range of -2.375V to -5.5V. The devices default to high if the input is disconnected, and feature ultra-low propagation delay: 440ps for the MAX9360, 810ps for the MAX9361. The MAX9360 is specified for operation from -40°C to +85°C in an 8-pin SO package, and 0°C to +85°C in a space-saving, 8-pin SOT23 package. The MAX9361 is specified for operation from -40°C to +85°C for both 8-pin SO and SOT23 packages. Applications Clock/Data-Level Translation Features ♦ Output High with Input Open ♦ -2.375V to -5.5V LVECL/ECL Operation ♦ ESD Protection >2kV (Human Body Model) ♦ 3.0V to 3.6V LVTTL/CMOS Operation (MAX9360) Improved Second Source of the MC100EPT24 Low 13.8mA (typ) IEE Supply Current 440ps (typ) Propagation Delay >300mV Output at 1GHz ♦ 4.5V to 5.5V TTL Operation (MAX9361) Improved Second Source of the MC100ELT24 Low 6.6mA (typ) IEE Supply Current 600ps (typ) Propagation Delay >300mV Output at 250MHz Ordering Information TEMP RANGE PINPACKAGE TOP MARK MAX9360EKA-T -40°C to +85°C 8 SOT23-8 AAJI MAX9360ESA -40°C to +85°C 8 SO MAX9361EKA-T -40°C to +85°C 8 SOT23-8 MAX9361ESA -40°C to +85°C 8 SO PART — AAJJ — Pin Configurations TOP VIEW D 1 8 GND VEE 2 7 Q N.C. 6 Q N.C. 5 VCC N.C. 4 3 N.C. 4 MAX9360/ MAX9361 SOT23 VEE 1 8 VCC D 2 7 Q 3 6 Q 5 GND MAX9360/ MAX9361 SO ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX9360/MAX9361 General Description The MAX9360/MAX9361 are low-skew, single LVTTL/ TTL/CMOS-to-differential LVECL/ECL translators designed for high-speed signal and clock driver applications. For interfacing to LVTTL/TTL/CMOS input signals, these devices operate over a 3.0V to 5.5V supply range, allowing high-performance clock or data distribution. For interfacing to differential LVECL/ECL output signals, these devices operate from a -2.375V to -5.5V supply. MAX9360/MAX9361 LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators ABSOLUTE MAXIMUM RATINGS VCC to GND ..............................................................-0.3V to +6V VEE to GND...............................................................-6V to +0.3V D to GND ....................................................-0.3V to (VCC + 0.3V) Continuous Output Current ................................................50mA Surge Output Current........................................................100mA Junction-to-Ambient Thermal Resistance in Still Air 8-Pin SOT23.............................................................+112°C/W 8-Pin SO...................................................................+170°C/W Junction-to-Ambient Thermal Resistance with 500LFPM Airflow 8-Pin SOT23...............................................................+78°C/W 8-Pin SO.....................................................................+99°C/W Junction-to-Case Thermal Resistance 8-Pin SOT23...............................................................+80°C/W 8-Pin SO..................................................................+40°C/mW Continuous Power Dissipation (TA = +70°C) 8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW 8-Pin SO (derate 5.9mW/°C above +70°C)..................470mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-60°C to +150°C ESD Protection Human Body Model (D, Q, Q).........................................>2kV Soldering Temperature (10s) ...........................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS—MAX9360 (VCC = 3.0V to 3.6V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω ±1% to -2.0V. Typical values are at VCC = 3.3V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Notes 1, 2, 3) PARAMETER SYMBOL CONDITIONS 0°C (SOT23) -40°C (SO) MIN TYP +25°C MAX MIN TYP +85°C MAX MIN TYP UNITS MAX LVTTL INPUT (D) VIN = 2.7V -20 +20 -20 +20 -20 +20 VIN = VCC -10 +10 -10 +10 -10 +10 IIL VIN = 0.5V -200 Input Clamp Voltage VIK IIN = -18mA -1.2 Input High Voltage VIH Input Low Voltage VIL Input High Current IIH Input Low Current -51 -200 -60 -200 -1.2 2.0 -67 µA -1.2 2.0 V 2.0 0.8 µA V 0.8 0.8 V LVECL/ECL OUTPUTS (Q, Q) Output High Voltage VOH -1.145 -0.885 -1.145 -0.885 -1.145 -0.885 V Output Low Voltage VOL -1.935 -1.625 -1.935 -1.625 -1.935 -1.625 V VOH VOL 550 Differential Output Swing (VOH - VOL) 550 550 mV Power-Supply Current ICC (Note 4) 4.3 7.0 5.0 7.0 5.6 7.0 mA Internal Chip Current IEE (Note 4) 12.3 20 13.8 20 15.2 20 mA 2 _______________________________________________________________________________________ LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators (VCC = 4.5V to 5.5V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω ±1% to -2.0V. Typical values are at VCC = 5V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Notes 1, 2, 3) PARAMETER SYMBOL -40°C (SO) CONDITIONS MIN TYP +25°C MAX MIN TYP +85°C MAX MIN TYP UNITS MAX TTL INPUT (D) VIN = 2.7V -30 +30 -30 +30 -30 +30 VIN = VCC -10 +10 -10 +10 -10 +10 IIL VIN = 0.5V -200 Input Clamp Voltage VIK IIN = -18mA -1.2 -1.2 -1.2 V Input High Voltage VIH 2.0 2.0 2.0 V Input Low Voltage VIL Input High Current IIH Input Low Current -55 -200 -61 0.8 -200 -71 0.8 µA µA 0.8 V LVECL/ECL OUTPUTS (Q, Q) Output High Voltage VOH -1.055 -0.880 -1.055 -0.880 -1.025 -0.880 V Output Low Voltage VOL -1.875 -1.555 -1.810 -1.605 -1.810 -1.605 V VOH VOL 550 Differential Output Swing (VOH - VOL) 699 550 691 550 677 mV POWER SUPPLY Power-Supply Current ICC (Note 4) 3.0 7.0 3.5 7.0 4.3 7.0 mA Internal Chip Current IEE (Note 4) 9 20 10 20 11 20 mA _______________________________________________________________________________________ 3 MAX9360/MAX9361 DC ELECTRICAL CHARACTERISTICS—MAX9361 MAX9360/MAX9361 LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators AC ELECTRICAL CHARACTERISTICS—MAX9360 (VCC = 3.0V to 3.6V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω ±1% to -2.0V, input frequency = 1.0GHz, input transition time = 125ps (20% to 80%). Typical values are at VCC = 3.3V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Note 5) PARAMETER SYMBOL 0°C (SOT23) -40°C (SO) +25°C MIN TYP MIN TYP MIN TYP 1.0 3.0 1.0 3.0 1.0 3.0 VOH - VOL ≥ 500mV 0.85 1.5 0.85 1.5 0.85 1.5 tPLHD, tPHLD Figure 1 300 tR , t F Figure 1 70 fMAX Input-to-Output Propagation Delay MAX +85°C VOH - VOL ≥ 300mV Maximum Toggle Frequency Output Rise/Fall Time CONDITIONS 800 300 97 150 80 MAX 800 300 105 150 100 UNITS MAX GHz 800 ps 122 150 ps Added Deterministic Jitter tDJ 2Gbps 223 - 1 PRBS pattern (Note 6) 43 70 43 70 43 70 ps(P-P) Added Random Jitter tRJ 1.0GHz clock pattern (Note 6) 1.4 3.0 1.5 3.0 1.5 3.0 ps(RMS) AC ELECTRICAL CHARACTERISTICS—MAX9361 (VCC = 4.5V to 5.5V, VEE = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω ±1% to -2.0V, input frequency = 100MHz, input transition time = 125ps (20% to 80%). Typical values are at VCC = 5.0V, VIH = 2.0V, VIL = 0.8V, unless otherwise noted.) (Note 5) PARAMETER SYMBOL CONDITIONS -40°C MIN TYP VOH - VOL ≥ 300mV 250 VOH - VOL ≥ 500mV 150 +25°C MAX MIN TYP 1300 250 500 150 +85°C MAX MIN TYP 1300 250 1300 500 150 500 MAX UNITS Maximum Toggle Frequency fMAX Input-to-Output Propagation Delay tPLHD, tPHLD Figure 1 300 561 900 300 583 900 300 607 900 ps tR , t F Figure 1 250 340 1000 250 342 1000 250 353 1000 ps Output Rise/Fall Time MHz Added Deterministic Jitter tDJ 200Mbps 223 - 1 PRBS pattern (Note 6) 81 150 83 150 85 150 ps(P-P) Added Random Jitter tRJ 100MHz clock pattern (Note 6) 4 10 4 10 4 10 ps(RMS) Note 1: Measurements are made with the device in thermal equilibrium. Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. Note 3: DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full operating temperature range. Note 4: All pins are open except VCC, VEE, and GND. Note 5: Guaranteed by design and characterization. Limits are set to ±6 sigma. Note 6: Device jitter added to the input signal. 4 _______________________________________________________________________________________ LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators OUTPUT AMPLITUDE vs. FREQUENCY SUPPLY CURRENT vs. TEMPERATURE SUPPLY CURRENT (mA) IEE 12 8 ICC MAX9360 toc02 16 800 750 OUTPUT AMPLITUDE (mV) MAX9360 toc01 20 700 650 600 550 500 450 400 4 350 300 0 -40 -15 10 35 60 0 85 500 2000 2500 3000 tF 90 MAX9360 toc4 MAX9360 toc03 tR 500 475 PROPAGATION DELAY (ps) TRANSITION TIME (ps) 120 100 1500 PROPAGATION DELAY vs. TEMPERATURE TRANSITION TIME vs. TEMPERATURE 130 110 1000 FREQUENCY (MHz) TEMPERATURE (°C) 450 tPLHD 425 tPHLD 400 375 350 80 -40 -15 10 35 TEMPERATURE (°C) 60 85 -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX9360/MAX9361 Typical Operating Characteristics (MAX9360: VCC = 3.3V and VEE = -5V, VIH = 2.0V, VIL = 0.8V, TA = +25°C, outputs terminated with 50Ω to -2V, input frequency = 1GHz, input transition time = 125ps (20% to 80%), unless otherwise noted.) LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators MAX9360/MAX9361 Pin Description PIN NAME FUNCTION 2 VEE Negative Supply Voltage. Bypass VEE to GND with 0.1µF and 0.01µF ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. 2 1 D 3, 4 3, 4 N.C. No Connect. Connect to GND. 5 8 GND Ground 6 7 Q Inverting Differential LVECL/ECL Output. Typically terminate with 50Ω resistor to -2V. 7 6 Q Noninverting Differential LVECL/ECL Output. Typically terminate with 50Ω resistor to -2V. 8 5 VCC Positive Supply Voltage. Bypass VCC to GND with 0.1µF and 0.01µF ceramic capacitors. Place the capacitors as close to the device as possible with the smaller value capacitor closest to the device. SO SOT23 1 LVTTL/CMOS Input for MAX9360. TTL/CMOS input for MAX9361. VIH 50% 50% VIL D tPLH tPHL VOH Q VOH - VOL SINGLE-ENDED WAVEFORMS VOL Q 80% VOH - VOL 80% 0 (DIFFERENTIAL) VOH - VOL 20% Q-Q 20% DIFFERENTIAL WAVEFORM tR tF Figure 1. Input-to-Output Propagation Delay and Transition Timing Diagram 6 _______________________________________________________________________________________ LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators The MAX9360/MAX9361 are low-skew, single LVTTL/ CMOS/TTL-to-differential LVECL/ECL translators designed for high-speed signal and clock driver applications. For interfacing to LVTTL/TTL/CMOS input signals, these devices operate over a 3.0V to 5.5V supply range, allowing high-performance clock or data distribution in systems with a nominal 3.3V or 5.0V supply. For interfacing to differential LVECL/ECL output signals, these devices operate from a -2.375V to -5.5V supply. The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL translator that operates at typical speeds of 3GHz. The MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator that operates at typical speeds of 1.3GHz. Both devices can be used to drive either LVECL devices or standard ECL devices with a negative supply range of -2.375V to -5.5V. Input The MAX9360/MAX9361 inputs accept standard LVTTL/ TTL/CMOS levels. The input has pullup circuitry that drives the outputs to a differential high if the inputs are open. Differential Output Output levels are referenced to GND and are considered ECL or LVECL, depending on the level of the VEE supply. With GND connected to zero and VEE at -4.2V to -5.5V, the outputs are ECL. The outputs are LVECL when GND is connected to zero and VEE is at -2.375V to -3.8V. Traces Input and output trace characteristics affect the performance of the MAX9360/MAX9361. Connect each signal of a differential output to a 50Ω characteristic impedance trace. Minimize the number of vias to prevent impedance discontinuities. Reduce reflections by maintaining the 50Ω characteristic impedance through connectors and across cables. Reduce skew within a differential pair by matching the electrical length of the traces. On the MAX9360, if the input edge rate approaches the electrical length of the interconnect, then controlledimpedance transmission lines should be used for the input traces. Output Termination Terminate outputs through 50Ω to -2V or use an equivalent Thevenin termination. Terminate both outputs and use the same termination on each for the lowest outputto-output skew. When a single-ended signal is taken from a differential output, terminate both outputs. For example, if Q is used as a single-ended output, terminate both Q and Q. Ensure that the output currents do not exceed the continuous safe output current limit or surge output current limit as specified in the Absolute Maximum Ratings table. Under all operating conditions, the device’s total thermal limits should be observed. Applications Information Chip Information Supply Bypassing Bypass VCC and VEE to ground with high-frequency surface-mount ceramic 0.1µF and 0.01µF capacitors in parallel as close to the device as possible, with the 0.01µF value capacitor closest to the device. Use multiple parallel vias for low inductance. TRANSISTOR COUNT: 330 PROCESS: Bipolar _______________________________________________________________________________________ 7 MAX9360/MAX9361 Detailed Description Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) SOT23, 8L.EPS MAX9360/MAX9361 LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators 8 _______________________________________________________________________________________ LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators SOICN.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX9360/MAX9361 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)