89HPES24T6 Product Brief 24-Lane 6-Port PCI Express® Switch Device Overview Legacy Support – PCI compatible INTx emulation – Bus locking ◆ Highly Integrated Solution – Requires no external components – Incorporates on-chip internal memory for packet buffering and queueing – Integrates twenty-four 2.5 Gbps embedded SerDes with 8B/ 10B encoder/decoder (no separate transceivers needed) ◆ Reliability, Availability, and Serviceability (RAS) Features – Supports ECRC and Advanced Error Reporting – Internal end-to-end parity protection on all TLPs ensures data integrity even in systems that do not implement end-to-end CRC (ECRC) – Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O – Compatible with Hot-Plug I/O expanders used on PC and server motherboards ◆ Power Management – Utilizes advanced low-power design techniques to achieve low typical power consumption – Supports PCI Power Management Interface specification (PCI-PM 1.1) • Supports device power management states: D0, D3hot and D3cold – Unused SerDes are disabled ◆ The 89HPES24T6 is a member of the IDT PRECISE™ family of PCI Express® switching solutions. The PES24T6 is a 24-lane, 6-port peripheral chip that performs PCI Express Packet switching with a feature set optimized for high performance applications such as servers, storage, and communications/networking. It provides connectivity and switching functions between a PCI Express upstream port and up to five downstream ports and supports switching between downstream ports. Features High Performance PCI Express Switch – Twenty-four 2.5 Gbps PCI Express lanes – Six switch ports – Upstream port configurable up to x8 – Downstream ports configurable up to x8 – Low-latency cut-through switch architecture – Support for Max Payload Size up to 2048 bytes – One virtual channel – Eight traffic classes – PCI Express Base Specification Revision 1.1 compliant ◆ Flexible Architecture with Numerous Configuration Options – Automatic per port link width negotiation to x8, x4, x2 or x1 – Automatic lane reversal on all ports – Automatic polarity inversion on all lanes – Ability to load device configuration from serial EEPROM ◆ Block Diagram 6-Port Switch Core / 24 PCI Express Lanes Frame Buffer Port Arbitration Route Table Scheduler Transaction Layer Transaction Layer Transaction Layer Data Link Layer Data Link Layer Data Link Layer Multiplexer / Demultiplexer Multiplexer / Demultiplexer Multiplexer / Demultiplexer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer Phy Logical Layer SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes SerDes (Port 0) (Port 1) (Port 5) Figure 1 Internal Block Diagram IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. 1 of 2 © 2007 Integrated Device Technology, Inc. February 8, 2007 IDT Testability and Debug Features – Ability to read and write any internal register via the SMBus ◆ Eleven General Purpose Input/Output Pins – Each pin may be individually configured as an input or output – Each pin may be individually configured as an interrupt input – Some pins have selectable alternate functions ◆ Packaged in 27x27mm 420-ball BGA with 1mm ball spacing ◆ Processor Processor Memory Memory Memory Memory North Bridge x8 Product Description Utilizing standard PCI Express interconnect, the PES24T6 provides the most efficient fan-out solution for applications requiring high throughput, low latency, and simple board layout with a minimum number of board layers. It provides 12 GBps (96 Gbps) of aggregated, full-duplex switching capacity through 24 integrated serial lanes, using proven and robust IDT technology. Each lane provides 2.5 Gbps of bandwidth in both directions and is fully compliant with PCI Express Base specification 1.1. PES24T6 x4 PCI Express Slots x8 Upstream 5-port 4-port x8 x8 PES24T6 x4 x4 x4 x4 x4 x4 I/O 10GbE I/O 10GbE I/O SATA I/O SATA Figure 2 I/O Expansion Application The PES24T6 is based on a flexible and efficient layered architecture. The PCI Express layers consist of SerDes, Physical, Data Link and Transaction layers. The PES24T6 can operate either as a store and forward or cut-through switch and is designed to switch memory and I/O transactions. It supports eight Traffic Classes (TCs) and one Virtual Channel (VC) with sophisticated resource management to enable efficient switching and I/O connectivity. 6-port x4 3-port x8 PES24T6 x8 x4 x4 PES24T6 x8 x8 x4 Upstream x4 PES24T6 x4 x4 x4 x4 x4 Figure 3 Configuration Options CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 2 of 2 for Tech Support: email: [email protected] phone: 408-284-8208 February 8, 2007