OXFORD OXAN1

Application Note OXAN 1
Customer perception of performance
in IEEE 1394 Applications
Contents
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Introduction
Description
Optimisation of OXFW911
Graphs of OXFW911 performance
Optimal Performance
Conclusion
Introduction
This application note details the parameters important for
customer perception of performance in IEEE 1394
applications. Much attention is given to the maximum
performance of any given system. However, in the majority
of applications small data block sizes are used and
maximum performance will not be achieved.
Description
In all data transfer operations, optimal performance is
achieved when large data block sizes are transferred.
Each transaction consists of a protocol stage, a drive spin
stage and a fetch data stage. The larger the amount of
data transferred in each transaction, the smaller
percentage of time is spent on drive spin up and protocol.
In normal operation, the most frequently used applications
do not transfer large amounts of data. An example of this
is browsing a directory structure. This can be done
frequently and transfers, at most, 4k of data per
transaction.
Although all companies quote the highest data rate
achievable, the customer will rarely see this performance.
Their judgement of speed will be based on the speed
during normal, small block size performance.
This area has become of concern within the IEEE 1394
community. Protocol changes are being considered to
reduce the time spent on the protocol phase of the
transaction and so greatly improve small block size
performance.
Optimisation of OXFW911
Oxford Semiconductor Ltd.
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK
Tel: +44 (0)1235 824900
Fax: +44(0)1235 821141
Oxford Semiconductor has designed the OXFW911 IEEE
1394 to IDE bridge with improved performance in mind.
They have integrated the 16-bit flash memory onto the
device to minimise the wait states incurred in accessing the
flash. They have also optimised the interaction of the
ARM7-TDMI based hardware and the firmware to reduce
the relative time spent on the SBP-2 protocol conversion.
Graphs of OXFW911 Performance
Figure 1 details the performance of the OXFW911 with
various block sizes versus the same drive placed on the
internal IDE bus. So far these figures for the OXFW911
have been limited by the speed of the drive used for
testing, and the bus. These figures will be updated once
faster drives are available.
The tests were carried out on a NEC DTLA-307020
20.5GB hard disk using 15-11-2000 firmware. The tests
were carried out on a Windows 2000 system using YAPT.
The Host was a Dell PIII 800 with 128M RAM.
Optimal Performance
While testing the OXFW911, it has been noted that several
factors influence the maximum speed obtained. The main
factors are the operating system used, the drive speed and
the OHCI card.
Conclusion
Customer perception of drive performance is determined
during normal use. In most cases the data block sizes
transferred are small. Therefore, increased performance at
small block sizes will greatly increase the customers’
perception of drive speed.
The OXFW911 has been optimised in both hardware and
firmware to take full advantage of the ARM7TDMI
processor. This optimisation has resulted in excellent
performance at small block sizes, this can be better then
when the drive is connected internally.
.
 Oxford Semiconductor 2000.
OXAN 1 Application Note Revision 1 – December 2000
Part Numbers – OXFW911
OXAN 1
OXFORD SEMICONDUCTOR LTD.
Sequential Read Performance in UDMA4
40
Speed (Mbps)
35
30
25
On Internal IDE Bus
20
Over IEEE1394 bus using
OXFW911
15
10
5
0
1
2
4
8
16
32
64
128 256 512 10242048
Block Size (kB)
Figure 1 - IEEE 1394 Performance Vs Internal IDE Performance.
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OXFORD SEMICONDUCTOR LTD.
OXAN 1
Contact Details
Oxford Semiconductor Ltd.
25 Milton Park
Abingdon
Oxfordshire
OX14 4SH
United Kingdom
Telephone:
Fax:
Sales e-mail:
Web site:
+44 (0)1235 824900
+44 (0)1235 821141
[email protected]
http://www.oxsemi.com
DISCLAIMER
Oxford Semiconductor believes the information contained in this document to be accurate and reliable. However, it is subject to
change without notice. No responsibility is assumed by Oxford Semiconductor for its use, nor for infringement of patents or other
rights of third parties. No part of this publication may be reproduced, or transmitted in any form or by any means without the prior
consent of Oxford Semiconductor Ltd. Oxford Semiconductor’s terms and conditions of sale apply at all times.
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