19-3404; Rev 0; 9/04 KIT ATION EVALU E L B A AVAIL LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements The MAX2016 dual logarithmic detector/controller is a fully integrated system designed for measuring and comparing power, gain/loss, and voltage standing-wave ratio (VSWR) of two incoming RF signals. An internal broadband impedance match on the two differential RF input ports allows for the simultaneous monitoring of signals ranging from low frequency to 2.5GHz. The MAX2016 uses a pair of logarithmic amplifiers to detect and compare the power levels of two RF input signals. The device internally subtracts one power level from the other to provide a DC output voltage that is proportional to the power difference (gain). The MAX2016 can also measure the return loss/VSWR of an RF signal by monitoring the incident and reflected power levels associated with any given load. A window detector is easily implemented by using the on-chip comparators, OR gate, and 2V reference. This combination of circuitry provides an automatic indication of when the measured gain is outside a programmable range. Alarm monitoring can thus be implemented for detecting high-VSWR states (such as open or shorted loads). The MAX2016 operates from a single +2.7V to +5.25V* power supply and is specified over the extended -40°C to +85°C temperature range. The MAX2016 is available in a space-saving, 5mm x 5mm, 28-pin thin QFN. Applications Return Loss/VSWR Measurements Dual-Channel RF Power Measurements Dual-Channel Precision AGC/RF Power Control Log Ratio Function for RF Signals Remote System Monitoring and Diagnostics Features ♦ Complete Gain and VSWR Detector/Controller ♦ Dual-Channel RF Power Detector/Controller ♦ Low-Frequency to 2.5GHz Frequency Range ♦ Exceptional Accuracy Over Temperature ♦ High 80dB Dynamic Range ♦ 2.7V to 5.25V Supply Voltage Range* ♦ Internal 2V Reference ♦ Scaling Stable Over Supply and Temperature Variations ♦ Controller Mode with Error Output ♦ Available in 5mm x 5mm 28-Pin Thin QFN Package *See Power-Supply Connection section. Ordering Information TEMP RANGE PINPACKAGE MAX2016ETI -40°C to +85°C 28 Thin QFN-EP*, T2855-3 bulk MAX2016ETI-T -40°C to +85°C 28 Thin QFN-EP*, T2855-3 T/R MAX2016ETI+D -40°C to +85°C 28 Thin QFN-EP*, T2855-3 lead free, bulk MAX2016ETI+TD -40°C to +85°C 28 Thin QFN-EP*, T2855-3 lead free, T/R PART *EP = Exposed pad. + = Lead free. D = Dry pack. Pin Configuration OUTA SETA REF SETB OUTB FB2 RF/IF Power Amplifier (PA) Linearization FA2 Cellular Base Station, Microwave Link, Radar, and other Military Applications 28 27 26 25 24 23 22 FA1 1 21 FB1 VCC 2 20 VCC RFINA+ 3 RFINA- 4 GND 5 17 GND COUTH 6 16 COUTL CSETH 7 19 RFINB+ MAX2016 18 RFINB- 9 10 11 12 13 14 VCC SETD OUTD VCC FV2 FV1 15 CSETL 8 COR Typical Application Circuit appears at end of data sheet. PKG CODE THIN QFN ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX2016 General Description MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements ABSOLUTE MAXIMUM RATINGS VCC to GND .........................................................-0.3V to +5.25V Input Power Differential (RFIN_+, RFIN_-)......................+23dBm Input Power Single Ended (RFIN_+ or RFIN _-) .............+19dBm All Other Pins to GND.................................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70°C) 28-Pin, 5mm x 5mm Thin QFN (derate 35.7mW/°C above +70°C)..................................................................2.8W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +2.7V to +3.6V, R1 = R2 = R3 = 0Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V, CSETL = CSETH = VCC, 50Ω RF system, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLY Supply Voltage Total Supply Current VS R6 = 0Ω 2.7 3.3 3.6 VS R6 = 37.4Ω 4.75 5 5.25 43 55 ICC Measured in each pin 2 and pin 20 Supply Current V mA 16 Measured in pin 9 2 Measured in pin 12 9 mA INPUT INTERFACE Input Impedance Input Resistance R Differential impedance at RFINA and RFINB 50 Resistance at SETD 20 Resistance at SETA and SETB 40 Ω kΩ DETECTOR OUTPUT Source Current Measured at OUTA, OUTB, and OUTD 4 mA Sink Current Measured at OUTA, OUTB, and OUTD 0.45 mA Minimum Output Voltage Measured at OUTA, OUTB, and OUTD 0.5 V Maximum Output Voltage Measured at OUTA, OUTB, and OUTD 1.8 V Difference Output VOUTD PRFINA = PRFINB = -30dBm 1 V ±12 mV OUTD Accuracy COMPARATORS Output High Voltage VOH RLOAD ≥ 10kΩ VCC 10mV V Output Low Voltage VOL RLOAD ≥ 10kΩ 10 mV GND to VCC V 1 nA Input Voltage Measured at CSETL and CSETH Input Bias Current CSETL and CSETH REFERENCE Output Voltage on Pin 25 RLOAD ≥ 2kΩ 2 V Load Regulation Source 2mA -5 mV 2 _______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements (Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2.5 GHz RF Input Frequency Range fRF AC-coupled input Return Loss S11 0.1GHz to 3GHz 20 dB PRFIN = no signal to 0dBm, ±0.5dB settling accuracy 100 ns -70 to +10 dBm Large-Signal Response Time RSSI MODE—0.1GHz RF Input Power Range (Note 2) ±3dB Dynamic Range TA = -20°C to +85°C (Note 3) Range Center 80 dB -32 dBm TA = +25°C to +85°C +0.0083 TA = +25°C to -20°C -0.0083 Temperature Sensitivity PRFINA = PRFINB = -32dBm Slope (Note 4) Typical Slope Variation TA = -20°C to +85°C Intercept (Note 5) -100 dBm Typical Intercept Variation TA = -20°C to +85°C 0.03 dBm/°C -70 to +10 dBm dB/°C 19 mV/dB -4 µV/°C RSSI MODE—0.9GHz RF Input Power Range (Note 2) ±3dB Dynamic Range TA = -20°C to +85°C (Note 3) Range Center Temperature Sensitivity PRFINA = PRFINB = -30dBm Slope (Note 4) Typical Slope Variation Intercept Typical Intercept Variation 80 dB -30 dBm TA = +25°C to +85°C +0.0083 TA = +25°C to -20°C -0.0083 dB/°C 18.1 mV/dB TA = -20°C to +85°C -4 µV/°C (Note 5) -97 dBm TA = -20°C to +85°C 0.02 dBm/°C -55 to +12 dBm RSSI MODE—1.9GHz RF Input Power Range (Note 2) ±3dB Dynamic Range TA = -20°C to +85°C (Note 3) Range Center Temperature Sensitivity PRFINA = PRFINB = -27dBm 67 dB -27 dBm TA = +25°C to +85°C +0.0125 TA = +25°C to -20°C -0.0125 dB/°C Slope (Note 4) Typical Slope Variation TA = -20°C to +85°C 18 mV/dB -4.8 µV/°C Intercept (Note 5) -88 dBm Typical Intercept Variation TA = -20°C to +85°C 0.03 dBm/°C _______________________________________________________________________________________ 3 MAX2016 AC ELECTRICAL CHARACTERISTICS—OUTA AND OUTB MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements AC ELECTRICAL CHARACTERISTICS—OUTA AND OUTB (continued) (Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RSSI MODE—2.17GHz RF Input Power Range (Note 2) ±3dB Dynamic Range TA = -20°C to +85°C (Note 3) Range Center PRFINA = PRFINB = -25dBm Temperature Sensitivity -52 to +12 dBm 64 dB -25 dBm TA = +25°C to +85°C +0.0135 TA = +25°C to -20°C -0.0135 dB/°C Slope (Note 4) 17.8 mV/dB Typical Slope Variation TA = -20°C to +85°C -8 µV/°C Intercept (Note 5) -81 dBm Typical Intercept Variation RSSI MODE—2.5GHz TA = -20°C to +85°C 0.03 dBm/°C RF Input Power Range (Note 2) ±3dB Dynamic Range TA = -20°C to +85°C (Note 3) -45 to +7 52 Range Center dBm dB -23 PRFINA = PRFINB = -23dBm Temperature Sensitivity TA = +25°C to +85°C TA = +25°C to -20°C dBm +0.0167 -0.0167 17.8 mV/dB -8 µV/°C dB/°C Slope (Note 4) Typical Slope Variation TA = -20°C to +85°C Intercept (Note 5) -80 dBm Typical Intercept Variation TA = -20°C to +85°C 0.03 dBm/°C AC ELECTRICAL CHARACTERISTICS—OUTD (Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTD Center Point PRFINA = PRFINB 1 V Small-Signal Envelope Bandwidth No external capacitor on pins FV1 and FV2 22 MHz Small-Signal Settling Time Any 8dB change on the inputs, no external capacitor on FV1 and FV2, settling accuracy is ±0.5dB 150 ns Large-Signal Settling Time Any 30dB change on the inputs, no external capacitor on pins FV1 and FV2, settling accuracy is ±0.5dB 300 ns Small-Signal Rise and Fall Time Any 8dB step, no external capacitor on pins FV1 and FV2 15 ns 4 _______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements (Typical Application Circuit, VCC = +2.7V to +3.3V, R1 = R2 = R3 = 0Ω, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.3V, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER Large-Signal Rise and Fall Time ±1dB Dynamic Range SYMBOL CONDITIONS 35 0.1GHz PRFINB = -32dBm 80 0.9GHz PRFINB = -30dBm 75 1.9GHz PRFINB = -27dBm 60 2.17GHz PRFINB = -25dBm 55 2.5GHz PRFINB = -23dBm 50 fRF = 0.1GHz to 2.5GHz OUTD Voltage Deviation PRFINA = PRFINB = -30dBm, TA = -20°C to +85°C Gain Measurement Balance Channel Isolation TYP Any 30dB step, no external capacitor on pins FV1 and FV2 Slope ±1dB Dynamic Range over Temperature Relative to Best-Fit Curve at +25°C MIN PRFINA is swept ; TA = -20°C to +85°C 25 ±0.25 0.1GHz, PRFINB = -32dBm 80 0.9GHz, PRFINB = -30dBm 70 1.9GHz, PRFINB = -27dBm 55 2.17GHz, PRFINB = -25dBm 50 2.5GHz, PRFINB = -23dBm 45 PRFINB = PRFINB = -50dBm to -5dBm, fRF = 1.9GHz 0.2 0.9GHz 90 1.9GHz 65 2.5GHz 55 MAX UNITS ns dB mV/dB dB dB dB dB The MAX2016 is tested at TA = +25°C and is guaranteed by design for TA = -40°C to +85°C. Typical minimum and maximum range of the detector at the stated frequency. Dynamic range refers to the range over which the error remains within the ±3dB range. The slope is the variation of the output voltage per change in input power. It is calculated by fitting a root-mean-square straight line to the data indicated by the RF input power range. Note 5: The intercept is an extrapolated value that corresponds to the output power for which the output voltage is zero. It is calculated by fitting a root-mean-square straight line to the data. Note 1: Note 2: Note 3: Note 4: _______________________________________________________________________________________ 5 MAX2016 AC ELECTRICAL CHARACTERISTICS—OUTD (continued) Typical Operating Characteristics (MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0Ω, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE fIN = 100MHz PRFINB = -32dBm NORMALIZED TO DATA AT +25°C 2 1 ERROR (dB) TA = -20°C, +25°C, +85°C 1.5 3 1.0 TA = -20°C 0 TA = +85°C -1 0.5 -2 0 -3 -10 10 30 -50 -30 -10 10 30 50 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB) DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE fIN = 900MHz PRFINB = -30dBm PRFINA IS SWEPT 2.0 fIN = 900MHz PRFINB = -30dBm NORMALIZED TO DATA AT +25°C 2 1 TA = -20°C, +25°C, +85°C 1.5 3 ERROR (dB) 1.0 TA = -20°C 0 TA = +85°C -1 0.5 -2 0 -3 -30 -10 10 30 -50 -30 -10 10 30 50 MAGNITUDE RATIO (dB) MAGNITUDE RATIO (dB) DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE 2.5 fIN = 1900MHz PRFINB = -27dBm PRFINA IS SWEPT TA = -20°C 2.0 50 3 MAX2016 toc05 -50 fIN = 1900MHz PRFINB = -27dBm NORMALIZED TO DATA AT +25°C 2 TA = +25°C MAX2016 toc06 VOUTD (V) 50 MAX2016 toc04 2.5 -30 MAX2016 toc03 -50 ERROR (dB) 1 1.5 TA = +85°C 1.0 TA = -20°C 0 -1 0.5 TA = +85°C -2 0 -3 -40 -20 0 20 MAGNITUDE RATIO (dB) 6 MAX2016 toc02 fIN = 100MHz PRFINB = -32dBm PRFINA IS SWEPT 2.0 VOUTD (V) DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE MAX2016 toc01 2.5 VOUTD (V) MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements 40 -40 -20 0 20 40 MAGNITUDE RATIO (dB) _______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE TA = -20°C TA = +85°C 1.5 fIN = 2170MHz PRFINB = -25dBm NORMALIZED TO DATA AT +25°C 2 1 ERROR (dB) TA = +25°C 1.0 TA = -20°C 0 -1 0.5 -2 0 -3 -25 2.5 -5 15 35 -20 0 40 20 MAGNITUDE RATIO (dB) DIFFERENTIAL OUTPUT VOLTAGE vs. A/B DIFFERENCE DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE fIN = 2500MHz PRFINB = -23dBm PRFINA IS SWEPT 2.0 -40 MAGNITUDE RATIO (dB) TA = -20°C fIN = 2500MHz PRFINB = -23dBm NORMALIZED TO DATA AT +25°C TA = -20°C 2 1 ERROR (dB) TA = +25°C 1.5 3 MAX2016 toc09 -45 VOUTD (V) TA = +85°C TA = +85°C 1.0 MAX2016 toc10 VOUTD (V) 2.0 3 MAX2016 toc08 fIN = 2170MHz PRFINB = -25dBm PRFINA IS SWEPT MAX2016 toc07 2.5 DIFFERENTIAL OUTPUT-VOLTAGE ERROR vs. A/B DIFFERENCE 0 -1 TA = +85°C 0.5 -2 0 -3 -20 0 20 40 -40 -20 MAGNITUDE RATIO (dB) DIFFERENTIAL OUTPUT-VOLTAGE BALANCE VOUTD (V) 1.00 TA = +85°C 0.95 -15 TA = -20°C -20 -25 TA = +85°C TA = +25°C -30 -35 -40 -45 TA = +25°C TA = -20°C PRFINA = PRFINB - 5dB 0.90 S11 MAGNITUDE MAGNITUDE (dB) fIN = 1900MHz TA = +25°C TA = +85°C T = -20°C A TA = +25°C PRFINA = PRFINB + 5dB TA = +85°C PRFINA = PRFINB TA = -20°C 1.05 40 20 -10 MAX2016 toc11 1.15 1.10 0 MAGNITUDE RATIO (dB) MAX2016 toc12 -40 -50 -55 0.85 -60 -60 -45 -30 PRFINA (dBm) -15 0 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz) _______________________________________________________________________________________ 7 MAX2016 Typical Operating Characteristics (continued) (MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0Ω, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0Ω, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) VOUTA vs. PRFINA VOUTA ERROR vs. PRFINA TA = -20°C TA = +25°C 2.0 fIN = 100MHz NORMALIZED TO DATA AT +25°C 2 1 ERROR (dB) 1.0 TA = -20°C 0 TA = +85°C -1 0.5 -2 0 -3 -60 -40 -20 0 20 -80 -60 -40 PRFINA (dBm) VOUTA vs. PRFINA 3 MAX2016 toc15 fIN = 900MHz TA = -20°C TA = +25°C fIN = 900MHz NORMALIZED TO DATA AT +25°C 2 ERROR (dB) VOUTA (V) 1 TA = +85°C 1.5 20 0 VOUTA ERROR vs. PRFINA 2.5 2.0 -20 PRFINA (dBm) 1.0 TA = -20°C 0 TA = +85°C -1 0.5 MAX2016 toc16 -80 -2 0 -3 -80 -60 -40 -20 0 20 -75 -60 -45 PRFINA (dBm) VOUTA vs. PRFINA 0 3 MAX2016 toc17 TA = -20°C 2.0 -15 15 VOUTA ERROR vs. PRFINA 2.5 fIN = 1900MHz -30 PRFINA (dBm) TA = +25°C MAX2016 toc18 VOUTA (V) TA = +85°C 1.5 MAX2016 toc14 fIN = 100MHz 3 MAX2016 toc13 2.5 fIN = 1900MHz NORMALIZED TO DATA AT +25°C 2 1.5 TA = +85°C 1.0 ERROR (dB) 1 VOUTA (V) MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements TA = -20°C 0 TA = +85°C -1 0.5 -2 0 -3 -65 -45 -25 PRFINA (dBm) 8 -5 15 -65 -45 -25 -5 PRFINA (dBm) _______________________________________________________________________________________ 15 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements VOUTA ERROR vs. PRFINA VOUTA vs. PRFINA TA = -20°C 1 ERROR (dB) 1.5 TA = +85°C 1.0 TA = -20°C 0 -1 0.5 TA = +85°C -2 -3 0 -60 -45 -30 -15 0 -60 15 -45 TA = -20°C TA = +25°C fIN = 2500MHz NORMALIZED TO DATA AT +25°C 2 15 TA = -20°C 1 ERROR (dB) VOUTA (V) 0 3 MAX2016 toc21 fIN = 2500MHz 1.5 1.0 -15 VOUTA ERROR vs. PRFINA VOUTA vs. PRFINA 2.5 2.0 -30 PRFINA (dBm) PRFINA (dBm) TA = +85°C MAX2016 toc22 VOUTA (V) fIN = 2170MHz NORMALIZED TO DATA AT +25°C 2 TA = +25°C MAX2016 toc20 fIN = 2170MHz 2.0 3 MAX2016 toc19 2.5 0 -1 0.5 TA = +85°C -2 -3 0 -60 -45 -30 -15 PRFINA (dBm) 0 15 -60 -45 -30 -15 0 15 PRFINA (dBm) _______________________________________________________________________________________ 9 MAX2016 Typical Operating Characteristics (continued) (MAX2016 EV kit, VCC = 3.3V, R1 = R2 = R3 = 0Ω, CSETL = CSETH = VCC, TA = +25°C, unless otherwise noted.) MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements Pin Description PIN NAME FUNCTION 1, 28 FA1, FA2 External Capacitor Input. Connecting a capacitor between FA1 and FA2 sets the highpass cutoff frequency corner for detector A (see the Input Highpass Filter section). 2, 9, 12, 20 VCC 3, 4 RFINA+, RFINA- Supply Voltage. Bypass with capacitors as specified in the Typical Application Circuit. Place capacitors as close to each VCC as possible (see the Power-Supply Connections section). Differential RF Inputs for Detector A. Requires external DC-blocking capacitors. 5, 17 GND 6 COUTH Ground. Connect to the printed circuit (PC) board ground plane. High-Comparator Output 7 CSETH Threshold Input on High Comparator 8 COR Comparator OR Logic Output. Output of COUTH ORed with COUTL. 10 SETD Set-Point Input for Gain Detector 11 OUTD DC Output Voltage Representing PRFINA - PRFINB. This output provides a DC voltage proportional to the difference of the input RF powers on RFINA and RFINB. 13, 14 FV2, FV1 Video-Filter Capacitor Inputs for OUTD 15 CSETL Threshold Set Input on Low Comparator 16 COUTL Low-Comparator Output 18, 19 RFINB-, RFINB+ 21, 22 FB1, FB2 23 OUTB 24 SETB 25 REF 26 SETA Set-Point Input for Detector A 27 OUTA Detector A Output. This output provides a voltage proportional to the log of the input power on differential inputs RFINA+ and RFINA- (RFINA). EP GND Exposed Paddle. EP must connect to the PC board ground plane. Differential RF Inputs for Detector B. Requires external DC-blocking capacitors. External Capacitor Input. Connecting a capacitor between FB1 and FB2 sets the highpass cutoff frequency corner for detector B (see the Input Highpass Filter section). Detector B Output. This output provides a voltage proportional to the log of the input power on differential inputs RFINB+ and RFINB- (RFINB). Set-Point Input for Detector B 2V Reference Output Detailed Description The MAX2016 dual logarithmic amplifier is designed for a multitude of applications including dual-channel RF power measurements, AGC control, gain/loss detection, and VSWR monitoring. This device measures RF signals ranging from low frequency to 2.5GHz, and operates from a single 2.7V to 5.25V (using series resistor, R6) power supply. As with its single-channel counterpart (MAX2015), the MAX2016 provides unparalleled performance with a high 80dB dynamic range at 100MHz and exceptional accuracy over the extended temperature and supply voltage ranges. The MAX2016 uses a pair of logarithmic amplifiers to detect and compare the power levels of two RF input signals. The device subtracts one power level from the other to provide a DC output voltage that is proportional 10 to the power difference (gain). The MAX2016 can also measure the return loss/VSWR of an RF signal by monitoring the incident and reflected power levels associated with any given load. A window detector is easily implemented by using the on-chip comparators, OR gate, and 2V reference. This combination of circuitry provides an automatic indication of when the measured gain is outside a programmable range. Alarm monitoring can thus be implemented for detecting high-VSWR states (such as open or shorted loads). RF Inputs (RFINA and RFINB) The MAX2016 has two differential RF inputs. The input to detector A (RFINA) uses the two input ports RFINA+ and RFINA-, and the input to detector B (RFINB) uses the two input ports RFINB+ and RFINB-. ______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016 Table 1. Component Values Used in the Typical Application Circuit DESIGNATION VALUE C1, C2, C8, C9 680pF Microwave capacitors (0402) C3, C6, C10, C13 33pF Microwave capacitors (0402) C4, C7, C11, C14 0.1µF C5, C12, C15 Not used C18 10µF R1, R2, R3 R6 DESCRIPTION Microwave capacitors (0603) Capacitors are optional for frequency compensation Tantalum capacitor (C case) 0Ω Resistors (0402) 0Ω Resistor (1206) for VS = 2.7V to 3.6V 37.4Ω ±1% resistor (1206) for VS = 4.75V to 5.25V The differential RF inputs allow for the measurement of broadband signals ranging from low frequency to 2.5GHz. For single-ended signals, RFINA- and RFINBare AC-coupled to ground. The RF inputs are internally biased and need to be AC-coupled. Using 680pF capacitors, as shown in the Typical Application Circuit, results in a 10MHz highpass corner frequency. An internal 50Ω resistor between RFINA+ and RFINA- (as well as RFINB+ and RFINB-) produces a good low-frequency to 3.0GHz match. SETA, SETB, and SETD Inputs The SET_ inputs are used for loop control when the device is in controller mode. Likewise, these same SET_ inputs are used to set the slope of the output signal (mV/dB) when the MAX2016 is in detector mode. The center node of the internal resistor-divider is fed to the negative input of the power detector’s internal output op amp. Reference The MAX2016 has an on-chip 2V voltage reference. The internal reference output is connected to REF. The output can be used as a reference voltage source for the comparators or other components and can source up to 2mA. OUTA and OUTB Each OUT_ is a DC voltage proportional to the RF input power level. The change of OUT_ with respect to the power input is approximately 18mV/dB (R1 = R2 = 0Ω). The input power level can be determined by the following equation: PRFIN _ = VOUT _ SLOPE + PINT where PINT is the extrapolated intercept point of where the output voltage intersects the horizontal axis. OUTD OUTD is a DC voltage proportional to the difference of the input RF power levels. The change of the OUTD with respect to the power difference is 25mV/dB (R3 = 0Ω). The difference of the input power levels (gain) can be determined by the following equation: PRFINA − PRFINB = (VOUTD − VCENTER ) SLOPE where VCENTER is the output voltage, typically 1V, when PRFINA = PRFINB. Applications Information Monitoring VSWR and Return Loss The MAX2016 can be used to measure the VSWR of an RF signal, which is useful for detecting the presence or absence of a properly loaded termination, such as an antenna (see Figure 1). The transmitted wave from the power amplifier is coupled to RFINA and to the antenna. The reflected wave from the antenna is connected to RFINB through a circulator. When the antenna is missing or damaged, a mismatch in the nominal load impedance results, leading to an increase in reflected power and subsequent change in the transmission line’s VSWR. This increase in reflected power is manifested by a reduction in the voltage at OUTD. An alarm condition can be set by using the low comparator output (COUTL) as shown in Figure 1. The comparator automatically senses the change in VSWR, yielding a logic 0 as it compares OUTD to a low DC voltage at CSETL. CSETL, in turn, is set by using the internal reference voltage and an external resistor-divider network. Figure 1 illustrates a simple level detector. For windowdetector implementation, see the Comparator/Window Detector section. ______________________________________________________________________________________ 11 MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements VREF CSETL RFINA RFINB COUPLER LOGARITHMIC DETECTOR COUTL COUTL LOGARITHMIC DETECTOR OUTD ATTENUATOR OUTD SETD TRANSMITTER CIRCULATOR MAX2016 20kΩ GND Figure 1. VSWR Monitoring Configuation RFINA LOGARITHMIC DETECTOR RFINB LOGARITHMIC DETECTOR OUTD µP ADC SETD MAX2016 20kΩ GND LOAD IN 4-PORT DIRECTIONAL COUPLER Figure 2. Measuring Return Loss and VSWR of a Given Load Measuring VSWR and Return Loss In Figure 2, the two logarithmic amplifiers measure the incident and the reflected power levels to produce two proportional output voltages at OUTA and OUTB. Since OUTD is a DC voltage proportional to the difference of OUTA and OUTB, return loss (RL) and VSWR can be easily calculated within a microprocessor using the following relationships: 12 RL = PRFINA − PRFINB = (VOUTD − VCENTER ) SLOPE where return loss (RL) is expressed in decibels, V CENTER is the output voltage (typically 1V) when P RFINA = P RFINB , and SLOPE is typically equal to 25mV/dB (for R3 = 0Ω). ______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016 20kΩ MAX2016 SETD RFINA LOGARITHMIC DETECTOR RFINB LOGARITHMIC DETECTOR OUTD OUTD GND RF BLOCK COUPLER COUPLER OUT IN Figure 3. Gain Measurement Configuration VSWR can similarly be calculated through the following relationship: VSWR = −⎛ RL ⎞ −⎛ RL ⎞ 1 + 10 ⎝ 20 ⎠ 1 − 10 ⎝ 20 ⎠ Measuring Gain The MAX2016 can be used to measure the gain of an RF block (or combination of blocks) through the implementation outlined in Figure 3. As shown, a coupled signal from the input of the block is fed into RFINA, while the coupled output is connected to RFINB. The DC output voltage at OUTD is proportional to the power difference (i.e., gain). The gain of a complete receiver or transmitter lineup can likewise be measured since the MAX2016 accepts RF signals that range from low frequency to 2.5GHz; see Figure 4. The MAX2016 accurately measures the gain, regardless of the different frequencies present within superheterodyne architectures. Measuring Power (RSSI Detector Mode) In detector mode, the MAX2016 acts like a receive-signal-strength indicator (RSSI), which provides an output voltage proportional to the input power. This is accomplished by providing a feedback path from OUTA (OUTB) to SETA (SETB) (R1/R2 = 0Ω; see Figure 5). By connecting SET_ directly to OUT_, the op-amp gain is set to 2V/V due to two internal 20kΩ feedback resis- tors. This provides a detector slope of approximately 18mV/dB with a 0.5V to 1.8V output range. Gain-Controller Mode The MAX2016 can be used as a gain controller within an automatic gain-control (AGC) loop. As shown in Figure 6, RFINA and RFINB monitor the VGA’s input and output power levels, respectively. The MAX2016 produces a DC voltage at OUTD that is proportional to the difference in these two RF input power levels. An internal op amp compares the DC voltage with a reference voltage at SETD. The op amp increases or decreases the voltage at OUTD until OUTD equals SETD. Thus, the MAX2016 adjusts the gain of the VGA to a level determined by the voltage applied to SETD. Power-Controller Mode The MAX2016 can also be used as a power detector/controller within an AGC loop. Figure 7 depicts a scenario where the MAX2016 is employed as the AGC circuit. As shown in the figure, the MAX2016 monitors the output of the PA through a directional coupler. An internal integrator (Figure 5) compares the detected signal with a reference voltage determined by VSET_. The integrator, acting like a comparator, increases or decreases the voltage at OUT_, according to how closely the detected signal level matches the VSET_ reference. The MAX2016 maintains the power of the PA to a level determined by the voltage applied to SET_. ______________________________________________________________________________________ 13 MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MIXER fIF fRF COUPLER COUPLER LNA LO LOGARITHMIC RFINB DETECTOR RFINA LOGARITHMIC DETECTOR OUTD OUT MAX2016 SETD 20kΩ Figure 4. Conversion Gain Measurement Configuration VGA VGA OUTPUT VGA INPUT COUPLER COUPLER DETECTORS IN_ OUTA/ OUTB GAIN CONTROL INPUT OUTA/OUTB RFIN+_ 20kΩ SETA/ SETB SET-POINT DAC R1/R2 SETD RFIN-_ OUTD 20kΩ GND MAX2016 MAX2016 20kΩ RFINA Figure 5. In Detector Mode (RSSI), OUTA/OUTB is a DC Voltage Proportional to the Input Power (Note: Only one detector channel is shown within the figure. Since the MAX2016 is a dual detector, the second channel can be easily implemented by using the adjacent set of input and output connections.) 14 LOGARITHMIC DETECTOR LOGARITHMIC DETECTOR RFINB Figure 6. In Gain-Controller Mode, the OUTD Maintains the Gain of the VGA ______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements ⎛ mV ⎞ SLOPE OUTA OR OUTB = ⎜ 9 ⎟ ⎝ dB ⎠ ⎡ (R1 or R2) + 40k ⎤ ⎢ ⎥ 20k ⎢⎣ ⎥⎦ POWER AMPLIFIER TRANSMITTER COUPLER GAIN-CONTROL INPUT OUTD Slope Adjustment The transfer slope function of OUTD can be increased from its nominal value by varying resistor R3 (see the Typical Application Circuit). The equation controlling the slope is: ⎛ mV ⎞ ⎛ R3 + 20k ⎞ SLOPE OUTD = ⎜ 25 ⎟⎜ ⎟ ⎝ dB ⎠ ⎝ 20k ⎠ MAX2016 OUTA and OUTB Slope Adjustment The transfer slope function of OUTA and OUTB can be increased from its nominal value by varying resistors R1 and R2 (see the Typical Application Circuit). The equation controlling the slope is: RFINA/ LOGARITHMIC RFINB DETECTOR OUTA/ OUTB SET-POINT DAC SETA/ SETB 20kΩ 20kΩ Input Highpass Filters The MAX2016 integrates a programmable highpass filter on each RF input. The lower cutoff frequency of the MAX2016 can be decreased by increasing the external capacitor value between FA1 and FA2 or FB1 and FB2. By default, with no capacitor connecting FA1 and FA2 or FB1 and FB2, the lower cutoff frequency is 20MHz. Using the following equation determines the lowest operating frequency: frequency = 1 2πRC where R = 2Ω. Differential Output Video Filter The bandwidth and response time difference of the output amplifier can be controlled with the external capacitor, C15, connected between FV1 and FV2. With no external capacitor, the bandwidth is greater than 20MHz. The following equation determines the bandwidth of the amplifier difference: frequency = 1 2πRC where R = 1.8kΩ. Comparators/Window Detectors The MAX2016 integrates two comparators for use in monitoring the difference in power levels (gain) of RFINA and RFINB. The thresholds of the comparators are set to the voltage applied to CSETL and CSETH. The lower comparator (CSETL, COUTL) monitors the MAX2016 Figure 7. In Power-Controller Mode, the DC Voltage at OUTA or OUTB Controls the Gain of the PA, Leading to a Constant Output Power Level (Note: Only one controller channel is shown within the figure. Since the MAX2016 is a dual controller/detector, the second channel can be easily implemented by using the adjacent set of input and output connections.) minimum gain while the upper comparator (CSETH, COUTH) monitors the maximum gain. See the window detector shown in Figure 8. The outputs of each comparator can be monitored independently or from the COR output, which ORs the outputs of each comparator making a window detector. If the difference between the two RF input powers (gain) are within the set range, COR is a logic 0. If the gain of the RF inputs is too high or too low, the COR output is a logic 1. These comparators can be used to trigger hardware interrupts allowing rapid detection of overrange conditions. Power-Supply Connection The MAX2016 is designed to operate from a single +2.7V to +3.6V supply. To operate under a higher supply voltage range, a resistor must be connected in series with the power supply and VCC to reduce the voltage delivered to the chip. For a +4.75V to +5.25V supply, use a 37.4Ω (±1%) resistor in series with the supply. Layout Considerations A properly designed PC board is an essential part of any RF/microwave circuit. Keep RF signal lines as short ______________________________________________________________________________________ 15 MAX2016 LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements CSETH MAX2016 COR RFINA LOGARITHMIC DETECTOR CSETL RFINB LOGARITHMIC DETECTOR OUTD SETD 20kΩ COUPLER RF BLOCK COUPLER IN OUT Figure 8. Window Comparators Monitoring Mode. COR goes high if OUTD drops below CSETL or rises above CSETH. as possible to reduce losses, radiation, and inductance. For the best performance, route the ground pin traces directly to the exposed pad under the package. The PC board exposed pad MUST be connected to the ground plane of the PC board. It is suggested that multiple vias be used to connect this pad to the lower level ground planes. This method provides a good RF/thermal conduction path for the device. Solder the exposed pad on the bottom of the device package to the PC board. The MAX2016 Evaluation Kit can be used as a reference for board layout. Gerber files are available upon request at www.maxim-ic.com. Exposed Pad RF/Thermal Considerations The exposed paddle (EP) of the MAX2016’s 28-pin thin QFN-EP package provides two functions. One is a low thermal-resistance path to the die; the second is a lowRF impedance ground connection. The EP MUST be soldered to a ground plane on the PC board, either directly or through an array of plated via holes (minimum of four holes to provide ground integrity). Power-Supply Bypassing Proper voltage-supply bypassing is essential for highfrequency circuit stability. Bypass each VCC pin with a capacitor as close to the pin as possible (Typical Application Circuit). 16 ______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements 2, 9, 12, 20 26 SETA 25 REF 23 OUTB 24 SETB VCC 20kΩ 5, 17 27 OUTA 2.0V REF 20kΩ 20kΩ 20kΩ GND 3 RFINA+ RFINB+ 19 LOG AMPLIFIERS 50Ω LOG AMPLIFIERS 50Ω 4 RFINA- RFINB- 18 EXPOSED PAD 1 FA1 FB1 21 28 FA2 FB2 22 MAX2016 FV1 14 FV2 13 8 20kΩ COR CSETH 7 COUTH 6 COUTL 16 CSETL 15 OUTD SETD 11 10 ______________________________________________________________________________________ 17 MAX2016 Functional Diagram LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements MAX2016 Typical Application Circuit VREF VOUTA VOUTB VCC R6 R1 R2 VCC C5 7 FB2 OUTB REF SETB SETA 22 RFINB+ MAX2016 RFINA- RFINB- GND GND EXPOSED PADDLE COUTH COUTL CSETH CSETL 8 9 10 11 12 13 C10 C11 20 19 C8 RFINB 18 17 16 15 C9 COMPARATORB VCC 14 C15 A+B VCC C7 21 FV1 VCC 6 RFINA+ FV2 COMPARATORA 5 23 VCC VCC C2 24 VCC OUTD 4 25 FB1 SETD 3 RFINA OUTA FA2 2 C1 26 FA1 VCC 1 COR C3 27 C18 VCC C12 28 C4 VS VCC C6 C13 C14 R3 NOTE: COMPARATORS ARE DISABLED BY CONNECTING CSETL AND CSETH TO VCC. VOUTD Chip Information PROCESS: BiCMOS 18 ______________________________________________________________________________________ LF-to-2.5GHz Dual Logarithmic Detector/ Controller for Power, Gain, and VSWR Measurements b C L 0.10 M C A B D2/2 D/2 k 0.15 C B MARKING QFN THIN.EPS D2 0.15 C A D XXXXX E/2 E2/2 C L (NE-1) X e E E2 k L DETAIL A PIN # 1 I.D. e PIN # 1 I.D. 0.35x45∞ (ND-1) X e DETAIL B e L1 L C L C L L L e e 0.10 C A C 0.08 C A1 A3 PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.8mm 21-0140 -DRAWING NOT TO SCALE- COMMON DIMENSIONS A1 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0 A3 b D E L1 0 0.20 REF. 0.02 0.05 0 0.20 REF. 0.02 0.05 0 0.02 0.05 0.20 REF. 0.20 REF. 0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 0.80 BSC. e k L 0.02 0.05 0.65 BSC. 0.50 BSC. 0.50 BSC. 0.25 - 0.25 - 0.25 - 0.25 0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 - - - - - N ND NE 16 4 4 20 5 5 JEDEC WHHB WHHC - - 1 2 EXPOSED PAD VARIATIONS PKG. 32L 5x5 16L 5x5 20L 5x5 28L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A F - - - 28 7 7 WHHD-1 - - 32 8 8 WHHD-2 NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. D2 L E2 PKG. CODES MIN. NOM. MAX. MIN. NOM. MAX. ±0.15 T1655-1 T1655-2 T1655N-1 3.00 3.00 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.10 3.20 3.10 3.20 T2055-2 T2055-3 T2055-4 3.00 3.00 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.10 3.10 3.20 3.20 3.20 ** ** ** ** T2055-5 T2855-1 T2855-2 T2855-3 T2855-4 T2855-5 T2855-6 T2855-7 T2855-8 T2855N-1 T3255-2 T3255-3 T3255-4 T3255N-1 3.15 3.15 2.60 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3.00 3.00 3.00 3.00 3.25 3.25 2.70 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.25 3.25 2.70 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.35 3.35 2.80 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 3.35 3.35 2.80 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.15 3.15 2.60 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3.00 3.00 3.00 3.00 ** ** 0.40 DOWN BONDS ALLOWED NO YES NO NO YES NO Y ** NO NO YES YES NO ** ** 0.40 ** ** ** ** ** NO YES Y N NO YES NO NO ** ** ** ** ** SEE COMMON DIMENSIONS TABLE 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1, T2855-3 AND T2855-6. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. 11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. 12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.8mm 21-0140 -DRAWING NOT TO SCALE- F 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX2016 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)