RFD8P06E, RFD8P06ESM, RFP8P06E
Data Sheet
January 2002
8A, 60V, 0.300 Ohm, P-Channel Power
MOSFETs
Features
• 8A, 60V
These are P-Channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, relay drivers and emitter switches for bipolar
transistors. These transistors can be operated directly from
integrated circuits.
The RFD8P06E, RFD8P06ESM and RFP8P06E incorporate
ESD protection and are designed to withstand 2kV (Human
Body Model) of ESD.
• rDS(ON) = 0.300Ω
• Temperature Compensating PSPICE® Model
• 2kV ESD Protected
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Formerly developmental type TA49044.
D
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFP8P06E
TO-220AB
RFP8P06E
RFD8P06ESM
TO-252AA
D8P06E
RFD8P06E
TO-251AA
D8P06E
G
S
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e.
RFD8P06ESM9A.
Packaging
JEDEC TO-220AB
JEDEC TO-251AA
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
©2002 Fairchild Semiconductor Corporation
RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B
RFD8P06E, RFD8P06ESM, RFP8P06E
Absolute Maximum Ratings
TC = 25oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Single Pulse Avalanche Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic Discharge Rating MIL-STD-883, Category B(2) . . . . . . . . . . . . . . . . . . . .ESD
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
RFD8P06E, RFD8P06ESM, RFP8P06E
-60
-60
±20
8
Refer to Peak Current Curve
Refer to UIS Curve
48
0.32
2
-55 to 175
UNITS
V
V
V
A
A
300
260
oC
oC
W
W/oC
kV
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
SYMBOL
BVDSS
ID = 250µA, VGS = 0V
-60
-
-
V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA
-2.0
-
-4.0
V
-
-
-1.0
µA
Zero Gate Voltage Drain Current
IDSS
Gate to Source Leakage Current
Drain to Source On Resistance (Note 3)
IGSS
rDS(ON)
Turn-On Time
tON
Turn-On Delay Time
td(ON)
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
TEST CONDITIONS
VDS = Rated BVDSS, VGS = 0V
VDS = 0.8 x Rated BVDSS, TC = 150oC
-
-
-25
µA
VGS = ±20V
-
-
±10
µA
ID = 8A, VGS = -10V
-
-
0.300
Ω
VDD = -30V, ID ≈ 8A,
RL = 3.75Ω, VGS = -10V, RG = 2.5Ω
(Figure 13)
-
-
70
ns
-
15
-
ns
tr
-
30
-
ns
td(OFF)
-
40
-
ns
tf
-
25
-
ns
-
-
100
ns
-
30
36
nC
tOFF
Total Gate Charge
Qg(TOT)
VGS = 0 to -20V
Gate Charge at 5V
Qg(-10)
VGS = 0 to -10V
Threshold Gate Charge
Qg(TH)
VGS = 0 to -2V
VDD = -48V, ID = 8A,
RL = 6Ω
Ig(REF) = -1.45mA
-
15
18
nC
-
1.15
1.5
nC
VDS = -25V, VGS = 0V,
f = 1MHz
-
600
-
pF
-
160
-
pF
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
-
35
-
pF
Thermal Resistance Junction to Case
RθJC
Figure 12
-
-
3.125
oC/W
Thermal Resistance Junction to Ambient
RθJA
TO-220
-
-
62
oC/W
TO-251, TO-252
-
-
100
oC/W
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Source to Drain Diode Voltage
VSD
Diode Reverse Recovery Time
trr
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISD = -8A
-
-
-1.5
V
ISD = -8A, dISD/dt = -100A/µs
-
-
125
ns
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
©2002 Fairchild Semiconductor Corporation
RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B
RFD8P06E, RFD8P06ESM, RFP8P06E
Typical Performance Curves
Unless Otherwise Specified
POWER DISSIPATION MULTIPLIER
1.2
-10
ID , DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
0.2
0
-8
-6
-4
-2
0
0
25
50
75
100
125
TC , CASE TEMPERATURE (oC)
150
25
175
50
75
100
125
150
175
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
THERMAL IMPEDANCE
ZθJC , NORMALIZED
1
0.5
0.2
0.1
PDM
0.1
0.05
t1
t2
0.02
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
10-1
t 1, RECTANGULAR PULSE DURATION (s)
100
101
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
-102
TC = 25oC, TJ = MAX RATED
100µs
-10
1ms
10ms
-1
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
-0.1
-1
100ms
DC
-10
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
©2002 Fairchild Semiconductor Corporation
-100
IDM , PEAK CURRENT (A)
ID , DRAIN CURRENT (A)
-100
FOR TEMPERATURES ABOVE 25oC
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
175 – T C
I = I 25 ---------------------
150
VGS = -20V
VGS = -10V
-10
-5
10-6
TC = 25oC
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10-5
10-4
10-3
10-2
10-1
t, PULSE WIDTH (s)
100
101
FIGURE 5. PEAK CURRENT CAPABILITY
RFD8P06E, RFD8P06ESM, RFP8P06E Rev.B
RFD8P06E, RFD8P06ESM, RFP8P06E
Typical Performance Curves
Unless Otherwise Specified
(Continued)
-20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TC = 25oC
STARTING TJ = 25oC
ID , DRAIN CURRENT (A)
IAS , AVALANCHE CURRENT (A)
-30
-10
STARTING TJ = 150oC
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
0.1
1
VGS = -7V
-10
VGS = -6V
-5
VGS = -4.5V
0
-1.5
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
IDs(ON) , DRAIN TO SOURCE CURRENT (A)
-10
175oC
-5
0
-4
-6
-8
2.0
1.5
1.0
0.5
0
-80
-10
-40
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
NORMALIZED GATE
THRESHOLD VOLTAGE
2.0
1.5
1.0
0.5
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
©2002 Fairchild Semiconductor Corporation
40
80
120
160
200
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
VGS = VDS, ID = 250µA
-40
0
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 8. TRANSFER CHARACTERISTICS
0
-80
-7.5
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = -10V, ID = 8A
VGS, GATE TO SOURCE VOLTAGE (V)
2.0
-6.0
2.5
25oC
-2
-4.5
FIGURE 7. SATURATION CHARACTERISTICS
-55oC
-15
0
-3.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
VDD = -15V
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
VGS = -5V
0
10
tAV , TIME IN AVALANCHE (ms)
-20
VGS = -8V
VGS = -20V
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
-1
0.01
VGS = -10V
-15
ID = 250µA
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
200
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE
RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B
RFD8P06E, RFD8P06ESM, RFP8P06E
(Continued)
-10.0
-60
VGS = 0V, f = 1MHz
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
800
VDS , DRAIN TO SOURCE VOLTAGE (V)
1000
C, CAPACITANCE (pF)
Unless Otherwise Specified
CISS
600
400
COSS
200
CRSS
VDD = BVDSS
-7.5
-45
RL = 1.2Ω
IG(REF) = 1.45mA
-30
-15
-5
-10
-15
-20
0.75 BVDSS
0.50 BVDSS
0.50 BVDSS
0.25 BVDSS
0.25 BVDSS
-2.5
0.0
-25
20
VDS , DRAIN TO SOURCE VOLTAGE (V)
NOTE:
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
-5.0
0.75 BVDSS
VGS = -10V
0
0
0
VDD = BVDSS
VGS , GATE TO SOURCE VOLTAGE (V)
Typical Performance Curves
IG(REF)
t, TIME (µs)
IG(ACT)
80
IG(REF)
IG(ACT)
Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
tAV
L
0
VARY tP TO OBTAIN
REQUIRED PEAK IAS
-
RG
VDD
+
0V
VDD
DUT
tP
IAS
IAS
VDS
tP
0.01Ω
-VGS
BVDSS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(OFF)
td(ON)
tr
0
RL
VDS
10%
10%
+
VGS
VDS
0V
0
RGS
tf
90%
90%
10%
DUT
50%
-VGS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
©2002 Fairchild Semiconductor Corporation
VGS
50%
PULSE WIDTH
90%
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
RFD8P06E, RFD8P06ESM, RFP8P06E Rev.B
RFD8P06E, RFD8P06ESM, RFP8P06E
Test Circuits and Waveforms
(Continued)
VDS
VDS
Qg(TH)
0
RL
VGS = -2V
VGS = -10V
-VGS
VGS
-
Qg(-10)
VDD
+
VGS = -20V
VDD
DUT
Qg(TOT)
Ig(REF)
0
Ig(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT
©2002 Fairchild Semiconductor Corporation
FIGURE 19. GATE CHARGE WAVEFORMS
RFD8P06E, RFD8P06ESM, RFP8P06E Rev. B
RFD8P06E, RFD8P06ESM, RFP8P06E
PSPICE Electrical Model
REV 6/23/94
LDRAIN
CA 12 8 7.24e-10
CB 15 14 8.04e-10
CIN 6 8 6.00e-10
IT 8 17 1
LDRAIN 2 5 1e-10
LGATE 1 9 2.92e-9
LSOURCE 3 7 2.92e-9
RSCL1
RSCL2
5
51
ESG
+
RGATE
9
1
RDRAIN
6
8
VTO
-
17
18
+
-
16
DBODY
MOS2
21
-
18
20 8
LGATE
ESCL
EBREAK
EVTO
+
GATE
DESD1
RIN
11
MOS1
6
DBREAK
CIN
91
DESD2
8
RSOURCE
LSOURCE
7
S1A
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 95.2e-3
RGATE 9 20 3.95
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 143.6e-3
RVTO 18 19 RVTOMOD 1
2
DRAIN
DPLCAP
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DESD1 91 9 DESD1MOD
DESD2 91 7 DESD2MOD
DPLCAP 10 6 DPLCAPMOD
EBREAK 5 11 17 18 -79.2
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 6 8 1
EVTO 20 6 8 18 1
5
10
+
.SUBCKT RFP8P06E 2 1 3
12
S2A
14
13
13
8
S1B
13
CA
+
6
EGS
- 8
15
3
SOURCE
RBREAK
17
18
S2B
RVTO
CB
14
+
5
EDS
8
-
IT
19
-
VBAT
+
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.804
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/22,9))}
.MODEL DBDMOD D (IS=4.15e-15 RS=5.54e-2 TRS1=-1.32e-3 TRS2=-2.48e-6 CJO=6.06e-10 TT=7.50e-8)
.MODEL DBKMOD D (RS=4.66e-1 TRS1=1.58e-3 TRS2=-7.49e-6)
.MODEL DESD1MOD D (BV=20.2 TBV1=-1.25e-3 TBV2=5.79e-7 RS=36 NBV=50 IBV=7e-6)
.MODEL DESD2MOD D (BV=25.4 TBV1=-8.3e-4 TBV2=8.9e-7 NBV=50 IBV=7e-6)
.MODEL DPLCAPMOD D (CJO=2.49e-10 IS=1e-30 N=10)
.MODEL MOSMOD PMOS (VTO=-3.824 KP=5.163 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=9.48e-4 TC2=-1.42e-7)
.MODEL RDSMOD RES (TC1=5.40e-3 TC2=1.25e-5)
.MODEL RSCLMOD RES (TC1=1.75e-3 TC2=3.90e-6)
.MODEL RVTOMOD RES (TC1=-3.55e-3 TC2=-3.43e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=5.10 VOFF=3.10)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=3.10 VOFF=5.10)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.1 VOFF=-2.9)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.9 VOFF=2.1)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options;
written by William J. Hepp and C. Frank Wheatley.
©2002 Fairchild Semiconductor Corporation
RFD8P06E, RFD8P06ESM, RFP8P06E Rev.B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
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CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
VCX™
STAR*POWER is used under license
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
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DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
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As used herein:
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2. A critical component is any component of a life
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support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
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any time without notice in order to improve design.
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that has been discontinued by Fairchild semiconductor.
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Rev. H4
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