NTTS2P03R2 Power MOSFET −2.48 Amps, −30 Volts P−Channel Enhancement Mode Single Micro8t Package Features • • • • • • http://onsemi.com Ultra Low RDS(on) Higher Efficiency Extending Battery Life Miniature Micro8 Surface Mount Package Diode Exhibits High Speed, Soft Recovery Micro8 Mounting Information Provided Pb−Free Package is Available −2.48 AMPERES −30 VOLTS 85 mW @ VGS = −10 V Single P−Channel Applications D • Power Management in Portable and Battery−Powered Products, i.e.: Cellular and Cordless Telephones and PCMCIA Cards MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol G Value Unit VDSS −30 V Gate−to−Source Voltage − Continuous VGS "20 V Thermal Resistance, Junction−to−Ambient (Note 1) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C RqJA PD ID ID 160 0.78 −2.48 −1.98 °C/W W A A Thermal Resistance, Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C RqJA PD ID ID 70 1.78 −3.75 −3.0 °C/W W A A Thermal Resistance, Junction−to−Ambient (Note 3) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 5) RqJA PD ID ID IDM 210 0.60 −2.10 −1.67 −17 °C/W W A A A Thermal Resistance , Junction−to−Ambient (Note 4) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 5) RqJA PD ID ID IDM 100 1.25 −3.02 −2.42 −24 °C/W W A A A TJ, Tstg −55 to +150 °C Operating and Storage Temperature Range June, 2005 − Rev. 2 Micro8 CASE 846A STYLE 1 8 1 MARKING DIAGRAM & PIN ASSIGNMENT Source Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Minimum FR−4 or G−10 PCB, Time ≤ 10 Seconds. 2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Time ≤ 10 Seconds. 3. Minimum FR−4 or G−10 PCB, Steady State. 4. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State. 5. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. © Semiconductor Components Industries, LLC, 2005 S 1 Source Source Gate 1 2 3 4 WW AEG G Drain−to−Source Voltage 8 7 6 5 Drain Drain Drain Drain (Top View) WW = Work Week AE = Device Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device NTTS2P03R2 NTTS2P03R2G Package Shipping † Micro8 4000/Tape & Reel Micro8 (Pb−Free) 4000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTTS2P03R2/D NTTS2P03R2 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) (continued) Rating Symbol Value Unit EAS 292.5 mJ TL 260 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −30 Vdc, VGS = −10 Vdc, Peak IL = −3.0 Apk, L = 65 mH, RG = 25 W) Maximum Lead Temperature for Soldering Purposes for 10 seconds ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (Note 6) Characteristic Symbol Min Typ Max Unit V(BR)DSS −30 − − −30 − − Vdc mV/°C − − − − −1.0 −25 OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (VGS = 0 Vdc, ID = −250 mAdc) Temperature Coefficient (Positive) mAdc Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = −30 Vdc, TJ = 25°C) (VGS = 0 Vdc, VDS = −30 Vdc, TJ = 125°C) IDSS Gate−Body Leakage Current (VGS = −20 Vdc, VDS = 0 Vdc) IGSS − − −100 nAdc Gate−Body Leakage Current (VGS = +20 Vdc, VDS = 0 Vdc) IGSS − − 100 nAdc Gate Threshold Voltage (VDS = VGS, ID = −250 mAdc) Temperature Coefficient (Negative) VGS(th) −1.0 − −1.7 3.6 −3.0 − Vdc Static Drain−to−Source On−State Resistance (VGS = −10 Vdc, ID = −2.48 Adc) (VGS = −4.5 Vdc, ID = −1.24 Adc) RDS(on) − − 0.063 0.100 0.085 0.135 gFS − 3.1 − Mhos Ciss − 500 − pF Coss − 160 − Crss − 65 − td(on) − 10 − tr − 20 − td(off) − 40 − tf − 35 − td(on) − 16 − tr − 40 − td(off) − 30 − tf − 30 − Qtot − 15 22 Qgs − 3.2 − Qgd − 4.0 − VSD − − −0.92 −0.72 −1.3 − Vdc trr − 38 − ns ta − 20 − tb − 18 − QRR − 0.04 − ON CHARACTERISTICS Forward Transconductance (VDS = −15 Vdc, ID = −1.24 Adc) W DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = −24 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 7 & 8) Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = −24 Vdc, ID = −2.48 Adc, VGS = −10 Vdc, RG = 6.0 W) Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = −24 Vdc, ID = −1.24 Adc, VGS = −4.5 Vdc, RG = 6.0 W) Fall Time Total Gate Charge Gate−Source Charge Gate−Drain Charge (VDS = −24 Vdc, VGS = −4.5 Vdc, ID = −2.48 Adc) ns ns nC BODY−DRAIN DIODE RATINGS (Note 7) Diode Forward On−Voltage (IS = −2.48 Adc, VGS = 0 Vdc) (IS = −2.48 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (IS = −1.45 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) Reverse Recovery Stored Charge 6. Handling precautions to protect against electrostatic discharge is mandatory. 7. Indicates Pulse Test: Pulse Width = 300 msec max, Duty Cycle = 2%. 8. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 mC NTTS2P03R2 5 −10 V −3.5 V −3.3 V TJ = 25°C −3.7 V −3.9 V 2 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) 3 −3.1 V −4.1 V −4.5 V −4.9 V −6 V −2.9 V 1 −2.7 V −2.5 V VGS = −2.3 V 3 TJ = 25°C 2 TJ = 100°C 1 TJ = −55°C 0 0 0.5 0.25 0.75 1 1.25 1.5 1 1.75 3 4 5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.3 ID = −2.48 A TJ = 25°C 0.25 0.2 0.15 0.1 0.05 0 0 2 4 6 8 10 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.15 TJ = 25°C VGS = −4.5 V 0.1 VGS = −10 V 0.05 0 0.5 1.5 2.5 3.5 4.5 5.5 −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Gate−to−Source Voltage Figure 4. On−Resistance versus Drain Current and Gate Voltage 1.6 10,000 VGS = 0 V 1.4 ID = −2.48 A VGS = −10 V −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 2 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) VDS ≥ −10 V 4 1.2 1 0.8 0.6 −50 TJ = 150°C 1000 100 TJ = 100°C 10 1 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 5 Figure 5. On−Resistance Variation with Temperature 10 15 20 25 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 30 C, CAPACITANCE (pF) VGS = 0 V TJ = 25°C Ciss 1000 800 Crss 600 Ciss 400 Coss 200 Crss 0 −10 −5 0 5 10 15 20 25 30 −VGS −VDS 6 30 25 5 QT 4 Q1 20 VGS Q2 3 15 2 10 ID = −2.48 A TJ = 25°C 1 VDS 5 0 0 0 2 4 6 8 10 12 16 14 Qg, TOTAL GATE CHARGE (nC) GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VDS = 0 V 1200 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) NTTS2P03R2 Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge Figure 7. Capacitance Variation 3 −IS, SOURCE CURRENT (AMPS) 100 t, TIME (ns) td (off) tf tr 10 td (on) VDD = −24 V ID = −2.48 A VGS = −10 V 1 10 RG, GATE RESISTANCE (OHMS) 1 100 2.5 VGS = 0 V TJ = 25°C 2 1.5 1 0.5 0 0.4 0.5 0.6 0.7 0.8 0.9 1 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current ID , DRAIN CURRENT (AMPS) 100 10 VGS = 30 V SINGLE PULSE TC = 25°C di/dt IS 1 ms trr 10 ms ta tb 1 TIME 0.25 IS tp 0.1 0.01 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 IS dc 10 100 Figure 12. Diode Reverse Recovery Waveform VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTTS2P03R2 TYPICAL ELECTRICAL CHARACTERISTICS Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (°C/W) 1000 100 10 D = 0.5 0.2 0.1 0.05 P(pk) 0.02 0.01 t1 1 t2 DUTY CYCLE, D = t1/t2 SINGLE PULSE RqJC(t) = r(t) RqJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TC = P(pk) RqJC(t) 0.1 1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 t, TIME (s) Figure 13. Thermal Response http://onsemi.com 5 1.0E+01 1.0E+02 1.0E+03 NTTS2P03R2 PACKAGE DIMENSIONS Micro8 CASE 846A−02 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A−01 OBSOLETE, NEW STANDARD 846A−02. −A− −B− K PIN 1 ID G D 8 PL 0.08 (0.003) M T B S A DIM A B C D G H J K L S SEATING −T− PLANE 0.038 (0.0015) C L J H MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 −−− 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 −−− 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 3.20 0.126 6X 8X 4.24 0.167 0.65 0.0256 5.28 0.208 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Micro8 is a trademark of International Rectifier. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 6 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NTTS2P03R2/D