19-2297; Rev 0; 1/02 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO The output voltages are programmable from 1.2V to VIN using external feedback resistors, or can be preset to 1.8V or 3.3V for output 1 and 1.5V or 2.5V for output 2. When one output is higher than 1.2V, the second can be configured down to sub-1V levels. Output accuracy is better than ±1% over variations in load, line, and temperature. Internal soft-start reduces inrush current during startup. All devices feature power-on reset (POR). The MAX1971 includes a reset input (RSI), which forces POR low for 175ms after RSI goes low. The MAX1970 and MAX1972 include an open-drain power-fail output (PFO) that monitors input voltage and goes high when the input falls below 3.94V. For USB-powered xDSL modems, this output can be used to detect USB power failure. A minimum switching frequency of 1.2MHz ensures operation outside the xDSL band. Applications xDSL Modems xDSL Routers Copper Gigabit SFP and GBIC Modules USB-Powered Devices Dual LDO Replacement Features ♦ Current-Mode, 1.4MHz Fixed-Frequency PWM Operation ♦ 180° Out-of-Phase Operation Reduces Input Capacitor ♦ ±1% Output Accuracy Over Load, Line, and Temperature Ranges ♦ 750mA Guaranteed Output Current ♦ 2.6V to 5.5V Input ♦ Power-On Reset Delay of 16.6ms (MAX1970) or 175ms (MAX1971 and MAX1972) ♦ Power-Fail Output (MAX1970 and MAX1972 Only) ♦ Power-On Reset Input (MAX1971 Only) ♦ Operation Outside xDSL Band ♦ Ultra-Compact Design with Smallest External Components ♦ Outputs Adjustable from 0.8V to VIN or 1.8V/3.3V and 1.5V/2.5V Preset ♦ All-Ceramic Capacitor Application ♦ Soft-Start Reduces Inrush Current Ordering Information TEMP RANGE PIN-PACKAGE MAX1970EEE PART -40°C to +85°C 16 QSOP MAX1971EEE -40°C to +85°C 16 QSOP MAX1972EEE -40°C to +85°C 16 QSOP Pin Configuration Typical Operating Circuit VIN 2.6V TO 5.5V TOP VIEW RSI RSI EN EN VCC IN POR LX1 MAX1971 COMP1 LX1 1 16 PGND VCC 2 15 LX2 POR FB1 OUT1 1.8V 750mA FB1 4 VCC COMP2 LX2 FBSEL1 FB2 FBSEL2 REF PGND OUT2 2.5V 750mA 14 IN COMP1 3 MAX1970 MAX1971 MAX1972 13 FBSEL1 REF 7 12 FBSEL2 PF0 (MAX1970/MAX1972) 11 RSI (MAX1971) 10 EN GND 8 9 FB2 5 COMP2 6 POR QSOP ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX1970/MAX1971/MAX1972 General Description The MAX1970/MAX1971/MAX1972 dual-output currentmode PWM buck regulators operate from 2.6V to 5.5V input and deliver a minimum of 750mA on each output. The MAX1970 and MAX1972 operate at a fixed 1.4MHz (MAX1971 operates at 700kHz) to reduce output inductor and capacitor size and cost. Switching the regulators 180° out-of-phase also reduces the input capacitor size and cost. Ceramic capacitors can be used for input and output. MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO ABSOLUTE MAXIMUM RATINGS IN, EN, FBSEL1, FBSEL2, PFO, POR, RSI, VCC to GND ...................................................-0.3V to +6V COMP1, COMP2, FB1, FB2, REF to GND .............................................-0.3V to (VCC + 0.3V) LX1, LX2 to PGND .......................................-0.3V to (VIN + 0.3V) PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70°C) 16-pin QSOP (derate 8.3mW/°C above +70°C)...........667mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VIN = VCC = VEN = 5V, R POR = 100kΩ to IN, RPFO = 100kΩ to IN, VRSI = 0, CREF = 0.1µF, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.5 V IN AND VCC IN Voltage Range 2.6 IN Supply Current Switching with no load VIN = 3.3V IN Shutdown Current VIN = 5.5V, VEN = 0 VCC Undervoltage Lockout Threshold VCC rising MAX1971 5 10 MAX1970/MAX1972 10 20 MAX1970/MAX1972 1 100 MAX1971 1 60 2.40 2.55 mA µA V VCC falling 2.20 2.35 REF Voltage IREF = 0, VIN = 2.6V to 5.5V 1.188 1.200 1.212 V REF Shutdown Resistance REF to GND, VEN = 0 10 25 Ω REF Soft-Start Current VREF = 1V 20 25 30 µA 1.188 1.200 1.212 V VIN V REF FB1 AND FB2 FB_ Regulation Voltage FBSEL_ = unconnected, OUT1 = FB1, OUT2 = FB2, VCOMP_ = 1.20V to 1.80V, VIN = 2.6V to 5.5V OUT_ Voltage Range FBSEL_ = unconnected OUT1 Regulation Voltage 2 1.2 VIN = 2.6V to 5.5V VCOMP1 = 1.2V, FBSEL1= GND 1.782 1.800 1.818 VIN = 4.5V to 5.5V VCOMP1 = 1.2V, FBSEL1 = VCC 3.2670 3.3 3.330 VCOMP2 = 1.2V, FBSEL2 = GND 1.485 1.5 1.150 VCOMP2 = 1.2V, FBSEL2 = VCC 2.475 2.5 2.525 OUT2 Regulation Voltage VIN = 2.6V to 5.5V Maximum Output Current Guaranteed by design (Note 1) FB1 Input Resistance Measured from FB1 to GND FB2 Input Resistance Measured from FB2 to GND FB_ Input Bias Current FB1 or FB2, FBSEL_ = unconnected, VFB1 = VFB2 = 1.15V 750 V V mA FBSEL1 = GND 30 60 120 FBSEL1 = VCC 30 60 120 FBSEL2 = GND 22.5 45 90 FBSEL2 = VCC 22.5 45 90 0.01 0.1 _______________________________________________________________________________________ kΩ kΩ µA Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO (VIN = VCC = VEN = 5V, R POR = 100kΩ to IN, RPFO = 100kΩ to IN, VRSI = 0, CREF = 0.1µF, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS COMP1 AND COMP2 COMP1 Transconductance FB1 = COMP1, VCOMP1 = 1.2V FBSEL1 = unconnected 35 55 85 µS COMP2 Transconductance FB2 = COMP2, VCOMP2 = 1.2V FBSEL2 = unconnected 35 55 85 µS VIN = 5.0V 0.20 0.32 VIN = 3.3V 0.24 0.37 VIN =2.6V 0.28 VIN = 5.0V 0.12 0.23 VIN = 3.3V 0.14 0.25 Ω VIN = 2.6V 0.16 0.6 V/A LX1 AND LX2 Internal High-Side MOSFET On-Resistance Internal Low-Side MOSFET On-Resistance ILX = -180mA ILX = 180mA LX_ Current-Sense Transresistance 0.4 LX_ Current-Limit Threshold Duty Cycle = 100%, VIN = 2.6V to 5.5V LX_ Leakage Current VIN = 5.5V LX_ Switching Frequency VIN = 2.6V to 5.5V High side 0.80 1.2 1.60 Low side -1.6 -0.85 -0.40 VLX1 = VLX2 = 5.5V 20 VLX1 = VLX2 = 0 -20 MAX1970/MAX1972 1.2 1.4 1.6 MAX1971 0.60 0.70 0.80 LX_ Maximum Duty Cycle LX_ Minimum Duty Cycle 0.5 100 VIN = 2.6V to 5.5V Ω A µA MHz % MAX1970/MAX1972 15 20 MAX1971 10 15 VOUT rising 92 94 % POR Percentage of VOUT, VIN = 2.6V to 5.5V POR Thresholds POR Delay Time (TD) VOUT falling 87 90 MAX1970 13.3 16.6 20 MAX1971/MAX1972 140 175 210 POR Output Current, High V POR = VIN = 5.5V, VFB1 = VFB2 = 1.15V POR Output Voltage, Low VFB1 = 1.05V or VFB2 = 1.05V or RSI = IN (MAX1971 only), I POR = 1mA POR Startup Voltage FB1 = FB2 = GND, IPOR = 100µA, VIN = 1.2V -1 % ms 1 µA 0.01 0.05 V 0.01 0.05 V _______________________________________________________________________________________ 3 MAX1970/MAX1971/MAX1972 ELECTRICAL CHARACTERISTICS (continued) MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO ELECTRICAL CHARACTERISTICS (continued) (VIN = VCC = VEN = 5V, R POR = 100kΩ to IN, RPFO = 100kΩ to IN, VRSI = 0, CREF = 0.1µF, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX 4.04 4.12 3.86 3.94 UNITS PFO (MAX1970 and MAX1972 Only) PFO Trip Threshold VCC rising IN = VCC VCC falling PFO Output Current, High PFO = IN PFO Output Voltage, Low IPFO = 1mA, VIN = 4.3V -1 0.01 V 1 µA 0.05 V EN AND RSI (MAX1971 Only) VIL Logic Input Thresholds IN = 2.6V to 5.5V RSI Input Resistance Internal pullup resistor to IN EN Logic Input Current 0.4 VIH Logic input at 0 or 5.5V, VIN = 5.5V 5 0.95 1.0 1.6 10 20 VIL -1 1 VIH -1 1 V kΩ µA ELECTRICAL CHARACTERISTICS (VIN = VCC = VEN = 5V, VFB1 = VFB2 = 1.15V, R POR = 100kΩ to IN, RPFO = 100kΩ to IN, RSI = 0, CVCC = 0.1µF, CREF = 0.1µF, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = -40°C to +85°C.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS 5.5 V IN AND VCC IN Voltage Range 2.6 IN Supply Current Switching with no load VIN = 3.3V IN Shutdown Current VIN = 5.5V, VEN = 0 VCC Undervoltage Lockout Threshold VCC rising MAX1971 10 MAX1970/MAX1972 20 MAX1970/MAX1972 20 MAX1971 100 2.55 VCC falling 2.20 REF Voltage IREF = 0, VIN = 2.6V to 5.5V 1.185 REF Shutdown Resistance REF to GND, VEN=0 REF Soft-Start Current VREF = 1V mA µA V REF 1.212 V 25 Ω 20 30 µA 1.185 1.212 V V FB1 AND FB2 FB_ Regulation Voltage FBSEL_ = unconnected, OUT1 = FB1, OUT2 = FB2, VCOMP_ = 1.20V to 1.80V, VIN = 2.6V to 5.5V OUT_ Voltage Range FBSEL_ = unconnected OUT1 Regulation Voltage 4 1.2 VIN VIN = 2.6V to 5.5V VCOMP1 = 1.2V, FBSEL1= GND 1.778 1.818 VIN = 4.5V to 5.5V VCOMP1 = 1.2V, FBSEL1 = VCC 3.259 3.333 VCOMP2 = 1.2V, FBSEL2 = GND 1.481 1.515 VCOMP2 = 1.2V, FBSEL2 = VCC 2.469 2.525 OUT2 Regulation Voltage VIN = 2.6V to 5.5V Maximum Output Current Guaranteed by design (Note 1) 750 _______________________________________________________________________________________ V V mA Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO (VIN = VCC = VEN = 5V, VFB1 = VFB2 = 1.15V, R POR = 100kΩ to IN, RPFO = 100kΩ to IN, RSI = 0, CVCC = 0.1µF, CREF = 0.1µF, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = -40°C to +85°C.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX FBSEL1 = GND 30 120 FBSEL1 = VCC 30 120 FBSEL2 = GND 22.5 90 FBSEL2 = VCC 22.5 90 FB1 Input Resistance Measured from FB1 to GND FB2 Input Resistance Measured from FB2 to GND FB_ Input Bias Current FB1 or FB2, FBSEL_ = unconnected, VFB1 = VFB2 = 1.15V UNITS kΩ kΩ 0.1 µA COMP1 AND COMP2 COMP1 Transconductance FB1 = COMP1, VCOMP1 = 1.2V FBSEL1 = unconnected 35 85 µS COMP2 Transconductance FB2 = COMP2, VCOMP2 = 1.2V FBSEL2 = unconnected 35 85 µS LX1 AND LX2 Internal High-Side MOSFET On-Resistance ILX = -180mA Internal Low-Side MOSFET On-Resistance ILX = 180mA VIN = 5.0V 0.32 VIN = 3.3V 0.37 VIN = 5.0V 0.23 VIN = 3.3V 0.25 LX_ Current-Sense Transresistance LX_ Current-Limit Threshold Duty cycle = 100%, VIN = 2.6V to 5.5V LX_ Leakage Current VIN = 5.5V LX_ Switching Frequency VIN = 2.6V to 5.5V LX_ Minimum Duty Cycle VIN = 2.6V to 5.5V 0.4 0.6 High side 0.76 1.60 Low side -1.6 -0.40 VLX1 = VLX2 = 5.5V 20 VLX1 = VLX2 = 0 -20 MAX1970/MAX1972 1.2 1.6 MAX1971 0.60 0.80 MAX1970/MAX1972 20 MAX1971 15 Ω Ω V/A A µA MHz % POR Percentage of VOUT, VIN = 2.6V to 5.5V POR Thresholds POR Delay Time (TD) VOUT rising VOUT falling 94 87 % MAX1970 13.3 20 MAX1971/MAX1972 140 210 -1 1 µA ms POR Output Current, High V POR = VIN = 5.5V, VFB1 = VFB2 = 1.15V POR Output Voltage, Low VFB1 = 1.05V or VFB2 = 1.05V or RSI = IN (MAX1971 only), I POR = 1mA 0.05 V POR Start-Up Voltage FB1 = FB2 = GND, I POR = 100µA, VIN = 1.2V 0.05 V _______________________________________________________________________________________ 5 MAX1970/MAX1971/MAX1972 ELECTRICAL CHARACTERISTICS (continued) MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO ELECTRICAL CHARACTERISTICS (continued) (VIN = VCC = VEN = 5V, VFB1 = VFB2 = 1.15V, R POR = 100kΩ to IN, RPFO = 100kΩ to IN, RSI = 0, CVCC = 0.1µF, CREF = 0.1µF, FBSEL1 = unconnected, FBSEL2 = unconnected, TA = -40°C to +85°C.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS PFO (MAX1970 and MAX1972 Only) PFO Trip Threshold IN = VCC PFO Output Current, High PFO = IN PFO Output Voltage, Low IPFO = 1mA, VIN = 4.3V VCC rising VCC falling 4.12 3.86 -1 V 1 µA 0.05 V EN AND RSI (MAX1971 Only) VIL Logic Input Thresholds IN = 2.6V to 5.5V RSI Input Resistance Internal pullup resistor to IN EN Logic Input Current Logic Input at 0 or 5.5V, VIN = 5.5V 0.4 1.6 VIH 5 20 VIL -1 1 VIH -1 1 Note 1: Refer to the Output Voltage Selection section. Note 2: Specifications to -40°C are guaranteed by design and not production tested. 6 _______________________________________________________________________________________ V kΩ µA Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO EFFICIENCY vs. LOAD CURRENT 80 60 VOUT1 = 1.8V 50 40 30 VOUT2 = 1.5V MAX1970/ MAX1972 VIN = 5.0V 10 60 VOUT2 = 1.5V 50 VOUT2 = 2.5V 40 70 0.1 40 10 0.1 1 0.01 0.1 1 LOAD CURRENT (A) LOAD CURRENT (A) EFFICIENCY vs. LOAD CURRENT INPUT CURRENT vs. OUTPUT CURRENT REFERENCE VOLTAGE vs. REFERENCE LOAD CURRENT VOUT2 = 1.5V 50 40 30 20 VOUT2 = 2.5V 300 250 200 VOUT1 = 1.8V 150 100 MAX1971 VIN = 3.3V 10 350 0.1 1 MAX1970TOC06 1.19 1.17 0 100 200 LOAD CURRENT (A) 300 400 0 500 600 700 800 5 1.40 TA = -40°C TA = +25°C 1.20 1.00 MAX1971 TA = +85°C 0.80 TA = -40°C 0.60 20 3 MAX1970TOC08 TA = +85°C CHANGE IN OUTPUT VOLTAGE (mV) MAX1970/MAX1972 15 CHANGE IN OUTPUT VOLTAGE vs. LOAD CURRENT MAX1970TOC07 1.60 10 REFERENCE LOAD CURRENT (µA) OUTPUT CURRENT (mA) OSCILLATOR FREQUENCY vs. INPUT VOLTAGE OSCILLATOR FREQUENCY (MHz) 1.20 MAX1970/MAX1972 0 0.01 1.21 1.18 VOUT2 = 1.5V 50 0 REFERENCE VOLTAGE (V) VOUT1 = 1.8V VOUT1 = 3.3V 400 INPUT CURRENT (mA) 80 VIN = 5.0V 450 1.22 MAX1970TOC05 500 MAX1970TOC04 VOUT2 = 2.5V 60 0 0.01 LOAD CURRENT (A) 100 70 MAX1970/ MAX1972 VIN = 3.3V 20 MAX1971 VIN = 5.0V 10 1 VOUT2 = 1.5V 50 0 0.01 VOUT1 = 1.8V 60 30 20 0 EFFICIENCY (%) 80 VOUT1 = 1.8V 30 20 90 70 VOUT2 = 2.5V 90 EFFICIENCY (%) 70 100 MAX1970TOC02 VOUT1 = 3.3V VOUT1 = 3.3V 90 EFFICIENCY (%) EFFICIENCY (%) 80 MAX1970TOC01 VOUT2 = 2.5V 90 EFFICIENCY vs. LOAD CURRENT 100 MAX1970TOC03 EFFICIENCY vs. LOAD CURRENT 100 2 1 VOUT1 = 1.8V VOUT1 = 3.3V 0 -1 VOUT2 = 2.5V VOUT2 = 1.5V -2 VIN = 5.0V MAX1970/MAX1972 TA = +25°C 0.40 -3 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) 5.0 5.5 0 200 400 600 800 LOAD CURRENT (mA) _______________________________________________________________________________________ 7 MAX1970/MAX1971/MAX1972 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE MAX1970TOC10 MAX1970TOC09 VOUT2 VOUT1 IOUT2 IOUT1 MAX1970/MAX1972 MAX1970/MAX1972 40µs/div 40µs/div VIN = 5V VOUT1 = 3.3V, 100mV/div IOUT1 = 300mA TO 600mA RC1 = 82kΩ, CC1 = 680pF VIN = 5V VOUT2 = 1.5V, 100mV/div IOUT2 = 300mA TO 600mA RC2 = 39kΩ, CC2 = 680pF MAXIMUM OUTPUT TRANSIENT DURATION vs. POR COMPARATOR OVERDRIVE SWITCHING WAVEFORMS MAX1970TOC11 200mA/div IL1 5V/div VLX1 200mA/div IL2 5V/div VLX2 MAX1970/MAX1972 200ns/div VIN = 5V VOUT1 = 1.8V, VOUT2 = 2.5V IOUT1 = 500mA, IOUT2 = 500mA 8 MAX1970TOC12 14 POR COMPARATOR OVERDRIVE (%) MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO 12 10 8 6 4 2 0 0.01 0.1 1 10 MAXIMUM OUTPUT TRANSIENT DURATION (µs) _______________________________________________________________________________________ Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO PFO AND RISING INPUT VOLTAGE RSI AND POR TIMING MAX1970TOC14 MAX1970TOC13 VIN 4V PF0 0 2V/div 4V VRSI 2V/div VPOR 0 4ms/div 40ms/div VOUT1 = 1.8V, VOUT2 = 2.5V VIN = 5V VOUT1 = 1.8V, VOUT2 = 2.5V IOUT1 = 500mA, IOUT2 = 500mA PFO AND FALLING INPUT VOLTAGE VIN POR MAX1970TOC16 MAX1970TOC15 ENABLE RESPONSE 4V 0 2V/div 4V EN 5V/div VOUT1 PF0 VOUT2 0 4ms/div VOUT1 = 1.8V, VOUT2 = 2.5V 5ms/div MAX1970 VIN = 5V VOUT1 = 3.3V, VOUT2 = 2.5V IOUT1 = 375mA, IOUT2 = 375mA _______________________________________________________________________________________ 9 MAX1970/MAX1971/MAX1972 Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) SHUTDOWN RESPONSE POR MAX1970TOC17 MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO EN 5V/div VOUT1 VOUT2 5ms/div MAX1970 VIN = 5V VOUT1 = 3.3V, VOUT2 = 2.5V IOUT1 = 375mA, IOUT2 = 375mA Pin Description PIN FUNCTION MAX1971 1 LX1 LX1 Inductor Connection 1. Connect an inductor between LX1 and OUT1. 2 VCC VCC Analog Supply Voltage. Bypass with 0.1µF to ground. 3 COMP1 COMP1 OUT1 Regulator Compensation. Connect series RC network from COMP1 to GND. COMP1 is pulled to GND when the outputs are shut down. See the Compensation Design section for component values. FB1 OUT1 Feedback. Connected to OUT1 for internal mode (FBSEL1 = GND or VCC). Use an external resistor-divider from OUT1 to GND to set the output voltage from 1.2V to VIN for external mode (FBSEL1 = unconnected). See the Output Voltage Selection section for <1.2V output. 4 10 NAME MAX1970/MAX1972 FB1 5 FB2 FB2 OUT2 Feedback. Connected to OUT2 for internal mode (FBSEL2 = GND or VCC). Use an external resistor-divider from OUT2 to GND to set the output voltage from 1.2V to VIN for external mode (FBSEL2 = unconnected). See the Output Voltage Selection section for <1.2V output. 6 COMP2 COMP2 OUT2 Regulator Compensation. Connect series RC network from COMP2 to GND. COMP2 is pulled to GND when the outputs are shut down. See the Compensation Design section for component values. 7 REF REF Reference. Bypass with 0.01µF to 1.0µF capacitor. REF controls the soft-start ramp and is pulled to GND when the outputs are shut down. 8 GND GND Ground ______________________________________________________________________________________ Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO PIN NAME FUNCTION MAX1970/MAX1972 MAX1971 9 POR POR 10 EN EN Enable Input. Drive high to turn on both OUT1 and OUT2. Drive low to place the device in shutdown. PFO — Power-Fail Output. Open-drain output goes high when VCC drops below 3.94V. Useful for detecting a valid USB input voltage. — RSI Noninverting Reset Input. Causes POR to go low when RSI is high. Allows POR to go high 175ms after RSI falls, if outputs are in regulation. 12 FBSEL2 FBSEL2 Regulator 2 Feedback Select. Connect to VCC to set VOUT2 to 2.5V. Connect to GND to set VOUT2 to 1.5V. Leave unconnected to use external feedback resistors. 13 FBSEL1 FBSEL1 Regulator 1 Feedback Select. Connect to VCC to set VOUT1 to 3.3V. Connect to GND to set VOUT1 to 1.8V. Leave unconnected to use external feedback resistors. 14 IN IN Power-Supply Voltage. Input range from 2.6V to 5.5V. Bypass with 10µF capacitor to PGND. 15 LX2 LX2 16 PGND PGND 11 Active-Low Power-On Reset Output. Open-drain output goes high 16.6ms (MAX1970) or 175ms (MAX1971 or MAX1972) after both outputs reach 92% of nominal value, and RSI (MAX1971 only) is low. Inductor Connection 2. Connect an inductor between LX2 and OUT2. Power Ground Detailed Description The MAX1970/MAX1971/MAX1972 are dual-output, fixed-frequency, current-mode, PWM, step-down DC/DC converters. The MAX1970 and MAX1972 switch at 1.4 MHz while the MAX1971 switches at 700kHz. The two converters on each IC switch 180° out of phase with each other to reduce input ripple current. The high-switching frequency allows use of smaller capacitors for filtering and decoupling. Internal synchronous rectifiers improve efficiency and eliminate the typical Schottky freewheeling diode. The on-resistances of the internal MOSFETs are used to sense the switch currents for controlling and protecting the MOSFETs, eliminating current-sensing resistors to further improve efficiency and cost. The input voltage range is 2.6V to 5.5V. Each converter has a three-mode feedback input. Internally, OUT1 is set to either 3.3V or 1.8V, and OUT2 to 2.5V or 1.5V by connecting FBSEL1 and FBSEL2 to V CC or GND, respectively. When FBSEL1 or FBSEL2 are floating, each output can be set to any voltage between 1.2V and VIN through an external resistive divider. Having an output below 1.2V is also possible (see the Output Voltage Selection section). DC-DC Controller The MAX1970/MAX1971/MAX1972 family of step-down converters uses a pulse-width-modulating (PWM) currentmode control scheme. The heart of the current-mode PWM controller is an open-loop comparator that compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope compensation ramp. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator trips. During this on time, current ramps up through the inductor, sourcing current to the output and storing energy in a magnetic field. The current-mode feedback system regulates the peak inductor current as a function of the output voltage error signal. Since the average inductor current is nearly the same as the peak inductor current (assuming that the inductor value is relatively high to minimize ripple current), the circuit acts as a switch-mode transconductance amplifier. It pushes the output LC filter pole, normally found in a voltage-mode PWM, to a higher frequency. To preserve inner loop stability and eliminate inductor stair casing, a slope-compensation ramp is summed into the main PWM comparator. During the second half of the cycle, the internal high-side MOSFET ______________________________________________________________________________________ 11 MAX1970/MAX1971/MAX1972 Pin Description (continued) MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO VCC REGULATOR 1 IN FB1 FB SELECT FBSEL1 ERROR SIGNAL SLOPE COMP PWM CONTROL LX1 CURRENT SENSE COMP1 CLAMP PGND SOFT-START REF ÷2(MAX1970/ MAX1972)/ ÷4(MAX1971) REFERENCE VOLTAGE 1.2V 2.8MHz OSCILLATOR MAX1971 ONLY RSI POR POR THERMAL SHUTDOWN MAX1970/MAX1972 ONLY EN VOK PFO PFO COMP2 REGULATOR 2 FB2 FBSEL2 MAX1970 MAX1971 MAX1972 GND Figure 1. Functional Diagram turns off and the internal low-side N-channel MOSFET turns on. Now the inductor releases the stored energy as its current ramps down while still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load current and discharges when the inductor current is lower, smoothing the voltage across the load. Under overload conditions, when the inductor current exceeds the current limit (see the Current Limit section), the high-side MOSFET is not 12 turned on at the rising edge of the clock and the lowside MOSFET remains on to let the inductor current ramp down. Current Sense The current-sense circuit amplifies the current-sense voltage generated by the high-side MOSFET’s on-resistance and the inductor current (RDS(ON) ✕ IINDUCTOR). This amplified current-sense signal and the internal slope compensation signal are summed together into ______________________________________________________________________________________ Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO Current Limit The internal MOSFET has a current limit of 1.2A (typ). If the current flowing out of LX_ exceeds this maximum, the high-side MOSFET turns off and the synchronous rectifier MOSFET turns on. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. There is also a synchronous rectifier current limit of -0.85A. This is to protect the device from current flowing into LX_. If the negative current limit is exceeded, the synchronous rectifier is turned off, and the inductor current continues to flow through the high-side MOSFET body diode back to the input until the beginning of the next cycle or until the inductor current drops to zero. VCC Decoupling Due to the high-switching frequency and tight output tolerance (±1%), decoupling between IN and VCC is recommended. Connect a 10Ω resistor between IN and VCC and a 0.1µF ceramic capacitor from VCC to GND. Place the resistor and capacitor as close to VCC as possible. Startup To reduce the supply inrush current, soft-start circuitry ramps up the output voltage during startup. This is done by charging the REF capacitor with a current source of 25µA. Once REF reaches 1.2V, the output is in full regulation. The soft-start time is determined from: V t SS = REF CREF = 4.8 × 104 × CREF IREF Power-Fail Output The input voltage is sensed for 5V (typical USB applications), and if VCC drops below 3.94V, the power-fail output (PFO) goes high. The time from PFO going high to the outputs going out of regulation depends on the operating output voltage and currents, and the upstream 5V bus storage capacitor value, which is 120µF minimum (per USB specification, version 2.0). The lower the operating voltages and currents, and the higher the storage capacitor, the longer the elapsed time. PFO is an opendrain output, and a 10k to 100k pullup resistor to VCC, or either output, is recommended. Power-On Reset Power-on reset (POR) provides a system reset signal. During power-up, POR is held low until both outputs reach 92% of their regulated voltages, POR continues to be held low for a delayed period, and then goes high. This delay time (TD) for MAX1970 is 16.6ms. The MAX1971 and MAX1972 have a delay of 175ms. Figure 2 is an example of a timing diagram. The POR comparator is designed to be relatively immune to short-duration negative-going output glitches.The Typical Operating Characteristics gives a plot of maximum transient duration vs. POR comparator overdrive. The graph was generated using a negative-going pulse applied to an output, starting at 100mV above the actual POR threshold, dropping below the POR threshold by the percentage indicated as comparator overdrive, and then returning to 100mV above the threshold. The graph indicates the maximum pulse width the output transient can have without causing POR to trip low. Reset Input Soft-start occurs when power is first applied, and when EN is pulled high with power already present. The part also goes through soft-start when coming out of undervoltage lockout (UVLO) or thermal shutdown. The range of capacitor values for CREF is from 0.01µF to 1.0µF. Undervoltage Lockout If V CC drops below 2.35V, the MAX1970/MAX1971/ MAX1972 assume that the supply voltage is too low to provide a valid output voltage, and the UVLO circuit inhibits switching. Once V CC rises above 2.4V, the UVLO is disabled and the soft-start sequence initiates. Enable A logic-enable input (EN) is provided. For normal operation, drive EN logic high. Driving EN low turns off both outputs, and reduces the input supply current to approximately 1µA. Reset input (RSI) is an input on the MAX1971 that, when driven high, forces the POR to go low. When RSI goes low, POR goes through a delay time identical to a power-up event. See Figure 2 for timing diagram. RSI allows software to command a system reset. RSI must be high for a minimum period of 1µs in order to initiate the POR. Thermal-Overload Protection Thermal-overload protection limits total power dissipation. When the IC’s junction temperature exceeds TJ = +170°C, a thermal sensor shuts down the device, allowing the IC to cool. The thermal sensor turns the part on again after the junction temperature cools by 20°C. This results in a pulsed output during continuous overload conditions. During a thermal event, POR goes low, PFO goes high, and soft-start is reset. ______________________________________________________________________________________ 13 MAX1970/MAX1971/MAX1972 the PWM comparator’s inverting input. The PWM comparator turns off the internal high-side MOSFET when this sum exceeds the integrated feedback voltage. MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO VOUT POR TD ~1V PKMAX TD TRESET = 1µs MIN RSI 4.04V 3.94V VIN PFO Figure 2. Timing Diagram Design Procedure Output Voltage Selection Both output voltages can be selected in three different ways as indicated by Table 1. Each output has two preset voltages that can be set using FBSEL_ and it can also be set to any voltage from 0.8V to VIN by using an external resistor voltage-divider. To use a resistor-divider to set the output voltage to 1.2V or higher (Figure 5), connect a resistor from FB_ to OUT_ (R_a), and connect a resistor from FB_ to GND (R_ b ). Select the value of R_ b , between 10kΩ and 30kΩ. Then R_a is calculated by: V R _ a = R _ b × OUT − 1 . 1 2 Each output is capable of continuously sourcing up to 750mA of current as long as the following condition is met: VOUT1 × IOUT1 + VOUT2 × IOUT2 ≤ 1.05A VIN Inductor Value A 3.3µH to 6.8µH inductor with a saturation current of 800mA (min) is recommended for most applications. For best efficiency, the inductor’s DC resistance should be less than 100mΩ, and saturation current should be greater than 1A. See Table 2 for recommended inductors and manufacturers. A resistor-divider can also be used to set the voltage of one output from 0.8V to 1.2V. To do this, the other output must be above 1.2V. Figure 6 shows an example of this where OUT1 is set to 1V. To set the output voltage to less than 1.2V, connect a resistor from FB1 to OUT1 (R1), and from FB1 to OUT2 (R2). Select values of R1 and R2 such that current flowing through R1 and R2 is about 100µA and following equation is satisfied: R1 = R2 14 1.2 − VOUT2 VOUT1 − 1.2 ______________________________________________________________________________________ Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO VCC MAX1970/MAX1971/MAX1972 VIN 3.3V TO 5.5V 10Ω 10µF 0.1µF 100kΩ 100kΩ 2 VCC 14 11 PFO EN 10 680pF 82kΩ 680pF 39kΩ 3 6 12 PFO IN EN POR LX1 MAX1972 COMP1 FB1 POR 9 1 4.7µH 4 10µF COMP2 LX2 FBSEL2 VCC FB2 VOUT1 3.3V 15 4.7µH VOUT2 1.5V 5 13 0.1µF FBSEL1 7 REF GND 8 10µF PGND 16 Figure 3. Typical Application Circuit 1 VIN 3.3V TO 5.5V VCC 10Ω 10µF 0.1µF 100kΩ 100kΩ 2 14 11 PFO EN 10 680pF 680pF 82kΩ 62kΩ 3 6 13 PFO VCC IN EN COMP1 MAX1970 MAX1972 POR LX1 FB1 POR 9 1 4.7µH 4 10µF COMP2 FBSEL1 LX2 VCC FB2 VOUT1 3.3V 15 4.7µH VOUT2 2.5V 5 12 0.1µF FBSEL2 7 REF GND 8 10µF PGND 16 Figure 4. Typical Application Circuit 2 ______________________________________________________________________________________ 15 MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO VIN 2.6V TO 5.5V 10Ω 10µF 0.1µF 100kΩ 14 IN 11 RSI RSI 10 EN 680pF RC1 680pF RC2 3 2 VCC POR LX1 EN 13 7 1 R1b FBSEL1 FBSEL2 0.1µF 10µF 4 COMP2 REF VOUT1 R1a COMP1 LX2 12 4.7µH MAX1971 FB1 6 POR 9 FB2 4.7µH 15 5 VOUT2 R2a 10µF PGND 16 GND 8 R2b Figure 5. Setting the Output Voltage with External Resistors VIN 3V TO 3.6V 10Ω VCC 0.1µF 100kΩ 100kΩ 14 11 IN PFO RSI 10 EN 680pF 27kΩ 680pF 68kΩ 3 6 13 2 VCC LX1 EN 7 1 MAX1970 FB1 FBSEL1 REF GND 8 VOUT1 1.0V FB2 10µF 4 COMP2 FBSEL2 4.7µH R1 2kΩ LX2 12 POR 9 COMP1 VCC 0.1µF POR 15 5 R2 13kΩ 4.7µH VOUT2 2.5V 10µF PGND 16 Figure 6. Setting an Output Below 1.2V 16 ______________________________________________________________________________________ Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO FBSEL1 OUTPUT 1 FBSEL2 OUTPUT 2 VCC 3.3V VCC 2.5V GND 1.8V GND 1.5V Open Ext Divider Open Ext Divider For most designs, a reasonable inductor value (LINIT) is derived from the following equation: LINIT = VOUT (VIN − VOUT ) The key selection parameters for the output capacitor are its capacitance, ESR, ESL, and the voltage rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-DC converter. The output ripple is due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor’s ESR, and the voltage drop due to the capacitor’s ESL. VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) + VRIPPLE(ESL) VIN × LIR × IOUT(MAX ) × fOSC Keep the inductor current ripple percentage LIR between 20% and 40% of the maximum load current for best compromise of cost, size, and performance. The maximum inductor current is: The output voltage ripple due to the output capacitance, ESR, and ESL is: VRIPPLE(C) = LIR IL(MAX ) = 1+ IOUT(MAX ) 2 VRIPPLE(ESR) = IP−P × ESR Input Capacitor The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit’s switching. The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents defined by the following equation: IRMS = IP−P 8 × COUT × fSW 1 IOUT12 × VOUT1(VIN − VOUT1) + VIN IOUT22 × VOUT2 (VIN − VOUT2 ) A ceramic capacitor is recommended due to its low equivalent series resistance (ESR), equivalent series inductance (ESL), and lower cost. Choose a capacitor that exhibits less than a 10°C temperature rise at the maximum operating RMS current for optimum long-term reliability. VRIPPLE (ESL) = (IP-P / TON) ✕ ESL or (IP-P / TOFF) ESL, whichever is greater. IP-P is the peak-to-peak inductor current: ✕ V −V V IP−P = IN OUT × OUT fSW × L VIN These equations are suitable for initial capacitor selection, but final values should be set by testing a prototype or evaluation circuit. As a rule, a smaller ripple current results in less output voltage ripple. Since the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with larger inductance. Ceramic capacitors are recommended due to their low ESR and ESL at the switching frequency of the converter. For ceramic capacitors, the ripple voltage due to ESL is negligible. Load transient response depends on the selected output capacitor. During a load transient, the output instantly changes by ESR ✕ ∆ILOAD. Before the con- Table 2. Suggested Inductors PART INDUCTANCE (µH) ESR (mΩ) SATURATION CURRENT (A) DIMENSIONS (mm) DO1606 4.7 120 1.2 5.3 ✕ 5.3 ✕ 2 Sumida CR43-4R7 4.7 108.7 1.15 4.5 ✕ 4 ✕ 3.5 Sumida CDRH3D16-4R7 4.7 80 0.9 3.8 ✕ 3.8 ✕ 0.8 MANUFACTURER Coilcraft ______________________________________________________________________________________ 17 MAX1970/MAX1971/MAX1972 Output Capacitor Table 1. Output Voltage Settings MAX1970/MAX1971/MAX1972 Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO troller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time (see the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its nominal state. The controller response time depends on the closed-loop bandwidth. With a higher bandwidth, the response time is faster, thus preventing the output from deviating further from its regulating value. Compensation Design An internal transconductance error amplifier is used to compensate the control loop. Connect a series resistor and capacitor between COMP and GND to form a polezero pair. The external inductor, internal high-side MOSFET, output capacitor, compensation resistor, and compensation capacitor determine the loop stability. The inductor and output capacitor are chosen based on performance, size, and cost. Additionally, the compensation resistor and capacitor are selected to optimize control-loop stability. The component values shown in the typical application circuits (Figures 3, 4, and 5) yield stable operation over a broad range of input-to-output voltages. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor. The voltage across the internal high-side MOSFET’s on-resistance (RDS(ON)) is used to sense the inductor current. Current mode control eliminates the double pole caused by the inductor and output capacitor, which has large phase shift that requires more elaborate error-amplifier compensation. A simple Type 1 compensation with single compensation resistor (RC) and compensation capacitor (CC) is all that is needed to have a stable and highbandwidth loop. The basic regulator loop consists of a power modulator, an output feedback divider, and an error amplifier. The power modulator has DC gain set by gmc x RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. Below are equations that define the power modulator: GMOD = gmc × RLOAD The zero frequency for the output capacitor ESR is: fzESR = 1 2π × COUT × ESR where, RLOAD = VOUT/IOUT(MAX), and GMC = 2µS. The feedback divider has a gain of GFB = VFB/VOUT, where VFB is equal to 1.2V. The transconductance error amplifier has a DC gain, GEA(DC), of 60dB. A dominant pole is set by the compensation capacitor, CC, the output resistance of the error amplifier (ROEA), 20MΩ, and the compensation resistor, RC. A zero is set by RC and CC. The pole frequency set by the transconductance amplifier output resistance, and compensation resistor and capacitor is: fpEA = 1 2π × CC × ROEA The zero frequency set by the compensation capacitor and resistor is: fzEA = 1 2π × CC × RC For best stability and response performance, the closed-loop unity-gain frequency must be much higher than the modulator pole frequency. In addition, the closed-loop unity-gain frequency should be approximately 50kHz. The loop gain equation at unity gain frequency then is: V GEA(fc) × GMOD(fc) × FB = 1 VO Where GEA(fc) = gmEA ✕ RC, and GMOD(fc) = gmc ✕ RLOAD ✕ fpMOD/fc, where gmEA = 50µS, RC can be calculated as: RC = VO gmEA × VFB × GMOD(fc) The pole frequency for the modulator is: 1 fpMOD = 2π × COUT × (RLOAD + ESR) The error-amplifier compensation zero formed by RC and CC is set at the modulator pole frequency at maximum load. CC is calculated as follows: CC = VOUT × 18 COUT RC × IOUT(MAX ) ______________________________________________________________________________________ Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO COUT = 10µF RESR = 0.010Ω gmEA = 50µS gmC = 2S fSWITCH = 1.4 MHz RLOAD = VOUT / IOUT(MAX) = 2.5V / 0.6 A = 4.167Ω fpMOD = 1 / [2π COUT (RLOAD + RESR)] = 1 / [2π ✕ 10 ✕ 10-6 (4.167 + 0.01)] = 3.80 kHz. fzESR = 1 / [2π COUT RESR] = 1 / [2π ✕ 10 ✕ 10-6 ✕ 0.01] = 1.59 MHz. Pick a closed-loop unity-gain frequency (fc) of 50kHz. The power modulator gain at fc is: GMOD(fc) = gmc ✕ RLOAD ✕ fpMOD / fc = 2 ✕ 4.167 ✕ 3.80k / 50k = 0.635 then: RC = VO / (gmEA VFB GMOD(fc)) = 2.5 / (50 ✕ 10-6 ✕ 1.2 ✕ 0.635) ≈ 62kΩ CC = VOUT ✕ ( COUT / RC ) ✕ IOUT(MAX) = 2.5 ✕ 4.7 -6 ✕10 / 62k ✕ 0.6 ≈ 680pF Applications Information PC Board Layout Careful PC board layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout: 1) Place decoupling capacitors as close to IC pins as possible. Keep power ground plane (connected to PGND) and signal ground plane (connected to GND) separate. Connect the two ground planes together with a single connection from PGND to GND. 2) Input and output capacitors are connected to the power ground plane; all other capacitors are connected to signal ground plane. 3) Keep the high-current paths as short and wide as possible. 4) If possible, connect IN, LX1, LX2, and PGND separately to a large land area to help cool the IC to further improve efficiency and long-term reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close to the IC as possible. 6) Route high-speed switching nodes away from sensitive analog areas (FB1, FB2, COMP1, COMP2). Chip Information TRANSISTOR COUNT: 5428 PROCESS: BiCMOS ______________________________________________________________________________________ 19 MAX1970/MAX1971/MAX1972 As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly, and the closed-loop unity-gain frequency remains the same. Below is a numerical example to calculate RC and CC values of the typical application circuit of Figure 4, where: VOUT = 2.5V IOUT(MAX) = 0.6A Dual, 180° Out-of-Phase, 1.4MHz, 750mA StepDown Regulator with POR and RSI/PFO QSOP.EPS MAX1970/MAX1971/MAX1972 Package Information Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.