STMICROELECTRONICS L60NH3LL

STL60NH3LL
N-channel 30V - 0.0065Ω - 30A - PowerFLAT™ (6x5)
Ultra low gate charge STripFET™ Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STL60NH3LL
30V
<0.0085Ω
16A (2)
■
Improved die-to-footprint ratio
■
Very low profile package (1mm max)
■
Very low thermal resistance
■
Very low gate charge
■
Low threshold device
PowerFLAT™(6x5)
Description
This application specific Power MOSFET is the
latest generation of STMicroelectronics unique
“STripFET™” technology. The resulting transistor
is optimized for low on-resistance and minimal
gate charge. The Chip-scaled PowerFLAT™
package allows a significant board space saving,
still boosting the performance.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STL60NH3LL
L60NH3LL
PowerFLAT™ (6 x 5)
Tape & reel
September 2006
Rev 5
1/13
www.st.com
13
Contents
STL60NH3LL
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
................................................ 9
STL60NH3LL
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
30
V
± 16
V
Drain current (continuous) at TC = 25°C
30
A
ID (1)
Drain current (continuous) at TC = 100°C
30
A
ID(2)
Drain current (continuous) at TC = 25°C
16
A
VDS
Drain-source voltage (VGS = 0)
VGS
Gate-source voltage
ID
(1)
(3)
Drain current (pulsed)
64
A
PTOT(1)
Total dissipation at TC = 25°C
60
W
PTOT(2)
Total dissipation at TC = 25°C
4
W
0.03
W/°C
-55 to 150
°C
Value
Unit
2.08
°C/W
31.3
°C/W
IDM
Derating factor
Tj
Tstg
Operating junction temperature
Storage temperature
1. The value is rated according Rthj-C and is limited by wire bonding.
2. This value is according Rthj-pcb
3. Pulse width limited by safe operating area
Table 2.
Thermal resistance
Symbol
Rthj-case
Parameter
Thermal resistance junction-case (drain) Max
Rthj-pcb (1) Thermal resistance junction-pcb Max
1. When mounted on FR-4 board of
1inch2,
2 oz Cu, t<10sec
3/13
Electrical characteristics
2
STL60NH3LL
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 3.
Symbol
Parameter
Test condictions
Drain-source breakdown
voltage
ID = 250µA, VGS= 0
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = Max rating,
VDS = Max rating,@125°C
IGSS
Gate body leakage current
(VDS = 0)
VDS = ± 16V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250µA
RDS(on)
Static drain-source on
resistance
VGS= 10V, ID= 8A
VGS= 4.5V, ID= 8A
V(BR)DSS
Table 4.
Symbol
4/13
On/off states
Min.
Typ.
Max.
30
Unit
V
1
10
µA
µA
±100
nA
1
V
0.0065 0.0085
0.0075 0.0105
Ω
Ω
Dynamic
Parameter
Test condictions
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS=25V, f = 1MHz, VGS=0
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 15V, ID = 16A,
VGS = 4.5V
(see Figure 15)
RG
Gate input resistance
f=1 MHz Gate DC Bias = 0
Test signal level = 20mV
open drain
Min.
Typ.
Max.
1810
565
41
0.5
Unit
pF
pF
pF
18
4.8
5.3
24
nC
nC
nC
1.5
3
Ω
STL60NH3LL
Electrical characteristics
Table 5.
Symbol
Switching times
Parameter
Test condictions
Min.
Typ.
Max. Unit
td(on)
tr
Turn-on delay time
Rise time
VDD = 15V, ID = 8A
RG= 4.7Ω, VGS= 10V,
(see Figure 14)
8
65
ns
ns
td(off)
tf
Turn-off delay time
Fall time
VDD = 15V, ID = 8A
RG= 4.7Ω, VGS= 10V,
(see Figure 14)
30
20
ns
ns
Table 6.
Symbol
ISD
ISDM
VSD (1)
trr
Qrr
IRRM
Source drain diode
Parameter
Test condictions
Min
Typ.
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 16A, VGS = 0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 16V, di/dt = 100A/µs
VDD = 20V, Tj = 25°C
(see Figure 16)
22
32
1.9
Max
Unit
16
64
A
A
1.3
V
ns
nC
A
1. Pulsed: Pulse duration = 300µs, duty cycle 1.5%
5/13
Electrical characteristics
STL60NH3LL
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Normalized BVDSS vs temperature
Figure 6.
Static drain-source on resistance
6/13
STL60NH3LL
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 11. Source-drain diode forward
characteristics
7/13
Electrical characteristics
STL60NH3LL
Figure 12. Allowable Iav vs Time in Avalanche Figure 13. Allowable Iav vs Time in Avalanche
The previous curve gives the single pulse safe operating area for unclamped inductive loads
under the following conditions:
PD(AVE) =0.5*(1.3*BVDSS *IAV )
EAS(AR) =PD(AVE) *tAV
Where:
IAV is the allowable current in avalanche
PD(AVE) is the average power dissipation in avalanche (single pulse)
tAV is the time in avalanche
8/13
STL60NH3LL
3
Test circuit
Test circuit
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
Figure 16. Test circuit for inductive load
Figure 17. Unclamped inductive load test
switching and diode recovery times
circuit
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
9/13
Package mechanical data
4
STL60NH3LL
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
10/13
STL60NH3LL
Package mechanical data
PowerFLAT™ (6x5) MECHANICAL DATA
mm.
inch
DIM.
A
MIN.
TYP
MAX.
MIN.
TYP.
0.80
0.83
0.93
0.031
0.032
0.036
0.02
0.05
0.0007
0.0019
A1
A3
b
0.20
0.35
0.40
0.007
0.47
0.013
0.015
D
5.00
0.196
D1
4.75
0.187
D2
4.15
4.20
4.25
0.163
0.165
E
6.00
0.236
E1
5.75
0.226
E2
3.43
3.48
3.53
E4
2.58
2.63
2.68
e
L
0.135
1.27
0.70
0.80
MAX.
0.018
0.167
0.137
0.139
0.103
0.105
0.050
0.90
0.027
0.031
0.035
11/13
Revision history
5
STL60NH3LL
Revision history
Table 7.
12/13
Revision history
Date
Revision
Changes
10-Jan-2006
1
First release
14-Apr-2006
2
New footprint
03-Jul-2006
3
New Ecopack label
01-Aug-2006
4
Modified Figure 1. and Figure 2.
05-Sep-2006
5
New template, no content change
STL60NH3LL
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13/13