ONSEMI NTLGD3502NT2G

NTLGD3502N
Power MOSFET
20 V, 5.8 A/4.6 A Dual N−Channel,
DFN6 3x3 mm Package
Features
•
•
•
•
•
Exposed Drain Package
Excellent Thermal Resistance for Superior Heat Dissipation
Low Threshold Levels
Low Profile (< 1 mm) Allows It to Fit Easily into Extremely Thin
Environments
This is a Pb−Free Device
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MOSFET I
Applications
• DC−DC Converters (Buck and Boost Circuits)
• Power Supplies
• Hard Disk Drives
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
20
V
Gate−to−Source Voltage
VGS
±20
V
ID
4.3
A
Steady
State
TA = 25°C
t ≤ 5.0 s
TA = 25°C
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 85°C
TA = 25°C
t ≤10 ms
Pulsed Drain Current
Operating Junction and Storage Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
RDS(on) MAX
ID MAX
20 V
60 mW @ 4.5 V
5.8 A
MOSFET II
MOSFET I MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
V(BR)DSS
V(BR)DSS
RDS(on) MAX
ID MAX
20 V
90 mW @ 4.5 V
4.6 A
Heatsink 2
4
1
3
3.0
1
Parameter
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
t ≤ 5.0 s
TA = 25°C
Steady
State
1.74
IDM
17.2
TJ, TSTG
2
W
Pulsed Drain Current
t ≤10 ms
2
6
A
°C
−55 to
150
1.6
A
TL
260
°C
Symbol
Value
Unit
VDSS
20
V
VGS
±12
V
ID
3.6
A
2.5
4.6
PD
5
4
5
IS
TA = 85°C
TA = 25°C
3
5.8
PD
Heatsink 1
1
2, 5
3
4
6
1
6
= Gate 1
= Drain 1/Source 2
= Gate 2
= Drain 2
= Source 1
MARKING
DIAGRAMS
MOSFET II MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Drain−to−Source Voltage
2
1.74
W
DFN6
CASE 506AG
1
3502
A
Y
WW
G
1
3502
AYWW
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
IDM
13.8
A
TJ, TSTG
−55 to
150
°C
Source Current (Body Diode)
IS
1.7
A
Device
Package
Shipping †
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
NTLGD3502NT1G
DFN6
(Pb−free)
3000/Tape & Reel
NTLGD3502NT2G
DFN6
(Pb−free)
3000/Tape & Reel
Operating Junction and Storage Temperature
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces)
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm2, 1 oz. Cu
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 0
1
ORDERING INFORMATION
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTLGD3502N/D
NTLGD3502N
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
Junction−to−Ambient – Steady State (Note 1)
RqJA
72
°C/W
Junction−to−Ambient – t ≤ 5 s (Note 1)
RqJA
40
Junction−to−Ambient – Steady State min Pad (Note 2)
RqJA
110
Junction−to−Ambient – Pulsed (25% duty cycle) min Pad (Note 2)
RqJA
60
MOSFET I ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
V(BR)DSS
VGS = 0 V, ID = 250 mA
20
Drain−to−Source Breakdown
Voltage Temperature Coefficient
V(BR)DSS/TJ
ID = 250 mA, ref to 25°C
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
Typ
Max
Unit
Off Characteristics
Drain−to−Source Breakdown
Voltage
VGS = 0 V, VDS = 16 V
V
10
TJ = 25°C
mV/°C
1.0
TJ = 125°C
mA
10
±100
nA
2.0
V
On Characteristics (Note 3)
Gate Threshold Voltage
1.0
1.7
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
VGS = 4.5 V, ID = 4.3 A
50
gFS
VDS = 10 V, ID = 4.0 A
5.9
Input Capacitance
CISS
VGS = 0 V, f = 1 MHz, VDS = 10 V
250
480
Output Capacitance
COSS
138
200
Reverse Transfer Capacitance
CRSS
52
90
2.9
4.0
Forward Transconductance
−4.4
mV/°C
60
mW
S
Charges, Capacitances & Gate Resistance
Total Gate Charge
QG(TOT)
VGS = 4.5 V, VDS = 10 V; ID = 4.3 A
(Note 3)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
1.1
RG
1.5
Gate Resistance
pF
nC
1.0
W
Switching Characteristics, VGS = 4.5 V (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
VGS = 4.5 V, VDD = 10 V,
ID = 4.3 A, RG = 10 W
7.0
12
17.5
25
td(OFF)
8.6
15
tf
3.3
5.0
TJ = 25°C
0.78
1.2
TJ = 125°C
0.63
tr
ns
Drain−Source Diode Characteristics
Forward Diode Voltage
Reverse Recovery Time
VSD
tRR
VGS = 0 V, IS = 1.6 A
VGS = 0 V, dISD/dt = 100 A/ms,
IS = 1.0 A
16.7
Charge Time
ta
Discharge Time
tb
8.5
QRR
7.0
Reverse Recovery Charge
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
4. Switching characteristics are independent of operating junction temperatures
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2
V
ns
8.2
nC
NTLGD3502N
MOSFET II ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Test Conditions
Min
V(BR)DSS
VGS = 0 V, ID = 250 mA
20
Drain−to−Source Breakdown
Voltage Temperature Coefficient
V(BR)DSS/TJ
ID = 250 mA, ref to 25°C
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±12 V
VGS(TH)
VGS = VDS, ID = 250 mA
Parameter
Typ
Max
Unit
Off Characteristics
Drain−to−Source Breakdown
Voltage
VGS = 0 V, VDS = 16 V
V
22
TJ = 25°C
mV/°C
1
TJ = 125°C
mA
10
±100
nA
2.0
V
On Characteristics (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
0.6
−2.8
mV/°C
VGS = 4.5 V, ID = 3.4 A
70
90
VGS = 2.5 V, ID = 1.7 A
95
120
gFS
VDS = 10 V, ID = 3.4 A
6.7
Input Capacitance
CISS
VGS = 0 V, f = 1 MHz, VDS = 10 V
144
275
Output Capacitance
COSS
67
125
Reverse Transfer Capacitance
CRSS
22
40
2.1
5.0
nC
4.8
10
ns
13.6
25
td(OFF)
9.0
20
tf
1.9
5.0
TJ = 25°C
0.8
1.15
TJ = 150°C
0.63
Forward Transconductance
mW
S
Charges, Capacitances & Gate Resistance
VGS = 4.5 V, VDS = 10 V; ID = 3.4 A
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
0.11
Gate−to−Source Charge
QGS
0.42
Gate−to−Drain Charge
QGD
0.7
pF
Switching Characteristics, VGS = 4.5 V (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
VGS = 4.5 V, VDD = 16 V,
ID = 3.4 A, RG = 10 W
Drain−Source Diode Characteristics
Forward Diode Voltage
Reverse Recovery Time
VSD
tRR
VGS = 0 V, IS = 1.7 A
VGS = 0 V, dISD/dt = 100 A/ms,
IS = 1.0 A
12
Charge Time
ta
Discharge Time
tb
4.0
QRR
5.0
Reverse Recovery Charge
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
6. Switching characteristics are independent of operating junction temperatures
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3
V
ns
8.0
nC
NTLGD3502N
TYPICAL MOSFET I N−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
3.3 V
3.5 V
8
ID, DRAIN CURRENT (AMPS)
9
3.1 V
TJ = 25°C
7
6
2.9 V
5
4
2.7 V
3
2
2.5 V
1
0
2.3 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
10
VGS = 3.7 V to 6.5 V
2
1
3
5
4
6
7
8
7
6
5
4
100°C
3
25°C
2
8
TJ = −55°C
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1.5
2
2.5
3
3.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.2
ID = 4.3 A
TJ = 25°C
0.1
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
6.0
TJ = 25°C
0.0505
0.0500
0.0495
0.0490
0.0485
1.5
2.5
3.5
4.5
ID, DRAIN CURRENT (AMPS)
10,000
ID = 4.3 A
VGS = 4.5 V
VGS = 0 V
IDSS, LEAKAGE (nA)
1.5
VGS = 4.5 V
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.7
1.6
4
0.0510
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
VDS ≥ 10 V
9
1
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
10
1.4
1.3
1.2
TJ = 150°C
1000
1.1
1.0
0.9
TJ = 125°C
0.8
0.7
0.6
−50
100
−25
0
25
50
75
100
125
150
5
10
15
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
20
NTLGD3502N
TYPICAL MOSFET I N−CHANNEL PERFORMANCE CURVES
VGS = 0 V
VGS, GATE−TO−SOURCE VOLTAGE (V)
400
TJ = 25°C
C, CAPACITANCE (pF)
350
300
CISS
250
200
150
COSS
100
CRSS
50
0
0
5
10
15
25
20
6
12
QT
8
4
QGS
4
0
0
1
2
3
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
100
10
IS, SOURCE CURRENT (AMPS)
VDD = 10 V
ID = 4.3 A
VGS = 4.5 V
t, TIME (ns)
2
ID = 4.3 A
TJ = 25°C
Figure 7. Capacitance Variation
tr
10
td(off)
td(on)
tf
1
1
Rthja(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
6
2
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1
VGS
QGD
0
30
10
VDS
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
(TJ = 25°C unless otherwise noted)
10
100
VGS = 0 V
TJ = 125°C
TJ = 25°C
TJ = 150°C
1
0.1
TJ = −55°C
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (OHMS)
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
0.000001
Single Pulse
0.00001
0.0001
0.001
0.1
0.01
t, TIME (s)
Figure 11. FET Thermal Response
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5
1
10
100
1000
NTLGD3502N
TYPICAL MOSFET II N−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
7
TJ = 25°C
6
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
7
2.2 V
VGS = 2.4 V to 10 V
5
4
2V
3
1.8 V
2
1
VDS ≥ 10 V
6
5
4
3
100°C
2
25°C
1
1.6 V
0
0.4
0.8
1.2
1.6
2
2.4
2.8
3.2
3.6
4
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
3.5
1.5
2
2.5
3
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 12. On−Region Characteristics
Figure 13. Transfer Characteristics
1
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = −55°C
0
0.2
ID = 3.4 A
TJ = 25°C
0.1
0
1
2
3
4
5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
6
0.12
TJ = 25°C
0.1
VGS = 2.5 V
0.08
0.04
1.5
2.5
3.5
4.5
ID, DRAIN CURRENT (AMPS)
Figure 15. On−Resistance vs. Drain Current
and Gate Voltage
1000
1.8
VGS = 0 V
ID = 3.4 A
VGS = 4.5 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
VGS = 4.5 V
0.06
Figure 14. On−Resistance vs. Gate−to−Source
Voltage
1.6
4
1.4
1.2
1
TJ = 150°C
100
10
TJ = 100°C
0.8
0.6
−50
1
−25
0
25
50
75
100
125
150
5
10
15
20
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 16. On−Resistance Variation with
Temperature
Figure 17. Drain−to−Source Leakage Current
vs. Voltage
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6
NTLGD3502N
TYPICAL MOSFET II N−CHANNEL PERFORMANCE CURVES
C, CAPACITANCE (pF)
VGS = 0 V
VGS, GATE−TO−SOURCE VOLTAGE (V)
400
TJ = 25°C
300
200
CISS
COSS
100
CRSS
0
0
5
10
15
6
12
4
8
VDS
VGS
6
QGS
QGD
ID = 3.4 A
TJ = 25°C
0
2
Qg, TOTAL GATE CHARGE (nC)
Figure 18. Capacitance Variation
Figure 19. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
100
10
IS, SOURCE CURRENT (AMPS)
VDS = 16 V
ID = 3.4 A
VGS = 4.5 V
t, TIME (ns)
2
0
1
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
tr
10
td(off)
td(on)
tf
1
1
Rthja(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
4
2
0
20
10
QT
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
(TJ = 25°C unless otherwise noted)
10
100
VGS = 0 V
TJ = 100°C
TJ = 25°C
TJ = 150°C
1
TJ = −55°C
0.1
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (OHMS)
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 20. Resistive Switching Time Variation
vs. Gate Resistance
Figure 21. Diode Forward Voltage vs. Current
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.1
0.01
t, TIME (s)
Figure 22. FET Thermal Response
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7
1
10
100
1000
NTLGD3502N
PACKAGE DIMENSIONS
DFN6 3*3 MM, 0.95 PITCH
CASE 506AG−01
ISSUE O
A
D
B
PIN 1
REFERENCE
2X
0.15 C
2X
0.15 C
ÇÇÇ
ÇÇÇ
ÇÇÇ
NOTES:
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMESNION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30
MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
E
DIM
A
A1
A3
b
D
D2
D3
E
E2
e
K
L
H1
H2
TOP VIEW
0.10 C
A
6X
0.08 C
SEATING
PLANE
(A3)
SIDE VIEW
C
A1
MILLIMETERS
MIN
NOM MAX
0.80
0.90
1.00
0.00
0.03
0.05
0.20 REF
0.35
0.40
0.45
3.00 BSC
1.00
1.10
1.20
0.65
0.75
0.85
3.00 BSC
1.50
1.60
1.70
0.95 BSC
0.21
−−−
−−−
0.30
0.40
0.50
0.05 REF
0.40 REF
D2
6X
D3
L
e
1
SOLDERING FOOTPRINT*
4X
3
0.450
0.0177
0.850
0.0334
0.950
0.0374
3.31
0.130
1.700
0.685
E2
6X
K
6
4
H1
H2
BOTTOM VIEW
6X
b
(NOTE 3)
0.10 C A B
0.05 C
0.63
0.025
1.20
0.0472
0.35
0.014
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NTLGD3502N/D