www.fairchildsemi.com KA3511BS Intelligent Voltage Mode PWM IC Features Description • • • • • • • • • • • • • • The KA3511BS is a fixed-frequency improvedperformance pulse-width modulation control circuit with complete housekeeping circuitry for use in the secondary side of SMPS (Switched mode power supply). It contains various functions, which are precision voltage reference, over voltage protection, under voltage protection, remote on/off control, power good signal generator and etc. Complete PWM control and house keeping circuitry Few external components Precision voltage reference trimmed to 2% Dual output for push-pull operation Each output TR for 200mA sink current Variable duty cycle by dead time control Soft start capability by using dead time control Double pulse suppression logic Over voltage protection for 3.3V / 5V / 12V Under voltage protection for 3.3V / 5V / 12V One more external input for various protection (PT) Remote on/off control function (PS-ON) Latch function controlled by remote and protection input Power good signal generator with hysteresis Precision reference section The reference voltage trimmed to ± 2% (4.9V≤Vref≤5.1V) PG (Power good signal generator) section Power good signal generator is to monitor the voltage level of power supply for safe operation of a microprocessor. KA3511BS requires few external components to accomplish a complete housekeeping circuits for SMPS. OVP (Over voltage protection) section It has OVP functions for +3.3V,+5V,+12V and PT outputs. The circuit is made up of a comparator with four detecting inputs and without hysteresis voltage. Especially, PT (Pin18) is prepared for an extra OVP input or another protection signal. UVP (Under voltage protection) section It also has UVP functions for +3.3V, +5V, +12V outputs. The block is made up of a comparator with three detecting inputs and without hysteresis voltage. Remote on/off section Remote on/off section is used to control SMPS externally. If a high signal is supplied to the remote on/off input, PWM signal becomes a high state and all secondary outputs are grounded. The remote on/ off signal is transferred with some on-delay and off-delay time of 8ms, 24ms respectively. 24-SDIP 1 Rev. 5.0 ©2000 Fairchild Semiconductor Interaltional KA3511BS Internal Block Diagram RT CT COMP V5 7 D Q CK Q OSCILLATOR PWM CONTROL 8 C1 22 C2 23 E 2 V12 DEAD TIME CONTROLLER 3 E/A() E/A(+ ) 24 DELAY CONTROLLER R 5 REMOTE ON/OFF TREM Q 6 4 REM (PS-ON) S 1.25V 1.4V 0.1V DEAD TIME CONTROL 11 PG 21 5V INTERNAL BIAS VREF 14 VREF VREF Start Up VCC 1 VREF PG GENERATOR Ichag COMP1 OVP COMP PT 17 V12 16 V5 15 V3.3 1.25 V 5V DET 18 COMP3 9 1.8V 0.6V 1.8V 0.6V COMP2 1.25V UVP COMP 1.25 V 10 19 TPG 2.2u F 20 TUVP 2.2uF GND bsolute Maximum Ratings Parameter Symbol Value Unit VCC 40 V Collector output voltage VC1, VC2 40 V Collector output current IC1, IC2 200 mA PD 1.5 W Operating temperature TOPR −25 to 85 °C Storage temperature TSTG −65 to 150 °C Supply voltage Power dissipation(KA3511BS) Temperature Characteristics 2 Parameter Symbol Temperature coefficient of Vref (-25°C≤Ta≤85°C) ∆Vref/∆T Value Min. Typ. Max. – 0.01 – Unit %/°C KA3511BS Pin Definition : KA3511BS C1 E C2 DTC GND TUVP PT V12 V5 V3.3 Vref NC #24 #13 AS KA3511D #12 #1 Vcc Pin Number Pin Name COMP I/O E/A(-) EA(+) TREM REM Pin Function RT CT Pin Number DET Pin Name PG TPG I/O NC Pin Function Descrition 1 VCC I Supply voltage 13 NC - NC 2 COMP O E/A output 14 Vref O Precision reference VTG 3 E/A(-) I E/A (-) input 15 V3.3 I OVP, UVP input for 3.3V 4 E/A(+) I E/A (+) input 16 V5 I OVP, UVP input for 5V 5 TREM – Remote on/off delay 17 V12 I OVP, UVP input for 12V 6 REM I Remote on/off input 18 PT I Extra protection input 7 RT – Oscillation freq. setting R 19 TUVP – UVP delay 8 CT – Oscillation freq. setting C 20 GND – Signal ground 9 DET I Detect input 21 DTC I Deadtime control input 10 TPG – PG delay 22 C2 O Output 2 11 PG O Power good signal output 23 E – Power ground 12 NC - NC 24 C1 O Output 1 3 KA3511BS Pin Number Pin Name 4 Pin Function Descrition 1 VCC 2 COMP Error amplifier output. It is connect to non-inverting input of pulse width modulator comparator. 3 E/A(-) Error amplifier inverting input. Its reference voltage is always 1.25V. 4 E/A(+) Error amplifier non-inverting input feedback voltage.This pin may be used to sense power supply output voltage. 5 TREM Remote on/off delay. Ton/Toff=8ms/24ms (Typ.) with C=0.1uF. Its high/low threshold voltage is 1.8V/0.6V. 6 REM Remote on/off input. It is TTL operation and its threshold voltage is 1.4V. Voltage at this pin can reach normal 4.6V, with absolutely maximum voltage, 5.25V. If REM = “Low”, PWM = “Low”. That means the main SMPS is operational. When REM = “High”, then PWM = “High” and the main SMPS is turned-off. 7 RT Oscillation frequency setting R. (Test Condition RT=10kΩ) 8 CT Oscillation frequency setting C. (Test Condition CT=0.01uF) 9 DET Under-voltage detect pin. Its threshold voltage is 1.25V Typ. 10 TPG PG delay. Td=250ms (Typ) with CPG=2.2uF. The high/low threshold voltage are 1.8V/ 0.6V and the voltage of Pin10 is clamped at 2.9V for noise margin. 11 PG Power good output signal. PG = “High” means that the power is “Good” for operation and PG = “Low” means “Power fail”. 14 Vref Precision voltage reference trimmed to 2%. (Typical Value = 5.03V) 15 V3.3 Over voltage protection for output 3.3V. (Typical Value = 4.1V) 16 V5 Over voltage protection for output 5V. (Typical Value = 6.2V) 17 V12 Over voltage protection for output 12V. (Typical Value = 14.2V) 18 PT This is prepared for an extra OVP input or another protection signal. (Typical Value = 1.25V) 19 TUVP Timing pin for under voltage protection blank-out time. Its threshold voltage is 1.8V and clamped at 2.9V after full charging. Target of delay time is 250ms and it is realized through external (C=2.2uF). 20 GND Signal ground. 21 DTC Deadtime control input. The dead-time control comparator has an effective 120mV input offset which limits the minimum output dead time. Dead time may be imposed on the output by setting the dead time control input to a fixed voltage, ranging between 0V to 3.3V. 22 C2 23 E 24 C1 Supply voltage. Operating range is 14V~30V. VCC=20V, Ta=25°C at test. Output drive pin for push-pull operation. Power ground. Output drive pin for push-pull operation. KA3511BS AElectrical Characteristics (vcc=20v, ta=25°°c) Parameter Symbol Condition Value Unit Min. Typ. Max. 4.9 5 5.1 V REFERENCE SECTION Reference output voltage Vref Line regulation Load regulation Temperature coefficient of Vref (1) Short-circuit output current Iref=1mA ∆Vref.LINE 14V≤VCC≤30V - 2.0 25 mV ∆Vref.LOAD 1mA≤Iref≤10mA - 1.0 15 mV ∆Vref/∆T -25°C≤Ta≤85°C - 0.01 - %/°C 15 35 75 mA ISC Vref=0 fosc CT=0.01uF, RT=12k - 10 - kHz fosc/T CT=0.01uF, RT=12k - 2 - % OSCILLATOR SECTION Oscillation frequency Frequency change with temperature (1) DEAD TIME CONTROL SECTION Input bias current IB(DT) Maximum duty voltage DCMAX Input threshold voltage VTH(DT) - -2.0 -10 uA Pin19 (DTC)=0V - 45 48 50 % Zero Duty Cycle - 3.0 3.3 Max. Duty Cycle 0 - - 1.20 1.25 1.30 V - -0.1 -1.0 uA 70 95 - dB - 650 - kHz V ERROR AMP SECTION Inverting reference voltage Input bias current IB(EA) Open-loop voltage gain (1) Unit-gain bandwidth Vref(EA) (1) Output sink current GVO BW VCOMP=2.5V 0.5V≤VCOMP≤3.5V - ISINK VCOMP=0.7V 0.3 0.9 - mA ISOURCE VCOMP=3.5V -2.0 -4.0 - mA VTH(PWM) Zero Duty Cycle - 4 4.5 V Output saturation voltage VCE(SAT) IC=200mA - 1.1 1.3 V Collector off-state current Output source current PWM COMPARATOR SECTION Input threshold voltage OUTPUT SECTION IC(off) VCC=VC=30V, VE=0V - 2 100 uA Rising time TR - - 100 200 ns Falling time TF - - 50 200 ns VOVP1 - 3.8 4.1 4.3 V PROTECTION SECTION Over voltage protection for 3.3V 5 KA3511BS Electrical Characteristics (continued) Parameter Value Symbol Condition Over voltage protection for 5V VOVP2 - 5.8 6.2 6.6 V Over voltage protection for 12V VOVP3 - 13.5 14.2 15.0 V VPT - 1.20 1.25 1.30 V Under voltage protection for 3.3V VUVP1 - 2.1 2.3 2.5 V Under voltage protection for 5V VUVP2 - 3.7 4.0 4.3 V Under voltage protection for 12V VUVP3 - 9.2 10 10.8 V Charging current for UVP delay ICHG.UVP Input threshold voltage for PT Min. Typ. Max. Unit C=2.2uF, VTH=1.8V −10 −15 −23 uA TD.UVP C=2.2uF 100 260 500 ms REM on input voltage VREMH IREM=−200uA 2.0 - - V REM off input voltage VREML - - 0.8 V UVP Delay Time REMOTE ON/OFF SECTION REM off input bias voltage IREML REM on open voltage VREM=0.4V - VREM(OPEN) REM on delay time REM off delay time REMOTE ON/OFF SECTION - - - −1.6 mA 2.0 - 5.25 V Ton C=0.1uF 4 8 14 ms Toff C=0.1uF 16 24 34 ms (2) Detecting input voltage VIN(DET) - 1.20 1.25 1.30 V Detecting V5 voltage V5(DET) - 4.1 4.3 4.5 V Hysteresis voltage 1 HY1 COMP1, 2 10 40 80 mV Hysteresis voltage 2 HY2 COMP3 0.6 1.2 - V PG output load resistor RPG 0.5 1 2 kΩ C=2.2uF, VTH=1.8V −10 −15 −23 uA C=2.2uF 100 260 500 ms IPG=10mA - 0.2 0.4 V - - 10 20 mA Charging current for PG delay PG delay time PG output saturation voltage ICHG.PG TD.PG VSAT(PG) - TOTAL DEVICE Stanby supply current ICC Notes: 1. These Parameters, although guaranteed over their recommended operating conditions are not 100% tested in production. 2. REM on delay time (Pin6 REM: “L” → “H”), REM off delay time (Pin6 REM: “H” → “L”) 6 KA3511BS Application Informations 300K VCC=15V IO - OSCILLATOR FREQUENCY 100K 0.001µF 10K CT=0.01µF 1K 0.1µF 1.0µF 100 30 1K 2K 5K 10K 20K 50K 100K 200K 500K 1M RT. TIMING RESISTANCE(Ω) Figure 1. Oscillator Frequency vs. Timing Resistance Ct Feedback Dead-time control Ck Q Q Output Q1 Output Q2 Figure 2. Operating Waveform 7 KA3511BS Housekeeping Circuit 2kΩ(1W ) 2kΩ(1W ) Standby Supply VCC=20V 1 VCC 2 COMP E 23 3 E/A(-) C2 22 4 E/A(+) DTC 21 GND 20 TUVP 19 C1 24 15kΩ 12V 5V 0.01u F 11kΩ 33kΩ 1.8k Ω 0.1uF 5 TREM 6 REM + 1kΩ Micom 7 RT K A 3 5 1 1 A B + 2.2uF PT 18 V12 17 12V 16 5V 15 3V S 12kΩ 8 + CT 0.01u F 2.2uF 9 DET V5 10 TPG V3.3 11 PG Vref + PG 14 1uF 12 13 Note : The KA3511BS requires few external components to accomplish a complete housekeeping circuits for SMPS. 8 + KA3511BS Typical Characteristics 0.014 5.010 0.012 5.008 Vref [V] ICC [A] 0.010 0.008 0.006 0.004 5.006 5.004 0.002 5.002 0.000 0 10 20 30 -40 40 -20 0 20 40 Supply Voltage [V] 80 100 120 140 TEMP [°C] Figure 1. VCC-ICC Figure 2. Bandgap Reference Voltage 50 5 40 4 31.1% 3 30 VPG [V] Duty Ratio [%] 60 21.8% 20 2 12.8% 10 1 0 0 0.0 0.5 1.0 1.5 2.0 3.6 2.5 2.73 3.0 3.8 4.0 Deadtime Control Voltage [V] 4.2 4.4 4.6 V3.3 [V] Figure 3. PIN19(Dead Time Control Voltage)-Duty Cycle Figure 3. OVP for 3.3V 7 5 5 4 4 3 VPG [V] VPG [V] 6 3 2 2 1 1 0 0 5.0 5.5 6.0 V5 [V] Figure 5. OVP for 5V 6.5 7.0 14.0 14.2 14.4 14.6 14.8 15.0 V12 [V] Figure 6. OVP for 12V 9 5 5 4 4 3 3 VPG [V] VPG [V] KA3511BS 2 2 1 1 0 0 1.15 1.20 1.25 1.30 21 1.35 5 4 4 VPG [V] VPG [V] 5 3 2 2 1 0 0 4.2 4.4 25 3 1 4.0 24 Figure 8. UVP for 3.3V Figure 7. OVP for PT 3.8 23 Pin 13 (V3.3) Voltage [V] Vpt [V] 3.6 22 4.6 4.8 9.0 5.0 9.5 10.0 10.5 11.0 Pin 15 (V12) Voltage [V] Pin 14 (V5) Voltage [V] Figure 10 . UVP for 12V Figure 9 . UVP for 5V -0.000016 5 4 VPG [V] Irem [A] -0.000018 -0.000020 -0.000022 3 2 1 -0.000024 0 0 50 100 150 200 250 0 1 2 3 4 Vrem [V] Figure 11 . Remote ON Charging Current 10 Figure 12 . REM ON/OFF Vth 5 5 5 4 4 VPG [V] Vrem [V] KA3511BS 3 3 2 2 1 1 0 0 0 1 2 3 4 5 1.0 1.1 1.2 1.3 1.4 1.5 Pin 9 (DET) Voltage [V] Figure 13. Remote ON Open Voltage Figure 14. Detecting VCC Voltage (DET) -0.000005 5 -0.000010 IPG [V] VPG [V] 4 3 2 1 -0.000015 -0.000020 0 4.0 4.2 4.4 4.6 4.8 5.0 0 20 40 60 80 100 120 140 160 Pin 14 (5V) Voltage [V] Figure 16. Charging Current for PG Figure 15. Detecting V5 Voltage 5 -0.032 -0.033 VPG [V] Iref [A] 4 -0.034 3 2 1 -0.035 0 0 100 200 300 400 0.0 0.5 1.0 1.5 2.0 2.5 Pin 10 (TPG) Voltage [V] Figure 15. Short Circuit Current Figure 16. Hysteresis Voltage 2 11 KA3511BS 0.002 5 4 -0.002 Vref [V] Isink & Isource [A] 0.00 -0.004 3 2 -0.006 1 -0.008 0 0 20 40 60 80 100 120 140 0 10 20 30 Supply Voltage [V] Figure 17. Error Amp Sink Current 12 Figure 18. Reference Voltage 40 KA3511BS Experimental Result CH1 : PS-ON CH2 : +5Vdc Output CH3 : PG Signal Figure 3. Rising Time of +5Vdc Output Voltage CH1 : PS-ON CH2 : +5Vdc Output CH3 : PG Signal Figure 4. PG Signal Delay Time 13 KA3511BS CH1 : PS-ON CH2 : +5Vdc Output CH3 : PG Signal Figure 5. Power Down Warning CH1 : +3.3Vdc Output CH2 : +5Vdc Output CH3 : +12Vdc Output Figure 6. No Load Protection 14 KA3511BS CH1 : Vcc CH2 : +5Vdc Output CH3 : PG Signal Figure 7. Vcc, +5Vdc Output vs. PG Signal (High) CH1 : Vcc CH2 : +5Vdc Output CH3 : PG Signal Figure 8. Vcc, +5Vdc Output vs. PG Signal (Low) 15 KA3511BS Application Circuit 47K 70K R6 R5 VCC 3 15K 4 POWER ON 5 + 0.1uF 6 OUT REF 7 8 103 9 10 + PG 2.2uF 11 12 COMP E/A(-) C1 E C2 E/A(+) DTC TREM GND REM TUVP RT PT CT V12 DET TPG PG NC NC V5 V3.3 Vref NC NC AR3511X BS C1 24 22 23 21 22 20 R4 1.2K C2 19 21 20 18 17 19 18 16 R3 56K + 2 Vcc 2.2uF 17 15 5V OUT 15 13 3.3V OUT 14 12 13 D9 C16 VR1 + 16 C6 22uF 12V OUT 16 14 D19 100K + IC1 1 103 CT KA3511BS Mechanical Dimensions Package Dimensions in millimeters 24-SDIP 17 KA3511BS Ordering Information 18 Product Number Package Operating Temperature KA3511BS 24-SDIP 0°C ~ 70°C KA3511BS 19 KA3511BS DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 9/25/00 0.0m 001 Stock#DSxxxxxxxx 2000 Fairchild Semiconductor International